CN102401876A - Testing system and testing method for optoelectronic integrated circuit chip - Google Patents
Testing system and testing method for optoelectronic integrated circuit chip Download PDFInfo
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- CN102401876A CN102401876A CN2010102849749A CN201010284974A CN102401876A CN 102401876 A CN102401876 A CN 102401876A CN 2010102849749 A CN2010102849749 A CN 2010102849749A CN 201010284974 A CN201010284974 A CN 201010284974A CN 102401876 A CN102401876 A CN 102401876A
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Abstract
The invention is applicable to the field of testing, and provides a testing system and a testing method for an optoelectronic integrated circuit chip. The testing system comprises a master control unit, an integrated circuit tester, an MCU (micro-control unit) with a hardware I2C (inter-integrated circuit) bus or SM (system management) bus protocol module, and a probe card holding a peripheral circuit of a chip to be tested. The master control unit is connected with the integrated circuit tester, the probe card and the MCU, the MCU is connected with the probe card, and the integrated circuit tester is used for testing direct current parameters of the chip to be tested. When the testing system and the testing method are used for testing functions of optoelectronic integrated circuits, the MCU with the hardware I2C or SM bus protocol is used for testing functions of the chip, and accordingly testing time for the chip can be shortened effectively, testing stability can be enhanced, and overall testing cost is reduced.
Description
Technical field
The invention belongs to the circuit test field, relate in particular to a kind of test macro and method of testing of integrated optoelectronic circuit chip.
Background technology
Integrated optoelectronic circuit is a kind of optical sensor to be integrated in the integrated circuit on the semi-conductor silicon chip, is characterized in the optical analogy amount signal of input is directly changed into digital quantity signal output, makes integrated level higher, and stability is better.The digital output signal of such chip adopts the mode of serial bus protocol more, like internal integrated circuit (Inter-Integrated Circuit, I
2C) bus, System Management Bus (System ManagementBus, SMBuS) etc.Method of testing and conventional test methods for this adhesive integrated circuit chip are different, wherein are mainly reflected in the test to chip functions.Traditional chip functions method of testing is that the use test system applies excitation for the chip that needs to test through the mode of operation PATTERN, and through detecting its function corresponding, output PATTERN judges the quality of chip to be measured.
The integrated optoelectronic circuit chip then must carry out software simulation I with PATTERN if adopt traditional mode to carry out functional test
2C agreement or SMBuS agreement are tested its function, make function PATTERN become quite tediously long like this, have not only increased the test duration of chip, and have reduced the stability of test.
Summary of the invention
The purpose of the embodiment of the invention is to provide a kind of test macro of integrated optoelectronic circuit chip, and the test duration of being intended to solve prior art testing photoelectronic IC chip is long, the test problem of unstable.
The embodiment of the invention is achieved in that a kind of test macro of integrated optoelectronic circuit chip, and said system comprises:
Main control system, integrated circuit tester, have hardware internal integrate circuit bus I
2The microprocessor MCU of C or System Management Bus SMBuS protocol module, carry the probe Prober Card of the peripheral circuit of chip to be tested;
Said main control system is connected with integrated circuit tester, Prober Card, MCU; The logic function parameter that is used to send chip to be tested is given MCU, also is used to receive logic function test result that MCU sends and judges the quality of the logic function of chip to be tested according to the logic function test result that receives;
Said MCU is connected with Prober Card, is used to test the logic function of chip to be tested;
Said integrated circuit tester is used to test the dc parameter of chip to be tested.
Another purpose of the embodiment of the invention is to provide the method for testing of the test macro that utilizes above-mentioned integrated optoelectronic circuit chip, and said method comprises:
Main control system sends the logic function parameter of chip to be tested and gives MCU;
Main control system receives said MCU and tests the logic function test result of sending after the logic function of chip to be tested;
Main control system is judged the quality of chip logic function to be tested according to described logic function test result;
Integrated circuit tester is tested the dc parameter of chip to be tested.
The embodiment of the invention adopts to have Hardware I to the chip testing of photoelectricity adhesive integrated circuit the time
2The microprocessor of C or SMBuS agreement is realized the test to chip functions, can effectively shorten the test duration of chip, strengthens the stability of test, reduces testing cost on the whole.
Description of drawings
Fig. 1 is the structural drawing of the test macro of the integrated optoelectronic circuit chip that provides of the embodiment of the invention;
Fig. 2 is the method for testing process flow diagram of the integrated optoelectronic circuit chip that provides of the embodiment of the invention;
Embodiment
In order to make the object of the invention, technical scheme and advantage clearer,, the present invention is further elaborated below in conjunction with accompanying drawing and embodiment.Should be appreciated that specific embodiment described herein only in order to explanation the present invention, and be not used in qualification the present invention.
The embodiment of the invention adopts and has Hardware I
2The microprocessor of C or SMBuS agreement is realized the test to chip functions, can effectively shorten the test duration of chip, strengthens the stability of test, reduces testing cost on the whole.
The invention provides a kind of test macro and method of testing of integrated optoelectronic circuit chip:
Said system comprises: main control system, integrated circuit tester, have hardware internal integrate circuit bus I
2The microprocessor MCU of C or System Management Bus SMBuS protocol module, carry the probe Prober Card of the peripheral circuit of chip to be tested;
Said main control system is connected with integrated circuit tester, Prober Card, MCU; The logic function parameter that is used to send chip to be tested is given MCU, also is used to receive logic function test result that MCU sends and judges the quality of the logic function of chip to be tested according to the logic function test result that receives;
Said MCU is connected with Prober Card, is used to test the logic function of chip to be tested;
Said integrated circuit tester is used to test the dc parameter of chip to be tested.
Said method comprises: main control system sends the logic function parameter of chip to be tested and gives MCU;
Main control system receives said MCU and tests the logic function test result of sending after the logic function of chip to be tested;
Main control system is judged the quality of chip logic function to be tested according to described logic function test result;
Integrated circuit tester is tested the dc parameter of chip to be tested.
Embodiment one:
Fig. 1 shows the structure of the test macro of the integrated optoelectronic circuit chip that the embodiment of the invention provides, and details are as follows:
The test macro of this integrated optoelectronic circuit comprises: main control system 11, integrated circuit tester 12, have hardware internal integrate circuit bus I
2The microprocessor of C or System Management Bus SMBuS protocol module (MicroControl Unit, MCU) 13, carry the probe ProberCard14 of the peripheral circuit of chip to be tested.
MCU13 is connected with Prober Card14, is used to test the logic function of chip to be tested, like read-write of the register of test chip etc.Wherein, MCU13 has serial port module and Hardware I
2C or SMBuS protocol module.
In whole test system; Main control system 11 mainly is for other equipment services and applications to be provided; Control the testing process of chip to be tested; According to the difference of chip parameter to be tested, coordinate integrated circuit tester 12 by the application program of main control system 11 and carry out the test of chip correlation parameter with MCU13.
In the embodiment of the invention, when the logic function of test chip to be tested, adopt to have Hardware I
2The MCU of C or SMBuS protocol module realizes, because protocol module belongs to Hardware configuration, so can strengthen the stability of test, reduces testing cost on the whole, accelerates the Time To Market of product.
Embodiment two:
In an embodiment of the present invention; Main control system 11 is in order to preserve the logic function test result of the chip to be tested that receives; Perhaps preserve the judged result after 11 pairs of these test results of main control system are made judgement; A storage unit can be set in main control system 11, be used for stored logic functional test results or judged result.
Since cell stores the MCU logic function test result of sending or this test result made the judged result after the judgement, when use above-mentioned test result or judged result next time, can from main control system 11, extract easily.
Embodiment three:
In embodiments of the present invention, at first, main control system 11 sends to connected MCU13 with the logic function parameter of chip to be tested mode through the RS-232 serial ports.Then, MCU13 passes through I according to the logic function parameter that receives
2C or SMBuS protocol function realize treating the interrelated logic functional test of test chip, and be last, again the object information of test sent to main control system 11 with the mode of RS-232 serial ports.
In addition, main control system 11 is connected with Prober Card14 through RS-232 interface, and control ProberCard14 accomplishes the testing process of entire chip.
Embodiment four:
As one embodiment of the present of invention,, when MCU13 tests the logic function of chip to be tested, need the auxiliary of integrated circuit tester 12 when the test macro of operation integrated optoelectronic circuit chip.
Integrated circuit tester and main control system 11 use Peripheral Component Interconnect standard (PeripheralComponent Interconnect; PCI) connect communication; Mainly treat the be correlated with test of dc parameter of test chip, in addition, also auxiliary MCU carries out the test of logic function to chip to be measured; As certain WV being provided, repairing phase modulation and close fuse bit etc. for chip to be tested.
Embodiment five:
As one embodiment of the present of invention, MCU13 adopts the ATmega128 chip of Atmel company as control chip.
MCU13 adopts I
2The C interface mode links to each other with chip to be measured, links to each other with main control system 11 through serial port chip MAX3232 with RS-232 interface simultaneously, realizes the connection of total system.MCU13 the main effect here is exactly to carry out I
2Conversion between C agreement and the RS-232, because the WV of this integrated optoelectronic circuit chip is 3V, for guaranteeing the consistance of voltage, MCU13 here and related peripheral IC all adopt the 3V power supply.
ATmega128 is 8 Low-Power CMOS microprocessors based on the AVR risc architecture.Because its advanced instruction set and one-cycle instruction execution time, the data throughput of ATmega128 is up to 1MIPS/MHz, thereby can extenuate the contradiction between system power dissipation and the processing speed.
Embodiment six:
As one embodiment of the present of invention, the test macro of this integrated optoelectronic circuit chip also comprises corresponding mechanical component, like the test probe platform, and optical sensor fixation kit etc.
Wherein, the test probe platform is connected with main control system 11 with RS-232 interface, is used for realization and moves associated mechanical actions such as perhaps switching chip die.
Wherein, the optical sensor fixation kit is used at test process locking chip to be tested, and for it photosignal of conformance to standard is provided.This is because the integrated optoelectronic circuit chip needs the external auxiliary optical sensor in test process, therefore when producing in batches, should guarantee the consistance of the physical location of optical sensor to greatest extent.This optical sensor fixation kit adopts special-purpose mechanical component mechanism, and this special-purpose mechanical component mechanism can adopt unified processing and manufacturing.
Test probe platform in the embodiment of the invention can be realized moving or switch associated mechanical action such as chip die; And the optical sensor fixation kit, the integrated optoelectronic circuit chip that lockable need be tested effectively improves testing efficiency.
Embodiment seven:
Fig. 2 shows that the embodiment of the invention provides, the flow process of the method for testing of integrated optoelectronic circuit chip, and details are as follows:
In step S201, main control system sends the logic function parameter of chip to be tested and gives MCU;
In step S202, main control system receives said MCU and tests the logic function test result of sending after the logic function of chip to be tested;
In step S203, main control system is judged the quality of the logic function of chip to be tested according to said logic function test result;
In step S204, integrated circuit tester is tested the dc parameter of chip to be tested.
In addition, (PeripheralComponent Interconnect, PCI) agreement sticks into row communication to integrated circuit tester 12, mainly tests the relevant DC coefficient of chip to be tested with main control system 11 use Peripheral Component Interconnect standards.
In embodiments of the present invention, corresponding software control comprises the tester program language that main control system uses, like the C language, and the MCU control program.
In the embodiment of the invention, when the logic function of test chip, adopt to have serial port module and I
2The MCU of C or SMBuS protocol module realizes, because protocol module belongs to Hardware configuration, so can strengthen the stability of test, shortens the test duration of chip, has reduced testing cost on the whole.
Embodiment eight:
In the embodiment of the invention, treat the logic function of test chip for completion and test, also should be chip to be tested WV is provided, repair phase modulation and close fuse bit etc.
In addition; Because the integrated optoelectronic circuit chip needs the external auxiliary optical sensor in test process; So when producing in batches, should guarantee the consistance of optical sensor physical location, as increase an optical sensor fixation kit; Be used to lock integrated optoelectronic circuit chip to be tested, and the photosignal of conformance to standard be provided for it.
The embodiment of the invention; To the functional test of photoelectricity adhesive integrated circuit the time, adopt the MCU that has hardware serial bus protocol module to realize test to chip functions, can shorten the test duration of chip greatly; And because protocol module belongs to Hardware configuration; So can strengthen the stability of test, reduce testing cost on the whole, and accelerate time to market (TTM).
The above is merely preferred embodiment of the present invention, not in order to restriction the present invention, all any modifications of within spirit of the present invention and principle, being done, is equal to and replaces and improvement etc., all should be included within protection scope of the present invention.
Claims (10)
1. the test macro of an integrated optoelectronic circuit chip is characterized in that, said system comprises:
Main control system, integrated circuit tester, have hardware internal integrate circuit bus I
2The microprocessor MCU of C or System Management Bus SMBuS protocol module, carry the probe Prober Card of the peripheral circuit of chip to be tested;
Said main control system is connected with integrated circuit tester, Prober Card, MCU; The logic function parameter that is used to send chip to be tested is given MCU, also is used to receive logic function test result that MCU sends and judges the quality of the logic function of chip to be tested according to the logic function test result that receives;
Said MCU is connected with Prober Card, is used to test the logic function of chip to be tested;
Said integrated circuit tester is used to test the dc parameter of chip to be tested.
2. the test macro of integrated optoelectronic circuit as claimed in claim 1 is characterized in that, said main control system also comprises:
Storage unit is used to store said logic function test result or judged result.
3. the test macro of integrated optoelectronic circuit as claimed in claim 1 is characterized in that, said main control system all connects MCU and Prober Card with RS-232 interface.
4. the test macro of integrated optoelectronic circuit as claimed in claim 1 is characterized in that, said integrated circuit tester is that chip to be tested provides WV, repaiies the accent fuse bit.
5. the test macro of integrated optoelectronic circuit as claimed in claim 1 is characterized in that, said system comprises:
Said MCU adopts the MEGA128 singlechip chip.
6. the test macro of integrated optoelectronic circuit as claimed in claim 1 is characterized in that, said system comprises:
Mechanical component, said mechanical component comprise a test probe platform, and said test probe platform is connected with main control system, are used for realizing moving or switching chip die.
7. the test macro of integrated optoelectronic circuit as claimed in claim 6 is characterized in that, said mechanical component comprises:
The optical sensor fixation kit is used at test process locking chip to be tested.
8. utilize the method for testing of the test macro of the described integrated optoelectronic circuit of claim 1, it is characterized in that, said method comprises:
Main control system sends the logic function parameter of chip to be tested and gives MCU;
Main control system receives said MCU and tests the logic function test result of sending after the logic function of chip to be tested;
Main control system is judged the quality of chip logic function to be tested according to described logic function test result;
Integrated circuit tester is tested the dc parameter of chip to be tested.
9. the method for testing of the test macro of integrated optoelectronic circuit as claimed in claim 8 is characterized in that, said method also comprises step:
Integrated circuit tester is that chip to be tested provides WV, repaiies the accent fuse bit.
10. the method for testing of the test macro of integrated optoelectronic circuit as claimed in claim 9 is characterized in that, said method further comprises step:
Lock chip to be tested.
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| CN201010284974.9A CN102401876B (en) | 2010-09-17 | 2010-09-17 | Testing system and testing method for optoelectronic integrated circuit chip |
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Cited By (7)
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| CN103064012A (en) * | 2012-12-31 | 2013-04-24 | 深圳安博电子有限公司 | Chip detector for digital electronic watches |
| CN104977483A (en) * | 2014-04-14 | 2015-10-14 | 吕俊毅 | Test apparatus, test system, and test method |
| CN106093755A (en) * | 2016-08-12 | 2016-11-09 | 上海宝司芯微电子有限公司 | Circuit and power management chip are tested in trimming of a kind of power management chip |
| CN107677951A (en) * | 2017-08-29 | 2018-02-09 | 深圳市江波龙电子有限公司 | Die test devices and method |
| CN108920334A (en) * | 2018-07-25 | 2018-11-30 | 郑州云海信息技术有限公司 | A kind of monitoring device of FPGA isomery accelerator card |
| CN111985179A (en) * | 2020-08-26 | 2020-11-24 | 上海磐启微电子有限公司 | Design verification system and method for wireless communication chip |
| WO2021042706A1 (en) * | 2019-09-02 | 2021-03-11 | 芯创智（北京）微电子有限公司 | Digital logic automatic test device and method |
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| Publication number | Priority date | Publication date | Assignee | Title |
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| CN103064012A (en) * | 2012-12-31 | 2013-04-24 | 深圳安博电子有限公司 | Chip detector for digital electronic watches |
| CN104977483A (en) * | 2014-04-14 | 2015-10-14 | 吕俊毅 | Test apparatus, test system, and test method |
| CN106093755A (en) * | 2016-08-12 | 2016-11-09 | 上海宝司芯微电子有限公司 | Circuit and power management chip are tested in trimming of a kind of power management chip |
| CN107677951A (en) * | 2017-08-29 | 2018-02-09 | 深圳市江波龙电子有限公司 | Die test devices and method |
| CN107677951B (en) * | 2017-08-29 | 2019-12-06 | 深圳市江波龙电子股份有限公司 | Die testing device and method |
| CN108920334A (en) * | 2018-07-25 | 2018-11-30 | 郑州云海信息技术有限公司 | A kind of monitoring device of FPGA isomery accelerator card |
| WO2021042706A1 (en) * | 2019-09-02 | 2021-03-11 | 芯创智（北京）微电子有限公司 | Digital logic automatic test device and method |
| CN111985179A (en) * | 2020-08-26 | 2020-11-24 | 上海磐启微电子有限公司 | Design verification system and method for wireless communication chip |
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| CN102401876B (en) | 2014-02-12 |
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Address after: 518000 1st, 5th and 6th floors of No. 1 workshop, No. 28 Qingfeng Avenue, Baolong Street, Longgang District, Shenzhen City, Guangdong Province Patentee after: Shenzhen mifitech Technology Co.,Ltd. Address before: 518000 1st, 5th and 6th floors of No. 1 workshop, No. 28 Qingfeng Avenue, Baolong Street, Longgang District, Shenzhen City, Guangdong Province Patentee before: Shenzhen Mifeitake Technology Co.,Ltd. |
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