CN102394566B - Gilbert cell mixer with automatic optimal bias and harmonic wave control - Google Patents
Gilbert cell mixer with automatic optimal bias and harmonic wave control Download PDFInfo
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- CN102394566B CN102394566B CN201110275135.5A CN201110275135A CN102394566B CN 102394566 B CN102394566 B CN 102394566B CN 201110275135 A CN201110275135 A CN 201110275135A CN 102394566 B CN102394566 B CN 102394566B
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Abstract
The invention, which belongs to the radio frequency integrated circuit design technology field, more particularly relates to a Gilbert cell mixer with automatic optimal bias and harmonic wave control. The mixer comprises a basic Gilbert frequency mixing unit, an optimal bias circuit and a harmonic wave control circuit. The Gilbert frequency mixing unit consists of a transconductance level, a switch level, and a load level. The optimal bias circuit includes duplication or reduction with a same proportion of a transconductance-level device of the Gilbert frequency mixing unit, a resistor chain, and operational amplifiers, wherein weak currents flow through the resistor chain and the operational amplifiers form two feedback loops. A middle point of the resistor chain in the optimal bias circuit provides a direct current bias for a transconductance tube in the Gilbert frequency mixing unit. And the harmonic wave control circuit is composed of an adjustable active inductance and a harmonic wave control capacitor; and the harmonic wave control circuit is connected to a drain terminal of the transconductance tube of the Gilbert frequency mixing unit. According to the invention, accuracy of a generated optimal bias is optimized; and a secondary harmonic wave feedback effect is overcome. Besides, the Gilbert cell mixer with automatic optimal bias and harmonic wave control is suitable for application to a wireless communication transceiver circuit needing an active mixer with high linearity.
Description
Technical field
The invention belongs to radio frequency integrated circuit design field, be specifically related to a kind of high linearity gilbert mixer with improved automatic optimum biasing and the control of adjustable active inductance harmonic wave.
Background technology
Frequency mixer is one of basic module in radio frequency integrated circuit.In transceiver circuit, frequency mixer is realized frequency translation.Compare with passive frequency mixer, active mixer can provide conversion gain further to suppress the noise of late-class circuit.Gilbert's mixing unit can provide the isolation between good radio-frequency head and local oscillator end.Therefore, the active mixer based on gilbert's mixing unit is widely used.
Fig. 1 is classical gilbert's mixing unit, comprises the first and second NMOS pipes as transconductance stage
nM1-NM2, as the 3rd to the 6th NMOS pipe of switching stage
nM3-
nM6, as the first and second load resistances of load stage
r l1 -
r l2 and first to the 4th biasing resistor
r b1 -
r b4 , the first to the 4th ac coupling capacitor
c c1 -
c c4 .Input radio frequency voltage signal is converted to electric current by transconductance stage; Then, switching stage is realized frequency inverted by current switching; Finally, load stage realizes the conversion of electric current to voltage.Tired being stacked between VDD-to-VSS of transconductance stage, switching stage and load stage in gilbert's mixing unit.Along with the continuous progress of technique, supply voltage constantly reduces, and this stacked structure of gilbert's mixing unit is unfavorable for its linearity performance.But radio-frequency transceiver system often has higher linearity index request to frequency mixer.Therefore, be necessary classical gilbert's mixing unit to improve to optimize its linearity performance.
Summary of the invention
Technical problem to be solved by this invention is to provide a kind of high linearity gilbert mixer, can be applied in frequency mixer is had in the transceiver system of higher line degree requirement.
High linearity gilbert mixer provided by the invention, comprises basic gilbert's mixing unit, optimum biasing circuit and harmonic wave control circuit.Wherein, described gilbert's mixing unit mainly comprises transconductance stage, switching stage and load stage.Input radio frequency voltage signal is converted to electric current by transconductance stage; Then, switching stage is realized frequency translation by current switching; Finally, load stage realizes the conversion of electric current to voltage.Described optimum biasing circuit mainly comprises copying of gilbert's mixing unit transconductance stage device or dwindles in proportion, flows through the resistance chain of Weak current and the operational amplifier of two feedback control loops of formation.In optimum biasing circuit, the mid point of resistance chain provides the direct current biasing of mutual conductance pipe in gilbert's mixing unit.Described harmonic wave control circuit is made up of adjustable active inductance and harmonic wave control capacitance, and this harmonic wave control circuit is connected to gilbert's mixing unit mutual conductance pipe drain terminal.
Switching stage device in gilbert's mixing unit is operated on off state, and load stage can be selected passive component, and therefore, switching stage and load stage are not all main non-linear sources.For the transconductance stage as main non-linear source, the present invention is optimized its linearity.Comprehensive low frequency and high frequency two aspects are considered, the present invention proposes automatic optimum biasing circuit and harmonic wave control circuit.
For low frequency characteristic, the optimum biasing circuit in the present invention can be by the mutual conductance pipe automatic bias in gilbert's mixing unit the position at three rank mutual conductance non linear coefficient zero crossings.By introducing feedback control loop, to make to copy in optimum biasing circuit mutual conductance pipe identical with the drain-source voltage of mutual conductance pipe in mixing unit in the present invention, optimized institute and produced the accuracy of setovering.
The impact of second harmonic feedback effect during for high frequency on linearity performance, the twice signal frequency series resonance network of mixing unit mutual conductance pipe drain terminal is realized harmonic wave control.The present invention adopts the series resonance network based on adjustable active inductance.Compare with traditional employing on-chip spiral inductor and the scheme of bond-wire inductor, the present invention not only economizes area but also stalwartness.
Accompanying drawing explanation
Fig. 1 is classical gilbert's mixing element circuit figure.
Fig. 2 is drain-source voltage 300mV, single order, second order and three rank mutual conductance non linear coefficients when different gate source voltage.
Fig. 3 is that drain-source voltage is respectively 300mV and 800mV, three rank mutual conductance non linear coefficient comparisons when different gate source voltage.
Fig. 4 is circuit diagram of the present invention.
Fig. 5 is that the one of adjustable active inductance in the present invention realizes.
Embodiment
First in conjunction with circuit of the present invention, the theory of the linearity is analyzed.
As previously mentioned, transconductance stage is the main non-linear source of gilbert's mixing unit, and we will analyze its nonlinear characteristic.Experiment sample is the NMOS pipe that is of a size of 60 μ m × 0.13 μ m under 0.13 μ m CMOS technique.It should be noted that the present invention extends to the CMOS technique of other characteristic sizes.
Under general work condition, non-linear mainly non-linear from its mutual conductance of mutual conductance pipe in gilbert's mixing unit.The leakage current of mutual conductance pipe can be by the non-linear Taylor expansion of carrying out of mutual conductance, shown in (1).
(1)
Wherein,
i dC for DC bias current,
g m (n) for the n rank expansion coefficient of non-linear mutual conductance,
v gs for grid source small signal.
When Fig. 2 has provided drain-source voltage and has been 300mV, single order, second order and three rank mutual conductance non linear coefficient simulation results that different gate source voltages are corresponding.Take into account the needs that the supply voltage of experiment sample technique 1.2V and mutual conductance pipe are operated in saturation region, drain-source voltage is taken as 300mV.
Three rank mutual conductances are non-linear can directly produce third-order non-linear product.As can be seen from Figure 2, although the value of three rank mutual conductance non linear coefficients can be very large in some bias voltage positions, grid source, there is a zero crossing in it.If mutual conductance pipe is biased in to this zero crossing position, will be very little by the third-order non-linear product of the non-linear direct generation of three rank mutual conductances.This position is known as " optimum biasing ".It should be noted that the value of grid source bias voltage corresponding to optimum biasing is also subject to the impact of drain-source voltage.Even if for the device that is operated in saturation region, this impact still exists, and this effect is more remarkable under deep-submicron CMOS process.Fig. 3 has provided drain-source voltage and has been respectively in the situation of 300mV and 800mV, three rank mutual conductance non linear coefficient simulation results when the bias voltage of different grid source.As can be seen from Figure 3, the optimum offset position difference in two kinds of drain-source voltage situations.And because near three rank mutual conductance non linear coefficients slope optimum biasing is larger, change comparatively fast, the optimum biasing for a certain drain-source voltage, in another drain-source voltage situation, three corresponding rank mutual conductance non linear coefficients can be larger.
Low frequency characteristic has only been considered in above nonlinear analysis, and in the time that operating frequency is higher, even if for the device that is accurately biased in optimum biasing place, if do not adopt other technologies means, its linearity will be subject to the restriction of second harmonic feedback effect.As can be seen from Figure 2, in optimum biasing place, three rank mutual conductance non linear coefficients are zero; But second order mutual conductance non linear coefficient now reaches its maximum.Can not directly produce third-order non-linear product although second order mutual conductance is non-linear, but in the time of high frequency, the second nonlinear product of its generation can arrive grid end by gate leakage capacitance feedthrough, and mixes with input signal, finally under second order mutual conductance nonlinear interaction, indirectly produces third-order non-linear product.For example, incoming frequency is respectively
f 1 with
f 2 two-tone signal, second nonlinear product will be positioned at
2f 1 with
2f 2 place, when their feedthroughs are to input, and cumulative with input signal, finally under second order mutual conductance nonlinear interaction, can produce third-order non-linear product |
2f 2 -
f 1 | and |
2f 1 -
f 2 |.Because the second nonlinear product phase place of differential input end is identical, the third-order non-linear product finally producing due to second harmonic feedback effect will be difference.
By based on the theory analysis of low frequency and high frequency linearity degree above, working mechanism and feature to circuit of the present invention are described in further detail below.
Fig. 4 has provided circuit diagram of the present invention, comprises basic gilbert's mixing unit, automatic optimum biasing circuit and harmonic wave control circuit.Gilbert's mixing unit comprises the first to the 6th NMOS pipe
nM1-
nM6, the first and second load resistances
r l1 -
r l2 , the first to the 4th biasing resistor
r b1 -
r b4 with the first to the 4th ac coupling capacitor
c c1 -
c c4 ; Automatic optimum biasing circuit comprises the 7th to the tenth NMOS pipe
nM7-
nM10, the first and second PMOS pipes
pM1-
pM2, the first and second current sources
i1-
i2,the first to the 4th resistance
r1-
r4, the first and second large resistance
r big1 -
r big2 and first and second operational amplifier
oPA1-
oPA2; Harmonic wave control circuit comprises adjustable active inductance
l tAI and the first and second harmonic wave control capacitance
c hc1 -
c hc2 .
The first and second NMOS pipes in gilbert's mixing unit
nM1,
nM2source ground connection, a NMOS pipe
nM1drain terminal connects the third and fourth NMOS pipe
nM3,
nM4source, the 2nd NMOS pipe
nM2drain terminal connects the 5th and the 6th NMOS pipe
nM5,
nM6source; The the 3rd and the 5th NMOS pipe
nM3,
nM5drain terminal be connected and through the first load resistance
r l1 be connected to power supply, the 4th and the 6th NMOS pipe
nM4,
nM6drain terminal be connected and through the second load resistance
r l2 be connected to power supply.The first and second current sources in optimum biasing circuit
i1,
i2weak current flow through by the first to the 4th resistance
r1-
r4the resistance chain forming, resistance chain mid point is connected to the direct current biasing point of gilbert's mixing unit mutual conductance pipe; The the 7th to the tenth NMOS pipe
nM7-
nM10source ground connection, grid end is connected to the node in above-mentioned resistance chain successively, the 7th and the 9th NMOS pipe
nM7,
nM9drain terminal and PMOS pipe
pM1drain terminal be connected, the 8th and the tenth NMOS pipe
nM8,
nM10drain terminal and the 2nd PMOS pipe
pM2drain terminal be connected; The first and second PMOS pipes
pM1,
pM2source termination power, and form current mirror; The first operational amplifier
oPA1positive-negative input end receive respectively the 2nd PMOS pipe
pM2with a PMOS pipe
pM1drain terminal, output is received the 7th NMOS pipe
nM7grid end; The second operational amplifier
oPA2positive input terminal receive a PMOS pipe
pM1drain terminal, negative input end is received by the first and second large resistance
r big1 ,
r big2 the gilbert's mixing unit mutual conductance pipe drain terminal voltage collecting, output is received the first and second PMOS pipes
pM1,
pM2grid end.Harmonic wave control circuit the first and second harmonic wave control capacitances
c hc1 ,
c hc2 be connected to gilbert's mixing unit mutual conductance pipe drain terminal, its mid point is through adjustable active inductance
l tAI ground connection.
Can obtain the mathematic(al) representation of three rank mutual conductance non linear coefficients through following mathematical derivation:
(2)
(3)
(4)
Find optimum biasing, also find and can make the grid source bias voltage that formula (4) molecule is zero
v gS .
In the circuit of the present invention shown in Fig. 4, automatic optimum biasing circuit comprises the 7th to the tenth NMOS pipe
nM7-
nM10, the first and second PMOS pipes
pM1-
pM2, the first and second current sources
i1-
i2,the first to the 4th resistance
r1-
r4, the first and second large resistance
r big1 -
r big2 and first and second operational amplifier
oPA1-
oPA2.Weak current flows through by the first to the 4th resistance
r1-
r4the resistance chain forming, the first to the 4th resistance
r1-
r4resistance value ratio as shown in FIG..Like this, making the midpoint of resistance chain is bias voltage
v gS , four bias voltages of other node locations of resistance chain in can production (4) molecule, are also
v gS + 3 V/2,
v gS + V/2,
v gS -V/2with
v gS -3 V/2.
The the 7th to the tenth NMOS pipe
nM7-
nM10for the first and second NMOS pipes of mutual conductance pipe in gilbert's mixing unit
nM1,
nM2copy or dwindle in proportion.Corresponding to every proportionality coefficient in aforesaid four bias voltages and formula (4) molecule, the 7th to the tenth NMOS pipe
nM7-
nM10breadth length ratio mark as Fig. 4.Like this, the 7th NMOS pipe
nM7, the 9th NMOS pipe
nM9, the 8th NMOS pipe
nM8with the tenth NMOS pipe
nM10in production (4) molecule four successively.
The 7th NMOS pipe
nM7with the 9th NMOS pipe
nM9drain terminal connect together, correspond in formula (4) molecule the electric current summation of first two.The 8th NMOS pipe
nM8with the tenth NMOS pipe
nM10drain terminal also connect together, correspond in formula (4) molecule the electric current summation of latter two.There are the first and second PMOS pipes of same size
pM1,
pM2form current mirror.When the first and second PMOS pipes
pM1,
pM2drain terminal voltage when identical, their leakage current is identical, also i.e. the 7th NMOS pipe
nM7with the 9th NMOS pipe
nM9leakage current sum and the 8th NMOS pipe
nM8with the tenth NMOS pipe
nM10leakage current sum is identical.Now, the molecular moiety of formula (4) is zero, and the midpoint voltage of resistance chain is optimum biasing.In the circuit shown in Fig. 4,
oPA1the feedback control loop of composition can make the first and second PMOS pipes
pM1,
pM2drain terminal voltage identical.
Theory analysis above points out, the value of optimum biasing place grid source bias voltage is also subject to the impact of drain-source voltage.In the circuit shown in Fig. 4, mutual conductance pipe the first and second NMOS pipes in gilbert's mixing unit
nM1,
nM2drain terminal voltage by the first and second large resistance
r big1 ,
r big2 gather the second operational amplifier
oPA2the feedback control loop forming can make the 7th to the tenth NMOS pipe in its value and optimum biasing circuit
nM7-
nM10drain terminal voltage identical.Like this, resistance chain midpoint voltage is not only for the 7th to the tenth NMOS pipe
nM7-
nM10optimum biasing, for the first and second NMOS pipes
nM1,
nM2optimum biasing equally.
So far, the mutual conductance pipe in gilbert's mixing unit can accurately be biased in three rank mutual conductance non linear coefficient zero crossing positions by improved automatic optimum biasing circuit in the present invention, has met the needs of low frequency linearity optimization.
Linearity performance when improving high frequency, the circuit shown in Fig. 4 adopts the harmonic wave control circuit based on adjustable active inductance to suppress second harmonic feedback effect.
Can find out the feedthrough that second harmonic feedback effect comes from second nonlinear product and arrives grid end by gate leakage capacitance from high frequency linearity degree theory analysis above.Harmonic wave control technology is passed through to introduce the series resonance network of resonance in twice signal frequency at device drain terminal, the second harmonic low impedance path that provides drain terminal to arrive ground, thus alleviate the impact of second harmonic feedback effect on linearity performance.
Traditional harmonic wave control circuit is realized based on on-chip spiral inductor or bond-wire inductor.The former takies larger chip area; The latter is easy to be subject to the impact of bonding line process deviation.Circuit as shown in Figure 4, the harmonic wave control circuit in the present invention is realized based on adjustable active inductance, comprises adjustable active inductance
l tAI and the first and second harmonic wave control capacitance
c hc1 ,
c hc2 .With traditional scheme comparison, not only economize area, and also healthy and strong.
Fig. 5 has provided a kind of specific implementation of adjustable active inductance in Fig. 4, comprises the 11 to the 15 NMOS pipe
nM11-
nM15, the 3rd to the 5th current source
i3-
i5, the 5th resistance
r 5 with the 5th biasing resistor
r b5 .Active inductance in Fig. 5 is realized based on convolution capacitance structure, and adopts adjustable cascade technology to improve effective perceptual frequency range.Managed by the 15 NMOS by regulating
nM15with the 5th resistance
r 5 the in parallel feedback resistance size forming, can realize sense value to active inductance and the adjusting of quality factor, thereby overcomes the impact of process deviation and temperature.The present invention includes but be not limited to adjustable active inductance circuit implementation as shown in Figure 5.
Claims (1)
1. a gilbert mixer circuit, comprises basic gilbert's mixing unit, optimum biasing circuit and harmonic wave control circuit; Wherein, described gilbert's mixing unit comprises transconductance stage, switching stage and load stage; Input radio frequency voltage signal is converted to electric current by transconductance stage; Then, switching stage is realized frequency translation by current switching; Finally, load stage realizes the conversion of electric current to voltage; Described optimum biasing circuit comprises copying of gilbert's mixing unit transconductance stage device or dwindles in proportion, flows through the resistance chain of Weak current and the operational amplifier of two feedback control loops of formation; In optimum biasing circuit, the mid point of resistance chain provides the direct current biasing of mutual conductance pipe in gilbert's mixing unit; Described harmonic wave control circuit is made up of adjustable active inductance and harmonic wave control capacitance, and this harmonic wave control circuit is connected to gilbert's mixing unit mutual conductance pipe drain terminal;
Described optimum biasing circuit is the position at three rank mutual conductance non linear coefficient zero crossings by the mutual conductance pipe automatic bias in gilbert's mixing unit;
Harmonic wave control circuit is realized based on adjustable active inductance;
It is characterized in that, gilbert's mixing unit comprise the first to the 6th NMOS pipe (
nM1-
nM6), the first and second load resistances (
r l1 ,
r l2 ), the first to the 4th biasing resistor (
r b1 -
r b4 ) and the first to the 4th ac coupling capacitor (
c c1 -
c c4 ); Optimum biasing circuit comprise the 7th to the tenth NMOS pipe (
nM7-
nM10), the first and second PMOS pipes (
pM1,
pM2), the first and second current sources (
i1,
i2)
,the first to the 4th resistance (
r1-
r4), the first and second large resistance (
r big1 ,
r big2 ) and the first and second operational amplifiers (
oPA1,
oPA2); Harmonic wave control circuit comprises adjustable active inductance
l tAI and the first and second harmonic wave control capacitances (
c hc1 ,
c hc2 ); Wherein, the first and second NMOS pipes in gilbert's mixing unit (
nM1,
nM2) source ground connection, a NMOS pipe (
nM1) drain terminal connect the third and fourth NMOS pipe (
nM3,
nM4) source, the 2nd NMOS pipe (
nM2) drain terminal connect the 5th and the 6th NMOS pipe (
nM5,
nM6) source; The the 3rd and the 5th NMOS pipe (
nM3,
nM5) drain terminal be connected and through the first load resistance (
r l1 ) be connected to power supply, the 4th and the 6th NMOS pipe (
nM4,
nM6) drain terminal be connected and through the second load resistance (
r l2 ) connection power supply; The first and second current sources in optimum biasing circuit (
i1,
i2) Weak current flow through by the first to the 4th resistance (
r1-
r4) form resistance chain, resistance chain mid point is connected to the direct current biasing point of gilbert's mixing unit mutual conductance pipe; The the 7th to the tenth NMOS pipe (
nM7-
nM10) source ground connection, grid end connects the node in above-mentioned resistance chain successively, the 7th and the 9th NMOS pipe (
nM7,
nM9) drain terminal and PMOS pipe (
pM1) drain terminal be connected, the 8th and the tenth NMOS pipe (
nM8,
nM10) drain terminal and the 2nd PMOS pipe (
pM2) drain terminal be connected; The first and second PMOS pipes (
pM1,
pM2) source termination power, and form current mirror; The first operational amplifier (
oPA1) positive-negative input end connect respectively the 2nd PMOS pipe (
pM2) and PMOS pipe (
pM1) drain terminal, output termination the 7th NMOS pipe (
nM7) grid end; The second operational amplifier (
oPA2) positive input termination the one PMOS pipe (
pM1) drain terminal, negative input termination by the first and second large resistance (
r big1 ,
r big2 ) gilbert's mixing unit mutual conductance pipe drain terminal voltage of collecting, output termination the first and second PMOS pipes (
pM1,
pM2) grid end; The first and second harmonic wave control capacitances of harmonic wave control circuit (
c hc1 ,
c hc2 ) be connected to gilbert's mixing unit mutual conductance pipe drain terminal, its mid point through adjustable active inductance (
l tAI ) ground connection.
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| CN102394566A (en) | 2012-03-28 |
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