CN109444524A - A kind of primary side winding resonance trough sample circuit and the method for sampling - Google Patents
A kind of primary side winding resonance trough sample circuit and the method for sampling Download PDFInfo
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- CN109444524A CN109444524A CN201811157781.XA CN201811157781A CN109444524A CN 109444524 A CN109444524 A CN 109444524A CN 201811157781 A CN201811157781 A CN 201811157781A CN 109444524 A CN109444524 A CN 109444524A
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- G—PHYSICS
- G01—MEASURING; TESTING
- G01R—MEASURING ELECTRIC VARIABLES; MEASURING MAGNETIC VARIABLES
- G01R19/00—Arrangements for measuring currents or voltages or for indicating presence or sign thereof
- G01R19/25—Arrangements for measuring currents or voltages or for indicating presence or sign thereof using digital measurement techniques
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- H—ELECTRICITY
- H02—GENERATION; CONVERSION OR DISTRIBUTION OF ELECTRIC POWER
- H02M—APPARATUS FOR CONVERSION BETWEEN AC AND AC, BETWEEN AC AND DC, OR BETWEEN DC AND DC, AND FOR USE WITH MAINS OR SIMILAR POWER SUPPLY SYSTEMS; CONVERSION OF DC OR AC INPUT POWER INTO SURGE OUTPUT POWER; CONTROL OR REGULATION THEREOF
- H02M3/00—Conversion of dc power input into dc power output
- H02M3/22—Conversion of dc power input into dc power output with intermediate conversion into ac
- H02M3/24—Conversion of dc power input into dc power output with intermediate conversion into ac by static converters
- H02M3/28—Conversion of dc power input into dc power output with intermediate conversion into ac by static converters using discharge tubes with control electrode or semiconductor devices with control electrode to produce the intermediate ac
- H02M3/325—Conversion of dc power input into dc power output with intermediate conversion into ac by static converters using discharge tubes with control electrode or semiconductor devices with control electrode to produce the intermediate ac using devices of a triode or a transistor type requiring continuous application of a control signal
- H02M3/335—Conversion of dc power input into dc power output with intermediate conversion into ac by static converters using discharge tubes with control electrode or semiconductor devices with control electrode to produce the intermediate ac using devices of a triode or a transistor type requiring continuous application of a control signal using semiconductor devices only
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- Y02—TECHNOLOGIES OR APPLICATIONS FOR MITIGATION OR ADAPTATION AGAINST CLIMATE CHANGE
- Y02B—CLIMATE CHANGE MITIGATION TECHNOLOGIES RELATED TO BUILDINGS, e.g. HOUSING, HOUSE APPLIANCES OR RELATED END-USER APPLICATIONS
- Y02B70/00—Technologies for an efficient end-user side electric power management and consumption
- Y02B70/10—Technologies improving the efficiency by using switched-mode power supplies [SMPS], i.e. efficient power electronics conversion e.g. power factor correction or reduction of losses in power supplies or efficient standby modes
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Abstract
The present invention is suitable for flyback converter, especially suitable for the transformer primary side resonance trough sample circuit under quasi-resonance operating mode or discontinuous operating mode, when resonance potential resonance above and below input voltage vin of primary side winding, sample rate current relevant to resonance potential and input voltage vin difference is obtained by clamp circuit, the sample rate current passes through electric current piezoelectric voltage conversion circuit, obtain the sampled voltage in certain voltage domain, sampled voltage is using voltage domain conversion circuit, export trough sampled signal, and trough sampled signal and the same phase of resonance signal, i.e. resonance trough when trough sampled signal be low level, trough sampled signal is high level when resonance wave crest.It samples that the technical solution structure is simple, the resonance trough sampling of primary side winding can be completed, converter conduction loss is reduced, reduce the energy of electromagnetic interference, reduce the use of converter volume and discrete device, reduce cost.
Description
Technical field
The present invention relates to switch power technology fields, especially suitable for the transformer primary winding under quasi-continuous operation mode
Resonance trough sample circuit and the method for sampling.
Background technique
Now, what flyback topologies were applied in Switching Power Supply is extremely wide, the inexpensive power supply of especially 5~150W, this
It is simple to have benefited from flyback topologies structure, required device is few.And flyback transformer has the dual function of transformer and inductance, makes
Output inductor can be saved by obtaining flyback converter, and this point can reduce converter volume, reduce cost.
Circuit as shown in Figure 1 is the main power topology of flyback converter, VinFor the input voltage of flyback converter, Cin is
Input capacitance, N-MOS are main power switch tube, and Q is the gate drive signal of main power switch tube N-MOS, and T is transformer, are become
The depressor turn ratio is n, and the drain electrode of N-MOS is connected with transformer primary winding constitutes DRN node, and D is rectifier diode, and Co is output
Capacitor, RLFor load resistance, Vo is output voltage.Its basic working principle is: when master power switch pipe N-MOS is connected, becoming
Depressor primary side winding inductance excitation, storage energy, load current is only by output capacitance CoIt provides;Master power switch pipe N-MOS is cut
When only, the energy that primary side winding stores is transmitted to the load R on secondary side by transformerLWith output capacitance Co, with compensating electric capacity CoIndividually
The energy consumed when providing load current realizes pressure stabilizing output.If flyback converter works in DCM mode (Discontinuous
Conduction Mode, discontinuous conduction mode), 0 to switching tube N-MOS, which is crossed, in transformer secondary winding inductance electric current is connected
Period, primary side winding inductance can with primary side winding equivalent tank capacitor resonance, primary side winding equivalent tank capacitor include master
Source and drain parasitic capacitance, transformer primary side parasitic capacitance and the transformer secondary of power switch tube N-MOS reflects capacitor, and main power is opened
The drain D RN node voltage for closing pipe N-MOS is resonance potential.The characteristics of according to resonance, primary side master power switch pipe N-MOS's
The resonant voltage waveforms of drain D RN node are period constant convergent oscillation, and oscillation center value is equal to input voltage Vin.Trough is adopted
Sample circuit is exactly the circuit for sampling this DRN node resonance trough, after obtaining resonance trough signal, controls master power switch pipe N-
MOS conducting, the source-drain voltage of master power switch pipe N-MOS is small at this time, can greatly reduce the conducting of master power switch pipe N-MOS
Loss, while the energy of electromagnetic interference can be reduced again.
In existing trough sampling technique, auxiliary winding voltage waveform is detected usually to obtain trough signal, such as Fig. 2
It is shown.Np is transformer primary winding, and Naux is transformer auxiliary winding, and R1, R2 are divider resistance, and in resonance, Vaux is
With the convergent oscillation of primary side master power switch pipe N-MOS drain D RN node same frequency, but the oscillation center value of Vaux is common
Ground reference, it is believed that as resonance trough at the time of Vaux crosses 0.But this technical solution needs auxiliary winding, this will increase
The volume of transformer increases cost.And the converter for small size without auxiliary winding, such as need in transformer primary winding
Trough sampling is completed, this technical solution will be unable to reach this requirement.
Summary of the invention
In view of the difficulty of prior art primary side winding trough sampling, one of the technical problem to be solved in the present invention is to provide
A kind of circuit of transformer primary winding sampling harmonic peak voltage, accordingly, the present invention also provides a kind of transformer primary side around
The method of group sampling harmonic peak voltage allows and completes the same of primary side winding trough sampling using technical solution of the present invention
When, the reduction of reduction and converter cost for volume of transformer is obviously improved, and helps to reduce switching tube
Conduction loss, while the energy of electromagnetic interference can be reduced again.
The technical solution that the present invention solves above-mentioned first technical problem is as follows:
A kind of primary side winding resonance trough sample circuit is applied to flyback converter, it is characterised in that: including feedback resistance
RFB, clamp circuit 101, current-to-voltage converting circuit 102 and voltage domain conversion circuit 103;
Feedback resistance RFBOne end is used to connect the drain D RN node of the primary side master power switch pipe N-MOS of flyback converter;
101 first input end of clamp circuit is for the input terminal V with flyback converterinIt is connected, 101 second input terminal of clamp circuit and anti-
Feed resistance RFBThe other end, which is connected, constitutes feedback node FB, and 101 output end of clamp circuit is connected structure with current-to-voltage converting circuit 102
At sampled voltage VIOutput node, sampled voltage VIOutput node is also connected with the input terminal of voltage domain conversion circuit 103, voltage domain
The output end of conversion circuit 103 is for exporting trough sampled signal;
Clamp circuit 101 is used to the difference of two input terminal input voltage being converted to sample rate current IfbAnd it is defeated by its
Outlet output;Current-to-voltage converting circuit 102 is used for the sample rate current I that will be inputtedfbBe converted to sampled voltage VIAnd it exports to electricity
Press domain conversion circuit 103;Voltage domain conversion circuit 103 is for completing sampled voltage VIVoltage domain is to trough sampled signal Valley
The conversion of voltage domain simultaneously exports trough sampled signal by its output end, wherein sampled voltage VIFor analog voltage signal, voltage
Domain is limited, and maximum value is less than flyback converter control chip power voltage VCC, and (VCC is the high level electricity of digital logic signal
Pressure), trough sampled signal Valley is digital logic signal, and voltage domain is 0~VCC.
As a kind of specific embodiment of clamp circuit 101, including PMOS tube PM1, PM2 and PM3 and NMOS tube
NM1 and NM2;The source electrode of PMOS tube PM1 is the first input end of clamp circuit 101, the grid of grid and drain electrode and PMOS tube PM2
Pole, PMOS tube PM3 grid connected with the drain electrode of NMOS tube NM1;The source electrode of PMOS tube PM2 is the second defeated of clamp circuit 101
Enter end, drain electrode is connected with the grid of NMOS tube NM1, the grid of NMOS tube NM2 and drain electrode;The source electrode and feedback of PMOS tube PM3 saves
Point FB is connected with the source electrode of PMOS tube PM2, grid and the grid of PMOS tube PM2, the grid of PMOS tube PM1 and PMOS tube PM1
Drain electrode is connected, and drains as the output end of clamp circuit 101;The source electrode of NMOS tube NM1 and NMOS tube NM2 are connect with reference.
As a kind of specific embodiment of current-to-voltage converting circuit 102, including NMOS tube N102, clamp circuit
The sample rate current I of 101 outputsfbThe drain electrode of NMOS tube N102 is flowed into, and the grid of NMOS tube N102 and drain electrode are connected to form and adopt
Sample voltage VIOutput node, the source electrode of NMOS tube N102 are connected to public reference ground.
As a kind of specific embodiment of voltage domain conversion circuit 103, including NMOS tube N1, N2 and N3, PMOS tube
P1 and P2, bias current sources IB, Schmidt trigger 201, phase inverter 202 and 203;Bias current sources IBOne end and supply voltage
VCC is connected, and supply voltage VCC is the power supply of modules circuit, current source IBFlow into the drain electrode of NMOS tube N1, NMOS tube
The drain electrode of N1 is also connected with the grid of the grid of NMOS tube N1 and NMOS tube N2, the source electrode of NMOS tube N1 and NMOS tube N2 all with ginseng
It is connected with examining;The drain electrode of NMOS tube N2 is connected with the drain electrode of PMOS tube P1, grid of the drain electrode of PMOS tube P1 also with PMOS tube P1
It is connected with the grid of PMOS tube P2, the source electrode of PMOS tube P1 and PMOS tube P2 are all connected with supply voltage VCC;The leakage of PMOS tube P2
Pole is connected with the input terminal of the drain electrode of NMOS tube N3 and Schmidt trigger 201, and the source electrode of NMOS tube N3 is connected with reference to ground,
The grid of NMOS tube N3 is the input terminal of voltage domain conversion circuit 103, with sampled voltage VIOutput node is connected;Schmidt trigger
The feeder ear of device 201 is connected with supply voltage VCC, and the ground terminal of Schmidt trigger 201 is connected with reference to ground, schmidt trigger
The output voltage swing of device 201 is 0~VCC;The output of Schmidt trigger 201 is connected with the input of phase inverter 202, phase inverter 202
Output be connected with the input of phase inverter 203, the output of phase inverter 203 is the output end of voltage domain conversion circuit 103;Phase inverter
202 and phase inverter 203 be all supply voltage VCC power supply.
Preferably, the NMOS tube of the NMOS tube N102 of the current-to-voltage converting circuit 102 and voltage domain conversion circuit 103
N1, NMOS tube N2 and NMOS tube N3 should select same type and the equal transistor of breadth length ratio, then the technique of N1, N2 and N3
Deviation, temperature coefficient are identical as threshold voltage, and the accuracy of design, design processes simplified can be improved.
As another specific embodiment of voltage domain conversion circuit 103, including triode T1, T2 and T3, PMOS
Pipe P1 and P2, bias current sources IB, Schmidt trigger 201, phase inverter 202 and 203;Bias current sources IBOne end and power supply electricity
VCC is pressed to be connected, supply voltage VCC is the power supply of modules circuit, current source IBThe collector of inflow triode T1, three
The collector of pole pipe T1 is also connected with the base stage of the base stage of triode T1 and triode T2, the transmitting of triode T1 and triode T2
Pole all with reference is connected;The collector of triode T2 is connected with the drain electrode of PMOS tube P1, and the drain electrode of PMOS tube P1 is also and PMOS
The grid of pipe P1 is connected with the grid of PMOS tube P2, and the source electrode of PMOS tube P1 and PMOS tube P2 are all connected with supply voltage VCC;
The drain electrode of PMOS tube P2 is connected with the input terminal of the collector of triode T3 and Schmidt trigger 201, the transmitting of triode T3
Pole is connected with reference to ground, and the base stage of triode T3 is the input terminal of voltage domain conversion circuit 103, with sampled voltage VIOutput node
It is connected;The feeder ear of Schmidt trigger 201 is connected with supply voltage VCC, the ground terminal and reference ground of Schmidt trigger 201
It is connected, the output voltage swing of Schmidt trigger 201 is 0~VCC;The output of Schmidt trigger 201 and the input of phase inverter 202
It is connected, the output of phase inverter 202 is connected with the input of phase inverter 203, and the output of phase inverter 203 is voltage domain conversion circuit 103
Output end;Phase inverter 202 and phase inverter 203 are all supply voltage VCC power supplies.
Optionally, the sampled voltage VIMaximum value be 1~3V, sampled voltage V of the present inventionIMaximum value take 2V.
The above are primary side winding resonance trough sample circuits, and specific working principle and correlation analysis are embodied below
Mode part detailed description.
Accordingly, the present invention solve above-mentioned second technical problem technical solution it is as follows:
A kind of primary side winding resonance trough method of sampling is used for flyback converter, includes the following steps:
(1) voltage of the drain D RN node of primary side master power switch pipe N-MOS is acquired, and the voltage signal of acquisition is turned
It is changed to sample rate current;
(2) according to the size of sample rate current, it is converted into the sampled voltage of certain voltage range;
(3) sampled voltage is converted to the trough sampled signal with digital logic signal with voltage domain;
It is characterized by: the relationship of sample rate current and DRN node voltage is, and in the resonance peak stage, sample rate current IfbWith
Resonance potential is had functional relation are as follows: Ifb=k (VVin-VDRN), wherein k is constant, and k value can pass through 101 He of clamp circuit
The circuit parameter of current-to-voltage converting circuit 102 is arranged, VVin、VDRNRespectively indicate Vin, DRN node voltage;In resonance trough
Stage, sample rate current 0.
Optionally, the maximum range of the sampled voltage is 1V~3V, and the maximum value of sampled voltage of the present invention is selected as 2V.
Beneficial effects of the present invention are summarized as follows:
1, the technical program completes the sampling of resonance trough in transformer primary side, and transformer is allowed to save auxiliary winding,
Reduce volume of transformer.
2, the technical program can integrate resonance trough sample circuit, reduce the use of discrete device, simplify circuit, drop
Low converter cost.
3, the technical program completes the sampling of resonance trough, can control primary side power tube and turns off in resonance trough, reduces function
The turn-off power loss of rate pipe reduces the energy of electromagnetic interference.
Detailed description of the invention
Fig. 1 is the main power topological diagram of flyback converter;
Fig. 2 is flyback converter auxiliary winding trough sample circuit schematic diagram;
Fig. 3 is the functional block diagram of primary side winding resonance trough sample circuit of the present invention;
Fig. 4 is the part signal waveform timing chart of trough sample circuit of the present invention;
Fig. 5 is 101 physical circuit figure of first embodiment clamp circuit;
Fig. 6 is 102 physical circuit figure of first embodiment current-to-voltage converting circuit;
Fig. 7 is 103 physical circuit figure of first embodiment voltage domain conversion circuit;
Fig. 8 is 103 physical circuit figure of second embodiment of the invention voltage domain conversion circuit.
Specific embodiment
Fig. 3 is the functional block diagram 100 of primary side winding resonance trough sample circuit of the present invention, is become applied to the flyback in Fig. 1
Parallel operation, 100 block diagrams shown include: feedback resistance RFB, clamp circuit 101, current-to-voltage converting circuit 102 and voltage domain conversion
Circuit 103;
Feedback resistance RFBOne end is used to connect the drain D RN node of the primary side master power switch pipe N-MOS of flyback converter;
101 first input end of clamp circuit is for the input terminal V with flyback converterinIt is connected, 101 second input terminal of clamp circuit and anti-
Feed resistance RFBThe other end, which is connected, constitutes feedback node FB, and 101 output end of clamp circuit is connected structure with current-to-voltage converting circuit 102
At sampled voltage VIOutput node (is hereafter directly referred to as VINode or node VI), node VIIt is also connected with voltage domain conversion circuit
103 input terminal, the output end of voltage domain conversion circuit 103 is for exporting trough sampled signal;
Present invention is contemplated that, the sampling of resonance trough is completed in the case where no auxiliary winding, then must be sampled
Transformer primary winding signal related with resonance, then inventor selects the DRN node signal of primary side as reference, to export
Trough sampled signal.Further, it is contemplated that the wave characteristics of DRN node are with power input voltage VinCentered on amount of decrease
Oscillation, then it is assumed that DRN node resonance to power input voltage VinAs resonance trough when following, by comparing DRN node voltage
And VinThe available resonance trough signal of size, but DRN node voltage and VinVoltage it is higher, can not be by directly comparing
Size obtains resonance trough signal.So the present invention first passes through clamp circuit acquisition and is proportional to DRN node voltage and VinDifference
This electric current is being converted to resonance trough signal, is allowing the present invention to complete primary side of the transformer without auxiliary winding humorous by electric current
The sampling of vibration wave paddy, while reducing the use of discrete device again, save the cost, and converter primary side power tube is in resonance trough
Shutdown, can reduce the turn-off power loss of power tube, reduce the energy of electromagnetic interference.
Foregoing invention design can summarize are as follows: (1) obtain sample rate current, according to primary side resonance feature, gained sample rate current with
Resonance wave crest is related to trough, and in the resonance peak stage, sample rate current has functional relation with resonance potential;In resonance trough rank
Section, sample rate current 0;(2) it obtains sampled voltage and adopting for certain voltage range is converted into according to the size of sample rate current
Sample voltage;(3) trough sampled signal is obtained, the voltage domain of sampled voltage is smaller, is converted into digital logic signal with electricity
Press the trough sampled signal in domain;(4) wherein, the maximum value of sampled voltage can be turned by the size and Current Voltage of sample rate current
The parameter of circuit is changed to be arranged.
Wave characteristics and timing waveform shown in Fig. 4 below according to resonance are adopted to illustrate that circuit shown in Fig. 3 completes trough
The process of sample.
By the explanation of background technique it is found that the harmonic wave of DRN node voltage is the not frequency conversion convergent oscillation centered on,
By the characteristics of flyback converter it is found that oscillation starting points when DRN node voltage resonance are in wave crest, DRN node electricity as shown in Figure 4
Corrugating.It is greater than V in the voltage of DRN nodeinWhen, clamp circuit 101 work, by the voltage clamping of FB node to and VinIt is equal,
Then DRN node voltage and VinVoltage difference and flow through resistance RFBElectric current IFBIt is directly proportional.Clamp circuit 101 is by IFBWith certain
Scaled mirror Ifb, so that IfbIt is proportional to DRN node voltage and VinVoltage difference.IfbBy current-to-voltage converting circuit
102, obtain and IfbRelated voltage VI。VIBy voltage domain conversion circuit 103, so that VIVoltage can achieve power supply electricity
VCC is pressed, i.e., is greater than V in DRN node voltageinWhen, trough sampled signal Valley output is high level.It is less than in the voltage of DRN
VinWhen, i.e. DRN node voltage resonance to VinHereinafter, being the trough stage of resonance, clamp circuit 101 ends, the voltage of FB node
No longer clamper and VinEqual, FB node is equal with DRN node voltage at this time, RFBElectric current is not had, then IfbIt is 0.IfbIt is 0, passes through
Current-to-voltage converting circuit 102, VIIt is 0.VIIt is 0, by voltage domain conversion circuit 103, trough sampled signal Valley output is
Low level, V as shown in Figure 4IWith the timing waveform of Valley.
In conclusion the method that 100 circuits are completed trough sampling is always as follows:
(1) the resonance peak stage, i.e. DRN node voltage is in VinOn resonance, IfbElectric current be proportional to DRN node voltage with
VinVoltage difference, 102 by IfbBe converted to the V of certain voltageI, 103 trough sampled signal Valley output is high level;
(2) the resonance trough stage, i.e. DRN node voltage is in VinUnder resonance, IfbElectric current is 0,102 by IfbThe electricity of conversion
Press VIThe trough sampled signal Valley for being 0,103 output is low level.
Finally, the trough sampled signal Valley of 100 outputs is to believe with the harmonic wave of DRN node voltage with the square wave of phase
Number, Valley corresponds to the resonance trough of DRN node voltage, DRN node voltage and Valley wave as shown in Figure 4 when being low level
Shape.
Below in conjunction with attached drawing and specific embodiment, the present invention will be described in detail, herein with schematic implementation of the invention
Example and explanation are but not as a limitation of the invention to explain the present invention.
First embodiment
First embodiment is 102 physical circuit of current-to-voltage converting circuit by 101 physical circuit figure of Fig. 5 clamp circuit, Fig. 6
Figure and 103 physical circuit figure of Fig. 7 voltage domain conversion circuit are realized.
Below according to 101 modular circuits of Fig. 5,103 modular circuits of 102 modular circuits of Fig. 6 and Fig. 7, trough is provided
The circuit analysis and theoretical calculation of sampling process.
101 modular circuits as shown in Figure 5, including PMOS tube PM1, PM2, PM3, NMOS tube NM1, NM2.The source electrode of PM1
With input voltage VinConnection, grid and drain electrode are connect with the drain electrode of the grid of PM2, the grid of PM3, NM1;The source electrode and FB of PM2
It is connected with the source electrode of PM3, drain electrode is connected with the grid of NM1, the grid of NM2 and drain electrode;The source electrode of PM3 and the source electrode of FB and PM2
Connection, grid are connected with the drain electrode of the grid of PM2, the grid of PM1, PM1, drain electrode output electric current Ifb;The source electrode of NM1 and NM2 with
It is connected with reference to ground.The backgate of all PMOS and NMOS are all connect with respective source electrode.
In order to facilitate description circuit theory, the breadth length ratio of NM1 and NM is identical, and PM1, PM2 are identical with the breadth length ratio of PM3, NM1
Well known current-mirror structure is constituted with NM2, therefore can be obtained by well known current mirror working principle, when NM1 and NM2 work is full
When with area, if ignoring channel-length modulation, drain current is equal, i.e. IDN1=IDN2, wherein IDN1Indicate NM1 leakage
Electric current of the pole to source electrode, IDN2Indicate the electric current of NM2 drain-to-source.Again because the channel of PM1 and NM1, PM2 and NM2 are gone here and there respectively
Connection, so PM1 and NM1, PM2 are equal with the drain current of NM2 difference.In conclusion all working in all metal-oxide-semiconductors in saturation region
When, there is IDP1=IDN1=IDN2=IDP2, IDP1And IDP2It is the drain current of PM1 and PM2 respectively.
By well known PMOS tube saturation region drain current formula
Wherein IDSPIndicate the source-drain current of PMOS, μpIndicate the mobility in hole, CoxIndicate the gate oxide of unit area
Capacitor,Indicate the breadth length ratio of PMOS, VGSPIndicate the gate source voltage of PMOS, VthpIndicate the threshold voltage of PMOS.
In conclusion PM1, PM2 are identical with the breadth length ratio of PM3, type of device is identical, that is,Vthp1
=Vthp2=Vthp3, whereinRespectively indicate the breadth length ratio of PM1, PM2 and PM3, Vthp1、Vthp2、Vthp3Table
Show the threshold voltage of PM1, PM2 and PM3.I is integrated againDP1=IDP2With formula (2), there is following relationship:
Wherein VGSP1、VGSP2Respectively indicate the gate source voltage of PM1, PM2.
It is described previouslyVthp1=Vthp2=Vthp3, then have formula 3 available:
VGSP1=VGSP2 (3)
PM1, PM2 are connected with the grid of PM3, so the grid voltage of PM1, PM2 and PM3 are equal, according to formula 3, PM1 and
The source voltage of PM2 (or PM3) is equal, i.e. VinVoltage and FB voltage it is equal, and the electric current of PM1, PM2 and PM3 are equal.
So far have been described that clamp circuit 101 completes VinWith the principle of FB clamper, and there are the electric current of PM1, PM2 and PM3 equal, flows
The electric current for crossing PM3 is Ifb, then IFB=2Ifb, there is formula 4:
V in formula 4Vin、VDRNRespectively indicate Vin, DRN voltage, available formula 5, IfbIt is proportional to VinWith the voltage difference of DRN
Value:
FB is clamped to and V by 101 circuit operation principles to sum up provided in the resonance peak stage, 101inIt is equal, output electricity
Flow IfbIt is proportional to VinWith the voltage difference of DRN;In the resonance trough stage, the cut-off of 101 circuits exports electric current IfbIt is 0.
102 modular circuit as shown in FIG. 6, including NMOS tube N102.The grid of N102 is connected with drain electrode constitutes VINode,
IfbFlow into VINode, the backgate and source electrode of N102 connect with reference to ground.
N102 constitutes diode connection, can be used for IfbElectric current is converted to voltage VI, had by the connection relationship of Fig. 6:
VDS102=VGS102=VI (6)
Wherein VDS102Indicate the source-drain voltage of N102, VGS102The gate source voltage of N102 is indicated, so N102 work is being saturated
Area has according to well known NMOS saturation current formula:
Wherein IDSNIndicate the source-drain current of NMOS, μnIndicate the mobility of electronics, CoxIndicate the gate oxide of unit area
Capacitor,Indicate the breadth length ratio of NMOS, VGSNIndicate the gate source voltage of NMOS, VthnIndicate the threshold voltage of NMOS.
The electric current for flowing through N102 is Ifb, 6 substitution formula 7 of formula then has:
WhereinIndicate the breadth length ratio of N102, Vth102Indicate the threshold voltage of N102.By the available electric current electricity of formula 8
The output voltage V of voltage conversion circuit 102IWith input current IfbExpression formula, as shown in Equation 9:
As can be seen that changing I from formula 9fbV can be changed with the breadth length ratio of N102IMaximum value, can be by VIIt is maximum
Value is set as 1~3V, and the present invention is by VIMaximum value is set as 2V or so, then VIVoltage domain be 0~2V.
102 circuit operation principles to sum up provided, in the resonance peak stage, 102 by electric current IfbBe converted to voltage VI;Humorous
Vibration wave paddy stage, electric current IfbIt is 0,102 output VIIt is 0, V as shown in Figure 4IWaveform.
It include NMOS tube N1, N2 and N3 as shown in fig. 7, giving the physical circuit of voltage domain conversion circuit 103;
PMOS tube P1 and P2;Bias current sources IB;Schmidt trigger 201;Phase inverter 202 and 203.Bias current sources IBOne end and electricity
Source voltage VCC is connected, and VCC is the power supply of modules circuit, current source IBThe drain electrode of N1 is flowed into, the drain electrode of N1 is also and N1
Grid be connected with the grid of N2, the source electrode of N1 and N2 all with reference are connected, and N1 and N2 constitute current mirror, and mirroring ratios are
k1.The drain electrode of N2 is connected with the drain electrode of P1, and the drain electrode of P1 is also connected with the grid of the grid of P1 and P2, the source electrode of P1 and P2 all with
VCC is connected, and P1 and P2 constitute current mirror, mirroring ratios k2.The drain electrode of P2 and the drain electrode of N3 and Schmidt trigger 201
Input terminal, which is connected, constitutes Va node, and the source electrode of N3 is connected with reference to ground, the grid of N3 and V shown in Fig. 3INode, which is connected, to be constituted
103 input.Schmidt trigger 201 is connected with VCC and with reference to ground, and 201 output voltage swing is 0~VCC.Schmidt trigger
201 output is connected with the input of phase inverter 202, and the output of phase inverter 202 is connected with the input of phase inverter 203, phase inverter 203
Output Valley be 103 output.Phase inverter 202 and phase inverter 203 are all VCC power supplies, are not indicated in Fig. 7.It is all
PMOS and the backgate of NMOS all connect with respective source electrode.
By analysis before it is found that VIVoltage domain be 0~VImax(VIMaximum value), VImaxThe I of Fig. 6 can be passed throughfbWith
The breadth length ratio of N102 is arranged, and the present invention is by VImaxIt is set as 2V, then VIVoltage domain be 0~2V.Circuit as shown in Figure 7, IB、N1、
N2, N3, P1 and P2 constitute the common source amplifying circuit of current source loads, VIFor input, VaTo export, this is utilized in the present embodiment
The large signal characteristic of circuit completes VITo VaThe conversion of voltage domain.By the circuit connecting relation of Fig. 7, in the peak stage of resonance,
VIVoltage is higher, and the conducting of N3 pipe, P2 pipe is constant-current source at this time, ignores the channel-length modulation of P2 pipe, size of current k1·
k2·IB, N3 pipe work in linear zone, had according to well known NMOS linear zone current formula:
Wherein IDSIndicate the source-drain current of NMOS, μnIndicate the mobility of electronics, CoxIndicate the gate oxide of unit area
Capacitor,Indicate the breadth length ratio of NMOS, VthIndicate the threshold voltage of NMOS.
According to the connection relationship of N3 pipe, and available by formula 10:
That is:
WhereinIndicate the breadth length ratio of N3, Vth3Indicate the threshold voltage of N3.By formula 12 it is found that VaWith VIIt is inversely proportional,
VIWhen for maximum value, VaFor minimum value, and VaMinimum value (Vamin) k1, k2, I can be passed throughBIt is adjusted with the breadth length ratio of N3 pipe.
In the trough stage of resonance, VIVoltage is the cut-off of 0, N3 pipe, VaOutput voltage is VCC voltage.To sum up, VIVoltage
Domain is 0~VImax, it is converted into VaVoltage domain be Vamin~VCC, VaminWith VIRelationship determined by formula 13, be arranged VaminRange
For 0~1V.
VaVoltage domain be Vamin~VCC will be converted into the voltage domain of 0~VCC, this achievable function of Schmidt trigger 201
Can, only need 201 lower threshold to be greater than VaminMaximum value in range, i.e., in VaminRange be 0~1V when, 201 lower limit threshold
Value is greater than 1V.Phase inverter 202 and 203 is connected after 201, for the shaping of waveform, the trough sampled signal of final output
Valley is and VIWith the square-wave signal of phase, i.e., with the square-wave signal that trough sampled signal Valley is with DRN resonance with phase,
The DRN resonance peak stage corresponds to the high level of Valley, and the DRN resonance trough stage corresponds to the low level of Valley, completes primary side
The function of winding trough sampling, signal sequence waveform are as shown in Figure 4.
Preferably, N1, N2, N3 in the N102 in Fig. 6 and Fig. 7 should select type identical, the consistent crystal of breadth length ratio
It manages, then Vth102With Vth3Equal, joint type 9 and formula 12 have:
By formula 13 it is found that calculating VaminWhen, it can not consider VIDesign, only require VImaxUnder process deviation both greater than
Vth3(Vth102).
Second embodiment
The circuit diagram of the voltage domain conversion circuit 103 of embodiment illustrated in fig. 82.Electricity shown in Fig. 7 with first embodiment
Press 103 circuit diagram of domain conversion circuit the difference is that, NMOS tube N1, N2 and N3 of Fig. 7 replaces with three respectively in fig. 8
Pole pipe T1, T2 and T3.The collector and bias current sources I of triode T1BOne end be connected, IBCurrent direction T1, T1 current collection
Pole is also connected with the base stage of T1, the base stage of T2, and the emitter of T1 is connected with reference to ground.The drain electrode of the collector and P1 of T2, P1
Grid, the grid of P2 are connected, and the emitter of T2 is connected with reference to ground, and T1 and T2 constitute current mirror, mirroring ratios k1.T3's
Collector is connected with the drain electrode of P2, the input of Schmidt trigger 201 constitutes Va node, the base stage of T3 and V shown in Fig. 3ISection
The input of the connected composition 103 of point, the emitter of T3 are connected with reference to ground.The physical circuit principle and beneficial effect of second embodiment
It is identical with the first embodiment, which is not described herein again.
The above is the preferred embodiment of the present invention, it is noted that those skilled in the art are come
It says, without departing from the principle of the present invention, several improvements and modifications made also should be regarded as protection scope of the present invention.
Claims (12)
1. a kind of primary side winding resonance trough sample circuit is applied to flyback converter, it is characterised in that: including feedback resistance
RFB, clamp circuit 101, current-to-voltage converting circuit 102 and voltage domain conversion circuit 103;
Feedback resistance RFBOne end is used to connect the drain D RN node of the primary side master power switch pipe N-MOS of flyback converter;Clamper
101 first input end of circuit is for the input terminal V with flyback converterinIt is connected, 101 second input terminal of clamp circuit and feedback electricity
Hinder RFBThe other end, which is connected, constitutes feedback node FB, and 101 output end of clamp circuit, which is connected to constitute with current-to-voltage converting circuit 102, to be adopted
Sample voltage VIOutput node, sampled voltage VIOutput node is also connected with the input terminal of voltage domain conversion circuit 103, voltage domain conversion
The output end of circuit 103 is for exporting trough sampled signal;
Clamp circuit 101 is used to the difference of two input terminal input voltage being converted to sample rate current Ifb, and by sample rate current
IfbInput to current-to-voltage converting circuit 102;Current-to-voltage converting circuit 102 is by sample rate current IfbBe converted to sampled voltage VI,
And by sampled voltage VIIt exports to voltage domain conversion circuit 103;Voltage domain conversion circuit 103 is for completing sampled voltage VIVoltage
Domain to trough sampled signal Valley voltage domain conversion and by its output end export trough sampled signal;Wherein sampled voltage
VIFor analog voltage signal, voltage domain maximum value is less than flyback converter and controls chip power voltage VCC;Trough sampled signal
Valley is digital logic signal, and voltage domain is 0~VCC.
2. primary side winding resonance trough sample circuit according to claim 1, it is characterised in that: clamp circuit 101 includes
PMOS tube PM1, PM2 and PM3 and NMOS tube NM1 and NM2;The source electrode of PMOS tube PM1 is the first input of clamp circuit 101
End, grid and drain electrode are connect with the drain electrode of the grid of PMOS tube PM2, the grid of PMOS tube PM3 and NMOS tube NM1;PMOS tube PM2
Source electrode be clamp circuit 101 the second input terminal, drain electrode connects with the grid of NMOS tube NM1, the grid of NMOS tube NM2 and drain electrode
It connects;The source electrode of PMOS tube PM3 is connect with the source electrode of feedback node FB and PMOS tube PM2, the grid of grid and PMOS tube PM2,
The grid of PMOS tube PM1 is connected with the drain electrode of PMOS tube PM1, drains as the output end of clamp circuit 101;NMOS tube NM1 and
The source electrode of NMOS tube NM2 is connect with reference.
3. primary side winding resonance trough sample circuit according to claim 1, it is characterised in that: current-to-voltage converting circuit
102 include NMOS tube N102, the sample rate current I that clamp circuit 101 exportsfbFlow into the drain electrode of NMOS tube N102, and NMOS tube
The grid of N102 and drain electrode are connected to form sampled voltage VIOutput node, the source electrode of NMOS tube N102 are connected to public reference ground
End.
4. primary side winding resonance trough sample circuit according to claim 1, it is characterised in that: voltage domain conversion circuit
103 include NMOS tube N1, N2 and N3, PMOS tube P1 and P2, bias current sources IB, Schmidt trigger 201,202 He of phase inverter
203;Bias current sources IBOne end is connected with supply voltage VCC, and supply voltage VCC is the power supply of modules circuit, electricity
Stream source IBFlow into the drain electrode of NMOS tube N1, grid phase of the drain electrode of NMOS tube N1 also with the grid of NMOS tube N1 and NMOS tube N2
Even, the source electrode of NMOS tube N1 and NMOS tube N2 all with reference is connected;The drain electrode of NMOS tube N2 is connected with the drain electrode of PMOS tube P1,
The drain electrode of PMOS tube P1 is also connected with the grid of the grid of PMOS tube P1 and PMOS tube P2, the source electrode of PMOS tube P1 and PMOS tube P2
All it is connected with supply voltage VCC;The drain electrode of PMOS tube P2 and the drain electrode of NMOS tube N3 and the input terminal phase of Schmidt trigger 201
Even, the source electrode of NMOS tube N3 is connected with reference to ground, and the grid of NMOS tube N3 is the input terminal of voltage domain conversion circuit 103, and adopts
Sample voltage VIOutput node is connected;The feeder ear of Schmidt trigger 201 is connected with supply voltage VCC, Schmidt trigger 201
Ground terminal be connected with reference to ground, the output voltage swing of Schmidt trigger 201 is 0~VCC;The output of Schmidt trigger 201
It is connected with the input of phase inverter 202, the output of phase inverter 202 is connected with the input of phase inverter 203, and the output of phase inverter 203 is
The output end of voltage domain conversion circuit 103;Phase inverter 202 and phase inverter 203 are all supply voltage VCC power supplies.
5. primary side winding resonance trough sample circuit according to claim 1, it is characterised in that: current-to-voltage converting circuit
102 include NMOS tube N102, the sample rate current I that clamp circuit 101 exportsfbFlow into the drain electrode of NMOS tube N102, and NMOS tube
The grid of N102 and drain electrode are connected to form sampled voltage VIOutput section, the source electrode of NMOS tube N102 are connected to public reference ground;
Voltage domain conversion circuit 103 includes NMOS tube N1, N2 and N3, PMOS tube P1 and P2, bias current sources IB, Schmidt trigger
201, phase inverter 202 and 203;Bias current sources IBOne end is connected with supply voltage VCC, and supply voltage VCC is modules electricity
The power supply on road, current source IBFlow into NMOS tube N1 drain electrode, NMOS tube N1 drain electrode also with the grid of NMOS tube N1 and
The grid of NMOS tube N2 is connected, and the source electrode of NMOS tube N1 and NMOS tube N2 all with reference are connected;The drain electrode of NMOS tube N2 with
The drain electrode of PMOS tube P1 is connected, and the drain electrode of PMOS tube P1 is also connected with the grid of the grid of PMOS tube P1 and PMOS tube P2, PMOS
The source electrode of pipe P1 and PMOS tube P2 are all connected with supply voltage VCC;The drain electrode of PMOS tube P2 and the drain electrode of NMOS tube N3 and Shi Mi
The input terminal of special trigger 201 is connected, and the source electrode of NMOS tube N3 is connected with reference to ground, and the grid of NMOS tube N3 is voltage domain conversion
The input terminal of circuit 103, with sampled voltage VIOutput node is connected;The feeder ear and supply voltage VCC of Schmidt trigger 201
It is connected, the ground terminal of Schmidt trigger 201 is connected with reference to ground, and the output voltage swing of Schmidt trigger 201 is 0~VCC;It applies
The output of schmitt trigger 201 is connected with the input of phase inverter 202, the output of phase inverter 202 and the input phase of phase inverter 203
Even, the output of phase inverter 203 is the output end of voltage domain conversion circuit 103;Phase inverter 202 and phase inverter 203 are all power supply electricity
Press VCC power supply.
6. primary side winding resonance trough sample circuit according to claim 5, it is characterised in that: the Current Voltage conversion
The NMOS tube N102 of circuit 102 and NMOS tube N1, the NMOS tube N2 and NMOS tube N3 of voltage domain conversion circuit 103 select phase
Same type and the equal transistor of breadth length ratio.
7. primary side winding resonance trough sample circuit according to claim 1, it is characterised in that: voltage domain conversion circuit
103 include triode T1, T2 and T3, PMOS tube P1 and P2, bias current sources IB, Schmidt trigger 201,202 He of phase inverter
203;Bias current sources IBOne end is connected with supply voltage VCC, and supply voltage VCC is the power supply of modules circuit, electricity
Stream source IBFlow into the collector of triode T1, base stage of the collector of triode T1 also with the base stage of triode T1 and triode T2
It is connected, the emitter of triode T1 and triode T2 all with reference are connected;The leakage of the collector and PMOS tube P1 of triode T2
Extremely it is connected, the drain electrode of PMOS tube P1 is also connected with the grid of the grid of PMOS tube P1 and PMOS tube P2, PMOS tube P1 and PMOS tube
The source electrode of P2 is all connected with supply voltage VCC;The drain electrode of PMOS tube P2 and the collector of triode T3 and Schmidt trigger 201
Input terminal be connected, the emitter of triode T3 is connected with reference to ground, and the base stage of triode T3 is voltage domain conversion circuit 103
Input terminal, with sampled voltage VIOutput node is connected;The feeder ear of Schmidt trigger 201 is connected with supply voltage VCC, Shi Mi
The ground terminal of special trigger 201 is connected with reference to ground, and the output voltage swing of Schmidt trigger 201 is 0~VCC;Schmidt trigger
The output of device 201 is connected with the input of phase inverter 202, and the output of phase inverter 202 is connected with the input of phase inverter 203, phase inverter
203 output is the output end of voltage domain conversion circuit 103;Phase inverter 202 and phase inverter 203 are all supply voltage VCC power supplies.
8. primary side winding resonance trough sample circuit according to any one of claims 1 to 7, it is characterised in that: described to adopt
Sample voltage VIMaximum value be 1~3V.
9. primary side winding resonance trough sample circuit according to any one of claims 1 to 7, it is characterised in that: described to adopt
Sample voltage VIMaximum value take 2V.
10. a kind of primary side winding resonance trough method of sampling is used for flyback converter, includes the following steps:
(1) voltage of the drain D RN node of primary side master power switch pipe N-MOS is acquired, and the voltage signal of acquisition is converted to
Sample rate current;
(2) according to the size of sample rate current, it is converted into the sampled voltage of certain voltage range;
(3) sampled voltage is converted to the trough sampled signal with digital logic signal with voltage domain;
It is characterized by: the relationship of sample rate current and DRN node voltage is, and in the resonance peak stage, sample rate current IfbWith resonance
Voltage is had functional relation are as follows: Ifb=k (VVin-VDRN), wherein k is constant, VVin、VDRNRespectively indicate Vin, DRN node
Voltage;In the resonance trough stage, sample rate current 0.
11. the primary side winding resonance trough method of sampling according to claim 10, it is characterised in that: the sampled voltage
Maximum range is 1V~3V.
12. the primary side winding resonance trough method of sampling according to claim 10, it is characterised in that: the sampled voltage
Maximum value is selected as 2V.
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CN112014628A (en) * | 2019-05-31 | 2020-12-01 | 亚德诺半导体国际无限责任公司 | High-precision switch capacitor MOSFET current measuring technology |
CN112752378A (en) * | 2019-10-29 | 2021-05-04 | 华润微集成电路(无锡)有限公司 | Silicon controlled rectifier dimming circuit |
CN114389598A (en) * | 2022-03-23 | 2022-04-22 | 武汉市聚芯微电子有限责任公司 | Conversion device, interface circuit and chip |
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