CN102386064A - Manufacturing method of metal-oxide-metal capacitor - Google Patents
Manufacturing method of metal-oxide-metal capacitor Download PDFInfo
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- CN102386064A CN102386064A CN2011103926075A CN201110392607A CN102386064A CN 102386064 A CN102386064 A CN 102386064A CN 2011103926075 A CN2011103926075 A CN 2011103926075A CN 201110392607 A CN201110392607 A CN 201110392607A CN 102386064 A CN102386064 A CN 102386064A
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Abstract
The invention provides a manufacturing method of a metal-oxide-metal (MOM) capacitor. A mixed layer composed of low k-value dielectrics and high k-value silicon oxide is formed, metal grooves are formed in the low k-value dielectrics and the high k-value silicon oxide by the conventional photoetching process and filled with metals, so that a high-performance MOM capacitor structure is formed in the high k-value silicon oxide region, and the low k-value dielectrics are interconnected in other regions. The invention is characterized in that the high k-value silicon oxide is formed by means of PECVD (plasma enhanced chemical vapor deposition) and oxygen-containing gas processing cycles, which can effectively eliminate Si-H bonds in silicon oxide. Compared with the conventional single k-value dielectric structure, the capacitance of the interlayer capacitor is effectively increased, the electrical properties (such as breakdown voltage and drain current) of the MOM capacitor are improved, and the uniformity of electrical properties between devices is improved.
Description
Technical field
The present invention relates to microelectronic, particularly relate to a kind of manufacture method of metal-oxide-metal electric capacity.
Background technology
Capacitor is electronic devices and components commonly used in the integrated circuit, also is the important composition unit of integrated circuit, and it can be widely used in memory, microwave, and radio frequency, smart card is in the chips such as high pressure and filtering.At present, the capacitor that widely adopts in the chip is metal-insulator-metal type (MIM) capacitor that is parallel to silicon chip substrate.Wherein metal adopts the copper compatible mutually with metal interconnected technology, aluminium etc. usually; Mostly insulator is the dielectric substance silica or the silicon nitride of high-k (k); Plasma enhanced chemical vapor deposition method (PECVD, Plasma Enhanced Chemical Vapor Deposition) is because of the low thin film deposition that is widely used in the metal interconnected technology of its depositing temperature.Utilize residual a large amount of si-h bond (Si-H) in silica that the PECVD method makes or the silicon nitride film; Make and have more electric charge in it; This causes this silica or the silicon nitride film uniformity aspect electrical thickness relatively poor, and the MIM capacitor that utilizes this silica or silicon nitride film to make also can be corresponding relatively poor aspect each electrical characteristics such as puncture voltage, leakage current.
In addition, along with improving constantly of very lagre scale integrated circuit (VLSIC) integrated level, the continuous scaled down of device feature size, also corresponding the dwindling of capacitor sizes of making in the circuit, to the uniformity that electric capacity is made, coherence request is more strict.And along with the minimizing of device size, and performance is to the demand of big electric capacity, and how under limited area, obtaining highdensity electric capacity also becomes an attractive problem.
Publication number is that the Chinese patent of CN101577227A discloses a kind of method of improving aluminium-silicon nitride-tantalum thing capacitor performance; Handle silicon nitride film through oxygen-containing gas; The quantity of electric charge in the silicon nitride film that forms is less, has improved the electrical thickness of silicon nitride film and the uniformity of physical thickness, and the MIM electric capacity that adopts the method formation is in puncture voltage; Each electrical characteristics aspect such as leakage current makes moderate progress, but does not obtain highdensity electric capacity.Therefore, how under limited area, to obtain highdensity electric capacity and be still urgent problem in the present technical development.
Summary of the invention
Technical problem to be solved by this invention provides a kind of formation method of metal-oxide-metal electric capacity; Under limited area, to obtain highdensity electric capacity; And can improve the electric capacity of layer inner capacitor effectively, improve each electrical characteristics such as puncture voltage, leakage current of metal-oxide-metal (MOM) capacitor and the electricity uniformity between each device thereof.
For solving the problems of the technologies described above, the present invention provides a kind of manufacture method of metal-oxide-metal electric capacity, may further comprise the steps:
Substrate is provided;
The low k value dielectric layer of deposition on substrate;
Through photoetching and etching, in said low k value dielectric layer, form an opening;
The mode of handling the circulation of two steps through plasma enhanced chemical vapor deposition and oxygen-containing gas forms silica in said opening;
Through photoetching be etched in low k value dielectric layer and the silica and form metallic channel respectively;
In metallic channel, fill metal.
Preferable, the reacting gas that said plasma enhanced chemical vapor deposition adopts comprises silane and nitrous oxide.
Preferable; The flow of said silane is between 500sccm to 600sccm; The flow of said nitrous oxide is between 9000sccm to 15000sccm, and the flow-rate ratio of silane and nitrous oxide is between 1: 15 to 1: 30, and rate of film build is between 1500 nm/minute to 5000 nm/minute.
Preferable, said oxygen-containing gas is handled the oxygen-containing gas that is adopted and is comprised nitric oxide, nitrous oxide, carbon monoxide or carbon dioxide.
Preferable, the oxygen-containing gas flow that said oxygen-containing gas processing is adopted is between 2000sccm to 6000sccm, and treatment temperature is between 300 degrees centigrade to 600 degrees centigrade.
Preferable, said mode through plasma enhanced chemical vapor deposition and oxygen-containing gas processing two steps circulation forms in the process of silica, and the silicon oxide thickness of each deposition is 1 nanometer to 10 nanometer.
The present invention is through forming the mixed layer of low k value medium and high k value silica; Then carry out the chemical wet etching of traditional handicraft; Realize the MOM structure in high k value region of silicon oxide, realize low k value interconnection in other zones, wherein; The mode that the formation of high k silica adopts PECVD deposition and oxygen-containing gas cycle of treatment to carry out can effectively be removed the si-h bond in the silica.Compare with traditional single k value dielectric structure, the present invention can effectively improve the electric capacity of layer inner capacitor, has improved each electrical characteristics such as puncture voltage, leakage current of MOM capacitor again, and the electricity uniformity between each device.Through adopting the vertical capacitor structure, can also effectively improve capacitor density, thereby in less chip area, realize big electric capacity.
Description of drawings
Fig. 1 forms the method flow diagram of MOM electric capacity for the embodiment of the invention;
Fig. 2 A～2E is the method sketch map that the embodiment of the invention forms MOM electric capacity.
Embodiment
For make above-mentioned purpose of the present invention, feature and advantage can be more obviously understandable, does detailed explanation below in conjunction with the accompanying drawing specific embodiments of the invention.
The present invention proposes the process of a kind of making metal-oxide-metal (MOM) capacitor.Please, prepare the flow chart of MOM capacitor formation method for the present invention with reference to Fig. 1.
Step 201: substrate 1 is provided; The substrate 1 that is provided in the present embodiment can be simple silicon substrate, also can form the silicon substrate of semiconductor device for the surface.
Step 202: shown in Fig. 2 A, the low k value dielectric layer 2 of deposition on substrate 1.Said low k value dielectric layer 2 adopts chemical vapor deposition or spin coating process to form, and dielectric constant is 2～3.
Step 203: shown in Fig. 2 B,, in said low k value dielectric layer 2, form an opening 2a, be used for follow-up formation MOM capacitor arrangement in the said opening 2a through photoetching and etching.
Step 204: shown in Fig. 2 C, in said opening 2a, fill the oxide of high k value, the preferred silica 3 that adopts among the present invention.In order to improve silica 3 films that conventional P ECVD method makes in the uniformity aspect the electrical thickness; The mode that adopts PECVD method cvd silicon oxide and oxygen-containing gas cycle of treatment to carry out among the present invention; After promptly depositing one deck silica, carry out oxygen-containing gas subsequently and handle, and then cvd silicon oxide; Carry out oxygen-containing gas again and handle, so circulation; The silicon oxide thickness of each deposition is 1 nanometer to 10 nanometer, until the silica of deposition fills up till the opening.Then, remove the unnecessary silica in low k value dielectric layer 2 surfaces, form the mixed layer of low k value medium and silica through cmp.
Wherein, The reacting gas that PECVD adopts is silane and nitrous oxide; The process conditions of reaction are that the flow of silane is between 500sccm to 600sccm; The flow of nitrous oxide is between 9000sccm to 15000sccm, and the flow-rate ratio of silane and nitrous oxide is between 1: 15 to 1: 30, and rate of film build is between 1500 nm/minute to 5000 nm/minute; Oxygen-containing gas is handled the oxygen-containing gas that is adopted and is comprised nitric oxide, nitrous oxide, carbon monoxide or carbon dioxide, and the flow of oxygen-containing gas is between 2000 to 6000sccm, and treatment temperature is between 300 to 600 degrees centigrade.
And then silica through the deposition skim also carries out the oxygen-containing gas processing to it, can remove the si-h bond Si-H in the silicon oxide film fully, and so circulation can obtain the good silica of electrical thickness evenness.
Step 205: shown in Fig. 2 D, in low k value dielectric layer 2 and silica 3, form metallic channel 4a, 4b respectively, wherein, the metallic channel 4a in the low k value dielectric layer 2 is used to form interconnection, and the metallic channel 4b in the silica 3 is used for follow-up formation capacitor plate.Metallic channel 4b in the silica 3 can evenly offer a plurality of, and the degree of depth of metallic channel 4b equals the degree of depth of silica 3, and promptly the bottom-exposed of metallic channel 4b goes out to hang down k value dielectric layer 2.
Step 206: shown in Fig. 2 E; In metallic channel, fill metal 5; Promptly in the metallic channel in low k value medium 2 and the silica 3, carry out the processing steps such as diffusion impervious layer deposition, copper plating, copper metal layer cmp of the copper of copper wiring technique, the making of completion copper-connection and MOM capacitor.
The present invention is when utilizing sketch map that the embodiment of the invention is detailed, and for the ease of explanation, the profile of expression device architecture is disobeyed general ratio and done local the amplification, should be with this as to qualification of the present invention.In addition, those skilled in the art can carry out various changes and modification to the present invention and not break away from the spirit and scope of the present invention.Like this, belong within the scope of claim of the present invention and equivalent technologies thereof if of the present invention these are revised with modification, then the present invention also is intended to comprise these changes and modification interior.
Claims (6)
1. the manufacture method of a metal-oxide-metal electric capacity is characterized in that, may further comprise the steps:
Substrate is provided;
The low k value dielectric layer of deposition on substrate;
Through photoetching and etching, in said low k value dielectric layer, form an opening;
The mode of handling the circulation of two steps through plasma enhanced chemical vapor deposition and oxygen-containing gas forms silica in said opening;
Through photoetching be etched in low k value dielectric layer and the silica and form metallic channel respectively;
In metallic channel, fill metal.
2. the manufacture method of metal-oxide-metal electric capacity as claimed in claim 1 is characterized in that, the reacting gas that said plasma enhanced chemical vapor deposition adopts comprises silane and nitrous oxide.
3. the manufacture method of metal-oxide-metal electric capacity as claimed in claim 2; It is characterized in that; The flow of said silane is between 500sccm to 600sccm; The flow of said nitrous oxide is between 9000sccm to 15000sccm, and the flow-rate ratio of silane and nitrous oxide is 1: 15 to 1: 30, and rate of film build is between 1500 nm/minute to 5000 nm/minute.
4. the manufacture method of metal-oxide-metal electric capacity as claimed in claim 1 is characterized in that, said oxygen-containing gas is handled the oxygen-containing gas that is adopted and comprised nitric oxide, nitrous oxide, carbon monoxide or carbon dioxide.
5. the manufacture method of metal-oxide-metal electric capacity as claimed in claim 1 is characterized in that, the oxygen-containing gas flow that said oxygen-containing gas processing is adopted is between 2000sccm to 6000sccm, and treatment temperature is between 300 degrees centigrade to 600 degrees centigrade.
6. the manufacture method of metal-oxide-metal electric capacity as claimed in claim 1; It is characterized in that; Said mode through plasma enhanced chemical vapor deposition and oxygen-containing gas processing two steps circulation forms in the process of silica, and the silicon oxide thickness of each deposition is 1 nanometer to 10 nanometer.
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| CN 201110392607 CN102386064B (en) | 2011-11-30 | 2011-11-30 | Manufacturing method of metal-oxide-metal capacitor |
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| CN 201110392607 CN102386064B (en) | 2011-11-30 | 2011-11-30 | Manufacturing method of metal-oxide-metal capacitor |
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Cited By (8)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| CN102623305A (en) * | 2012-03-23 | 2012-08-01 | 上海华力微电子有限公司 | Metal-multilayer insulator-metal capacitor as well as preparation method and integrated circuit thereof |
| CN102623306A (en) * | 2012-03-23 | 2012-08-01 | 上海华力微电子有限公司 | Metal-multilayer insulator-metal capacitor, manufacture method for same and integrated circuit thereof |
| CN102709154A (en) * | 2012-04-17 | 2012-10-03 | 上海华力微电子有限公司 | Manufacture method of metal-multilayer insulator-metal capacitor |
| CN102779735A (en) * | 2012-08-16 | 2012-11-14 | 上海华力微电子有限公司 | Preparation method of multi-layer metal-silicon oxide-metal capacitor |
| CN102779736A (en) * | 2012-08-16 | 2012-11-14 | 上海华力微电子有限公司 | Preparation method of metal-silicon oxide-metal capacitor |
| CN102779731A (en) * | 2012-08-16 | 2012-11-14 | 上海华力微电子有限公司 | Preparation method of multi-layer metal-silicon oxide-metal capacitor |
| CN102856195A (en) * | 2012-04-17 | 2013-01-02 | 上海华力微电子有限公司 | Method for manufacturing metal-silicon oxide-metal capacitor |
| CN102903612A (en) * | 2012-09-19 | 2013-01-30 | 上海集成电路研发中心有限公司 | Manufacture method of metal-oxide-metal capacitor |
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| CN1624894A (en) * | 2003-12-05 | 2005-06-08 | 中芯国际集成电路制造(上海)有限公司 | Laminated method insulator metal capacitor and manufacturing method thereof |
| CN101452830A (en) * | 2007-11-30 | 2009-06-10 | 中芯国际集成电路制造(上海)有限公司 | Capacitor manufacturing method capable of improving electrical behavior |
| CN101577227A (en) * | 2008-05-05 | 2009-11-11 | 中芯国际集成电路制造(北京)有限公司 | Forming methods of silicon nitride film and MIM capacitor |
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2011
- 2011-11-30 CN CN 201110392607 patent/CN102386064B/en active Active
Patent Citations (3)
| Publication number | Priority date | Publication date | Assignee | Title |
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| CN1624894A (en) * | 2003-12-05 | 2005-06-08 | 中芯国际集成电路制造(上海)有限公司 | Laminated method insulator metal capacitor and manufacturing method thereof |
| CN101452830A (en) * | 2007-11-30 | 2009-06-10 | 中芯国际集成电路制造(上海)有限公司 | Capacitor manufacturing method capable of improving electrical behavior |
| CN101577227A (en) * | 2008-05-05 | 2009-11-11 | 中芯国际集成电路制造(北京)有限公司 | Forming methods of silicon nitride film and MIM capacitor |
Cited By (10)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| CN102623305A (en) * | 2012-03-23 | 2012-08-01 | 上海华力微电子有限公司 | Metal-multilayer insulator-metal capacitor as well as preparation method and integrated circuit thereof |
| CN102623306A (en) * | 2012-03-23 | 2012-08-01 | 上海华力微电子有限公司 | Metal-multilayer insulator-metal capacitor, manufacture method for same and integrated circuit thereof |
| CN102623306B (en) * | 2012-03-23 | 2014-04-09 | 上海华力微电子有限公司 | Metal-multilayer insulator-metal capacitor, manufacture method for same and integrated circuit thereof |
| CN102623305B (en) * | 2012-03-23 | 2015-01-07 | 上海华力微电子有限公司 | Metal-multilayer insulator-metal capacitor as well as preparation method and integrated circuit thereof |
| CN102709154A (en) * | 2012-04-17 | 2012-10-03 | 上海华力微电子有限公司 | Manufacture method of metal-multilayer insulator-metal capacitor |
| CN102856195A (en) * | 2012-04-17 | 2013-01-02 | 上海华力微电子有限公司 | Method for manufacturing metal-silicon oxide-metal capacitor |
| CN102779735A (en) * | 2012-08-16 | 2012-11-14 | 上海华力微电子有限公司 | Preparation method of multi-layer metal-silicon oxide-metal capacitor |
| CN102779736A (en) * | 2012-08-16 | 2012-11-14 | 上海华力微电子有限公司 | Preparation method of metal-silicon oxide-metal capacitor |
| CN102779731A (en) * | 2012-08-16 | 2012-11-14 | 上海华力微电子有限公司 | Preparation method of multi-layer metal-silicon oxide-metal capacitor |
| CN102903612A (en) * | 2012-09-19 | 2013-01-30 | 上海集成电路研发中心有限公司 | Manufacture method of metal-oxide-metal capacitor |
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| CN102386064B (en) | 2013-08-14 |
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