CN102378502B - Circuit board and manufacturing method thereof - Google Patents
Circuit board and manufacturing method thereof Download PDFInfo
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- CN102378502B CN102378502B CN2010102542957A CN201010254295A CN102378502B CN 102378502 B CN102378502 B CN 102378502B CN 2010102542957 A CN2010102542957 A CN 2010102542957A CN 201010254295 A CN201010254295 A CN 201010254295A CN 102378502 B CN102378502 B CN 102378502B
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Abstract
The invention discloses a circuit board and a manufacturing method thereof. According to the manufacturing method of the circuit board, a substrate having an opening, a first line layer and a second line layer are provided, wherein the opening penetrates the substrate; the substrate has a first surface and a second surface that is opposite to the first surface; and the first line layer and the second line layer are respectively configured on the first surface and the second surface. And then, a releasing layer is formed in the opening; a first build-up line structure is formed on the first surface and the releasing layer; and a second build-up line structure is formed on second surface and the releasing layer. Besides, the first build-up line structure is cut along the vicinity of releasing layer; and then the releasing layer and a portion of the cut first build-up line structure are removed, wherein the portion of the cut first build-up line structure is on the releasing layer, so that a recess is formed.
Description
Technical field
The present invention relates to a kind of wiring board and manufacture method thereof, and particularly relate to a kind of wiring board and manufacture method thereof with depression (cavity).
Background technology
In recent years, along with making rapid progress of electronic technology, coming out one after another of high-tech electronic industry, make electronic product more humane, with better function constantly weed out the old and bring forth the new, and towards light, thin, short, little trend design.In these electronic products, usually can configure installing electronic elements wiring board thereon.For the gross thickness of the electronic component that reduces wiring board and be installed on it to meet the demand of thinning, except the thickness that reduces electronic component, forming in the circuit board and being used for the depression of accommodating part or all of electronic component or opening is common thinning means at present.Japan Patent JP H10-022645 has disclosed a kind of manufacture method with wiring board of depression.
Summary of the invention
The object of the present invention is to provide a kind of manufacture method of wiring board, in order to produce the wiring board with depression.
Another purpose of the present invention is to provide a kind of wiring board, and it has depression with the holding electronic element.
For reaching above-mentioned purpose, the present invention proposes a kind of manufacture method of wiring board, and the method is that substrate, the first line layer and the second line layer with opening first is provided.This opening runs through substrate.Substrate has first surface and the second surface relative with first surface, and the first line layer and the second line layer are configured in respectively on first surface and second surface.Then, in opening, form release layer.On first surface and release layer, form the first build-up circuit structure.On second surface and release layer, form the second build-up circuit structure.Then, around release layer, cut the first build-up circuit structure.Afterwards, remove release layer and be positioned at the part first build-up circuit structure of having cut on release layer, to form a depression.
A kind of wiring board of the another proposition of the present invention, it comprises substrate, the first line layer, the second line layer, the first build-up circuit structure and the second build-up circuit structure.Substrate has opening, and this opening runs through substrate.Substrate has first surface and the second surface relative with first surface.The first line layer is disposed on first surface.The second line layer is disposed on second surface.The first build-up circuit structure is disposed on first surface and exposes the end of opening near first surface.The second build-up circuit structure is disposed on second surface and seals the end of opening near second surface, with substrate and the first build-up circuit structure, to form a depression.
Based on above-mentioned, the present invention increased the mode of layer before the both sides of substrate form first and second build-up circuit structure in utilization, first in the opening of substrate, form release layer, therefore cutting manufacture craft with after cutting the first build-up circuit structure, can be by from the shape layer, removing rapidly the part first build-up circuit structure of having cut from shape layer top.
For above-mentioned feature and advantage of the present invention can be become apparent, embodiment cited below particularly, and coordinate appended accompanying drawing to be described in detail below.
The accompanying drawing explanation
Figure 1A to Fig. 1 I is the cutaway view of the manufacture method of the wiring board that illustrates according to the embodiment of the present invention;
Fig. 2 removes release layer and top thereof the cutaway view of cutting part for what according to another embodiment of the present invention, illustrate.
The main element symbol description
10: wiring board
100: substrate
100a: first surface
100b: second surface
102,114,124: the line material layer
102a: the first line layer
102b: the second line layer
104: opening
106: through hole
108: metal level
109: the consent material
110: the first build-up circuit structures
112a, 112b, 112c, 122a, 122b, 122c: increase a layer dielectric layer
114a, 114b, 114c, 124a, 124b, 124c: build-up circuit layer
116,126: blind hole
118a, 118b, 118c, 128a, 128b, 128c: conduction duct
120: the second build-up circuit structures
150: the first welding resisting layers
152: the second welding resisting layers
200: release layer
220: depression
300: centre hole
302: thimble
Embodiment
Figure 1A to Fig. 1 I is the cutaway view of the manufacture method of the wiring board that illustrates according to the embodiment of the present invention.At first, please refer to Figure 1A, a substrate 100 and two line material layers 102 are provided.Substrate 100 is for example dielectric core (dielectric core).Substrate 100 has a first surface 100a respect to one another and a second surface 100b.The material that these line material layers 102 are disposed at respectively first surface 100a and upper these line material layers 102 of second surface 100b for example is metal.Afterwards, in substrate 100 and these line material layers 102, form an opening 104 and at least one through hole 106 that runs through substrate 100.Opening 102 is for example laser drill or machine drilling with the formation method of through hole 106.
Then, please refer to Figure 1B, carry out electroplating manufacturing process, on the sidewall at opening 104 and through hole 106, to form metal level 108, to connect these line material layers 102.Afterwards, carry out making plug holes, in through hole 106, to insert consent material 109.
Then, please refer to Fig. 1 C, carry out the patterning manufacture craft, with these line material layers 102 with part of the part metals layer 108 on the sidewall that removes opening 104, on first surface 100a, to form one first line layer 102a, and in the upper one second line layer 102b that forms of second surface 100b.
Then, please refer to Fig. 1 D, in opening 104, form release layer 200.The formation method of release layer 200 is for example to embed manufacture craft, separated type material is embedded to opening 104.The material of release layer 200 is to be easy to the material separated with dielectric material, is for example polytetrafluoroethylene (polytetrafluoroethene, PTFE) or metal.
Then, please refer to Fig. 1 E, utilize the mode that increases layer (build-up), on first surface 100a, form one and increase layer dielectric layer 112a and a line material layer 114, and formation one increases layer dielectric layer 122a and a line material layer 124 on second surface 100b. Line material layer 114 and 124 material are metal, for example copper.Afterwards, in increasing layer dielectric layer 112a and line material layer 114, form at least one blind hole 116, and in increasing layer dielectric layer 122a and line material layer 124, form at least one blind hole 126.Blind hole 116 exposes the first line layer 102a of part, and blind hole 126 exposes the second line layer 102b of part. Blind hole 116 and 126 formation method are for example laser drill.
Subsequently, please refer to Fig. 1 F, carry out electroplating manufacturing process, in blind hole 116, form conduction duct 118a, with electrical interconnection material layer 114 and the first line layer 102a, and in blind hole 126, form conduction duct 128a, with electrical interconnection material layer 124 and the first line layer 102b.Afterwards, line material layer 114 and line material layer 124 are carried out to the patterning manufacture craft, to form build-up circuit layer 114a and build-up circuit layer 124a.
Then, please refer to Fig. 1 G, repeat twice Fig. 1 E and the described step of Fig. 1 F, to increase a layer dielectric layer 112b, build-up circuit layer 114b, increase layer dielectric layer 112c and build-up circuit layer 114c increasing on layer dielectric layer 112a and build-up circuit layer 114a to form, and increase a layer dielectric layer 122b, build-up circuit layer 124b, increase layer dielectric layer 122c and build-up circuit layer 124c increasing formation on layer dielectric layer 122a and build-up circuit layer 124a.In addition, build-up circuit layer 114b is electrically connected to build-up circuit layer 114a by passing the conduction duct 118b that increases layer dielectric layer 112b; Build-up circuit layer 114c is electrically connected to build-up circuit layer 114b by passing the conduction duct 118c that increases layer dielectric layer 112c; Build-up circuit layer 124b is electrically connected to build-up circuit layer 124a by passing the conduction duct 128b that increases layer dielectric layer 122b; Build-up circuit layer 124c is electrically connected to build-up circuit layer 124b by passing the conduction duct 128c that increases layer dielectric layer 122c.
In the present embodiment, increase a layer dielectric layer 112a, build-up circuit layer 114a, the conduction duct 118a, increase a layer dielectric layer 112b, build-up circuit layer 114b, the conduction duct 118b, increase a layer dielectric layer 112c, build-up circuit layer 114c with the conduction duct 118c formed the first build-up circuit structure 110.Increase a layer dielectric layer 122a, build-up circuit layer 124a, the conduction duct 128a, increase a layer dielectric layer 122b, build-up circuit layer 124b, the conduction duct 128b, increase a layer dielectric layer 122c, build-up circuit layer 124c with the conduction duct 128c formed the second build-up circuit structure 120.
In simple terms, in the present embodiment, the first build-up circuit structure 110 and the second build-up circuit structure 120 comprise respectively three layers increase layer dielectric layer and build-up circuit layer.Certainly, in other embodiments, also can look actual demand and Fig. 1 E and the described step of Fig. 1 F are repeated to required number of times, meaning namely, makes the first build-up circuit structure 110 and the second build-up circuit structure 120 comprise respectively one or more layers of layer dielectric layer and the build-up circuit layer of increasing.
Then, please refer to Fig. 1 H, optionally on the first build-up circuit structure 110 and the second build-up circuit structure 120, form respectively one first welding resisting layer 150 and one second welding resisting layer 152.In the present embodiment, first and second welding resisting layer 150 and 152 covers respectively outermost build-up circuit layer (being build-up circuit layer 114c and build-up circuit layer 124c).
Then, please continue the H with reference to Fig. 1, cut the first build-up circuit structure 110 around release layer 200.The step of cutting the first build-up circuit structure 110 is for example to carry out laser cutting.Special one carry be, in the present embodiment, owing in substrate 100, being pre-formed opening 104, and in opening 104, formed release layer 200, therefore when carrying out above-mentioned cutting manufacture craft, only need to cut off the first build-up circuit structure 110 and do not need to cut off substrate 100, thereby can effectively shorten clipping time.
Afterwards, please refer to Fig. 1 I, remove release layer 200 and be positioned at the part first build-up circuit structure 110 of having cut on release layer 200, to form a depression 220, and completing the manufacture of the wiring board 10 of the present embodiment, its pocket 220 can be used for accommodating chip or other electronic components.Because the material selection of release layer 200 is easy to the material separated with dielectric material, for example polytetrafluoroethylene or metal, therefore can directly peel off release layer 200 easily in opening 104 in this step.
In addition, in another embodiment, also can utilize thimble (lift pin) by release layer 200 from opening 104, ejecting.
Fig. 2 removes release layer and top thereof the cutaway view of cutting part for what according to another embodiment of the present invention, illustrate.Please refer to Fig. 2, in the present embodiment, can first in the second build-up circuit structure 120, form the centre hole 300 of the bottom that exposes release layer 200.Then, make thimble 302 by centre hole 300 by release layer 200 be located thereon the part first build-up circuit structure 110 of having cut and eject, to form depression 220.
Fig. 1 I of below take is example, and the wiring board of the present embodiment is explained.
Please refer to Fig. 1 I, wiring board 10 comprises substrate 100, the first line layer 102a, the second line layer 102b, the first build-up circuit structure 110, the second build-up circuit structure 120, the first welding resisting layer 150 and the second welding resisting layer 152.
In the present embodiment, the first build-up circuit structure 110 comprise increase a layer dielectric layer 112a, build-up circuit layer 114a, the conduction duct 118a, increase a layer dielectric layer 112b, build-up circuit layer 114b, the conduction duct 118b, increase a layer dielectric layer 112c, build-up circuit layer 114c with the conduction duct 118c.The second build-up circuit structure 120 comprise increase a layer dielectric layer 122a, build-up circuit layer 124a, the conduction duct 128a, increase a layer dielectric layer 122b, build-up circuit layer 124b, the conduction duct 128b, increase a layer dielectric layer 122c, build-up circuit layer 124c with the conduction duct 128c.
In simple terms, in the present embodiment, the first build-up circuit structure 110 and the second build-up circuit structure 120 comprised respectively three layers increase layer dielectric layer and build-up circuit layer.Yet, in other embodiments, the also visual actual demand and comprise respectively one or more layers of layer dielectric layer and the build-up circuit layer of increasing of the first build-up circuit structure 110 and the second build-up circuit structure 120.
In addition; the first welding resisting layer 150 and the second welding resisting layer 152 optionally are disposed at respectively and increase on layer dielectric layer 112c and 122c; and cover outermost build-up circuit layer (being build-up circuit layer 114c and build-up circuit layer 124c), with protection build-up circuit layer 114c and build-up circuit layer 124c.In addition, in substrate 100, also dispose metal level 108, be electrically connected with the first line layer 102a and the second line layer 102b that will be positioned at substrate 100 2 sides.
In addition, in another embodiment, the Fig. 2 of take is example, for part the first build-up circuit structure 110 of utilizing thimble 302 that release layer 200 and its top have been cut ejects, the second build-up circuit structure 120 can also have centre hole 300, it runs through the second build-up circuit structure 120 and arrives depression 220, is beneficial to thimble 302 and passes ejection from shape layer 200 via centre hole 300.
In sum, the present invention increased the mode of layer before two sides of substrate form the first build-up circuit structure and the second build-up circuit structure in utilization, in the opening prior to substrate, form release layer, therefore cutting manufacture craft with after cutting the first build-up circuit structure, can be by from the shape layer, removing rapidly the part first build-up circuit structure of having cut from shape layer top.
In addition, before forming the first build-up circuit structure and the second build-up circuit structure, substrate has been pre-formed opening, and therefore after cutting the first build-up circuit structure, cutting substrate to be to increase the degree of depth of depression again, thereby can effectively shorten clipping time.
In addition, before forming the first build-up circuit structure and the second build-up circuit structure, substrate has been pre-formed opening, therefore without certain the build-up circuit layer near substrate by the second build-up circuit structure, forms the laser barrier zones, with the wiring area of the aforementioned build-up circuit layer that avoids waste.
Although disclosed the present invention in conjunction with above embodiment; yet it is not in order to limit the present invention; under any, be familiar with this operator in technical field; without departing from the spirit and scope of the present invention; can do a little change and retouching, thus protection scope of the present invention should with enclose claim was defined is as the criterion.
Claims (9)
1. the manufacture method of a wiring board comprises:
One substrate, one first line layer and one second line layer are provided, this substrate has opening, this opening runs through this substrate, this substrate has first surface and the second surface relative with this first surface, and this first line layer and this second line layer are configured in respectively on this first surface and this second surface;
In this opening, form a release layer;
On this first surface and this release layer, form the first build-up circuit structure;
On this second surface and this release layer, form the second build-up circuit structure;
Around along this from the shape layer, cut this first build-up circuit structure; And
Remove this release layer and be positioned at this first build-up circuit structure of part of having cut on this release layer, to form a depression.
2. the manufacture method of wiring board as claimed in claim 1, wherein the material of this release layer comprises polytetrafluoroethylene or metal.
3. the manufacture method of wiring board as claimed in claim 1, the step that wherein forms this release layer comprise separated type material are embedded to this opening.
4. the manufacture method of wiring board as claimed in claim 1, wherein remove this release layer and the step that is positioned at this first build-up circuit structure of part on this release layer comprise directly peel off or utilize thimble pass this second build-up circuit by this release layer be positioned at this first build-up circuit structure of part of having cut on this release layer and eject.
5. the manufacture method of wiring board as claimed in claim 1, the step of wherein cutting this first build-up circuit structure comprises carries out laser cutting.
6. the manufacture method of wiring board as claimed in claim 1 also comprises:
On this first build-up circuit structure, form one first welding resisting layer; And
On this second build-up circuit structure, form one second welding resisting layer.
7. wiring board comprises:
Substrate, have opening, and this opening runs through this substrate, and this substrate has first surface and the second surface relative with this first surface;
The first line layer, be disposed on this first surface;
The second line layer, be disposed on this second surface;
The first build-up circuit structure, be configured on first surface, and expose the end of this opening near this first surface; And
The second build-up circuit structure, be configured on second surface, and seal this opening near an end of this second surface, with this substrate and this first build-up circuit structure, to form a depression, wherein this second build-up circuit structure has centre hole, and this centre hole runs through this second build-up circuit structure and arrives this depression.
8. wiring board as claimed in claim 7, wherein this substrate is a dielectric core.
9. wiring board as claimed in claim 7 also comprises:
The first welding resisting layer, be disposed on this first build-up circuit structure; And
The second welding resisting layer, be disposed on this second build-up circuit structure.
Priority Applications (1)
| Application Number | Priority Date | Filing Date | Title |
|---|---|---|---|
| CN2010102542957A CN102378502B (en) | 2010-08-13 | 2010-08-13 | Circuit board and manufacturing method thereof |
Applications Claiming Priority (1)
| Application Number | Priority Date | Filing Date | Title |
|---|---|---|---|
| CN2010102542957A CN102378502B (en) | 2010-08-13 | 2010-08-13 | Circuit board and manufacturing method thereof |
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| Publication Number | Publication Date |
|---|---|
| CN102378502A CN102378502A (en) | 2012-03-14 |
| CN102378502B true CN102378502B (en) | 2013-11-27 |
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| CN2010102542957A Active CN102378502B (en) | 2010-08-13 | 2010-08-13 | Circuit board and manufacturing method thereof |
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| TWI646872B (en) * | 2018-01-11 | 2019-01-01 | Nan Ya Printed Circuit Board Corporation | Circuit board structures and methods for fabricating the same |
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| CN101527266A (en) * | 2008-03-06 | 2009-09-09 | 钰桥半导体股份有限公司 | Manufacture method for layer-adding circuit board |
| CN101677066A (en) * | 2008-09-19 | 2010-03-24 | 钰桥半导体股份有限公司 | Build-up circuit board manufacturing method |
| CN101677067A (en) * | 2008-09-19 | 2010-03-24 | 钰桥半导体股份有限公司 | Copper core layer multilayer packaging substrate manufacturing method |
| CN101677068A (en) * | 2008-09-19 | 2010-03-24 | 钰桥半导体股份有限公司 | Copper core layer multilayer packaging substrate manufacturing method |
| CN101777548A (en) * | 2009-01-13 | 2010-07-14 | 日月光半导体制造股份有限公司 | Substrate with built-in chip and manufacturing method thereof |
| CN101789383A (en) * | 2009-01-23 | 2010-07-28 | 欣兴电子股份有限公司 | Method for making packaging substrate with recess structure |
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2010
- 2010-08-13 CN CN2010102542957A patent/CN102378502B/en active Active
Patent Citations (7)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| CN101136385A (en) * | 2006-08-29 | 2008-03-05 | 欣兴电子股份有限公司 | Internally burying type chip packaging manufacture process and circuit board having the same |
| CN101527266A (en) * | 2008-03-06 | 2009-09-09 | 钰桥半导体股份有限公司 | Manufacture method for layer-adding circuit board |
| CN101677066A (en) * | 2008-09-19 | 2010-03-24 | 钰桥半导体股份有限公司 | Build-up circuit board manufacturing method |
| CN101677067A (en) * | 2008-09-19 | 2010-03-24 | 钰桥半导体股份有限公司 | Copper core layer multilayer packaging substrate manufacturing method |
| CN101677068A (en) * | 2008-09-19 | 2010-03-24 | 钰桥半导体股份有限公司 | Copper core layer multilayer packaging substrate manufacturing method |
| CN101777548A (en) * | 2009-01-13 | 2010-07-14 | 日月光半导体制造股份有限公司 | Substrate with built-in chip and manufacturing method thereof |
| CN101789383A (en) * | 2009-01-23 | 2010-07-28 | 欣兴电子股份有限公司 | Method for making packaging substrate with recess structure |
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| CN102378502A (en) | 2012-03-14 |
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