CN102263030B - Method for manufacturing groove-type power device - Google Patents
Method for manufacturing groove-type power device Download PDFInfo
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- CN102263030B CN102263030B CN 201010189988 CN201010189988A CN102263030B CN 102263030 B CN102263030 B CN 102263030B CN 201010189988 CN201010189988 CN 201010189988 CN 201010189988 A CN201010189988 A CN 201010189988A CN 102263030 B CN102263030 B CN 102263030B
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Abstract
The embodiment of the invention discloses a method for manufacturing a groove-type power device and relates to the technical field of a semiconductor process. The method is invented for solving the problem of polycrystalline silicon residuals caused by the bulges on the surface of polycrystalline silicon and the polymer residuals in a polycrystalline silicon dry etching process. The method for manufacturing the groove-type power device comprises the following steps: arranging a hard mask layer on a substrate; arranging a transition layer on the hard mask layer; photo-etching the transition layer, thereby forming a groove window; forming a groove in an area corresponding to the groove window on the substrate; filling the polycrystalline silicon in the groove; and grinding the polycrystalline silicon in the area outside the groove in polishing manner. The method can be applied to the fields of manufacturing a semiconductor chip and an integrated circuit.
Description
Technical field
The present invention relates to the semiconductor process techniques field, relate in particular to a kind of preparation method of slot type power device.
Background technology
Slot type power device has the puncture voltage height, and conducting resistance is low, and switching speed waits remarkable advantage soon, has become the main flow power device in the fields such as integrated circuit.The preparation method of existing slot type power device generally includes following steps: the hard mask of growing (Hard mask) layer; Carry out photoetching at hard mask, expose trench region; Form groove (Trench); Carry out the deposit of polysilicon, filling groove; Adopt dry etching to carry out eat-backing of polysilicon, remove unnecessary polysilicon; Afterwards, also comprise the formation tagma; Form the source region; Form insulating medium layer, contact hole, the steps such as metal level and passivation layer.
State in realization in the preparation process of slot type power device, the inventor finds that there are the following problems at least in the prior art: existing preparation method causes the residual of polysilicon easily.This be because, adopt dry etching to carry out in the step of eat-backing of polysilicon, as shown in Figure 1, need the polysilicon area of etching large, and thicker, so the by-product polymerizing thing that produces in the process of etching is more, as shown in Figure 2, might cover the subregion on polycrystal layer surface, cause the further normal etching of subregion to be hindered, will after etching, stay block residue.In addition because the polycrystalline bed thickness, in the operation of polysilicon deposit, the polycrystalline surface can produce some point-like protrusion this when also can cause polycrystalline to eat-back, can not etching clean, cause the residual of polysilicon.And if cause residual polycrystalline silicon, cause the most at last the gate-source short circuit of device architecture, produce electric leakage, have a strong impact on rate of finished products.
Summary of the invention
Embodiments of the invention provide a kind of preparation method of slot type power device, can effectively solve because the residual polycrystalline silicon problem that polymer residue causes in the projection of polysilicon surface and the polysilicon dry etching process.
For achieving the above object, embodiments of the invention adopt following technical scheme:
A kind of preparation method of slot type power device comprises:
At substrate hard mask layer is set;
At described hard mask layer transition zone is set;
Carry out photoetching at described transition zone, form trench openings;
Zone corresponding with described trench openings on described substrate forms groove;
In described groove, fill polysilicon;
Adopt the mode of polishing that the polysilicon grinding of described groove with exterior domain fallen.
After adopting technique scheme, the preparation method of the slot type power device that the embodiment of the invention provides, by changing technological process, before etching groove, increase one deck transition zone, the polishing mode of following adopted polysilicon replaces present polysilicon dry etching, solves because the polycrystalline residue problem that polymer residue causes in the projection on polycrystalline surface and the polycrystalline dry etching process, and then solved the gate-source electric leakage problem of finished product device, greatly improve rate of finished products.In addition, with respect to dry etching, adopt the mode of polishing, further reduced cost.
Description of drawings
In order to be illustrated more clearly in the embodiment of the invention or technical scheme of the prior art, the below will do to introduce simply to the accompanying drawing of required use in embodiment or the description of the Prior Art, apparently, accompanying drawing in the following describes only is some embodiments of the present invention, for those of ordinary skills, under the prerequisite of not paying creative work, can also obtain according to these accompanying drawings other accompanying drawing.
Fig. 1 is the view of carrying out in the prior art before polysilicon eat-backs;
Fig. 2 is the view of carrying out in the prior art after polysilicon eat-backs;
The preparation method's that Fig. 3 provides for the embodiment of the invention process chart;
Fig. 4 (a) is the process chart of the embodiment of the invention one;
Fig. 4 (b) is the implementation result figure corresponding with the technological process shown in Fig. 4 (a).
Embodiment
Below in conjunction with the accompanying drawing in the embodiment of the invention, the technical scheme in the embodiment of the invention is clearly and completely described, obviously, described embodiment only is the present invention's part embodiment, rather than whole embodiment.Based on the embodiment among the present invention, those of ordinary skills belong to the scope of protection of the invention not making the every other embodiment that obtains under the creative work prerequisite.
As shown in Figure 3, the preparation method of a kind of slot type power device that the embodiment of the invention provides comprises the steps:
S11 arranges hard mask layer at substrate;
S12 arranges transition zone at described hard mask layer;
S13 carries out photoetching at described transition zone, forms trench openings;
S14, zone corresponding with described trench openings on described substrate forms groove;
S15 fills polysilicon in described groove;
S16 adopts the mode of polishing that the polysilicon grinding of described groove with exterior domain fallen.
The preparation method of the slot type power device that the embodiment of the invention provides can effectively solve because the residual polycrystalline silicon problem that polymer residue causes in the projection of polysilicon surface and the polysilicon dry etching process.
Wherein, the stop-layer that the transition zone that deposits in the S11 step will polish as follow-up S16 step can adopt silicon nitride (Si
3N
4) layer.Because Si
3N
4Physical property and polysilicon different, therefore the speed of polishing is different, so carry out groove when grinding with the polishing of exterior domain in the S16 step, when the polishing speed of polissoir monitoring changes, just can judge that groove has been polished totally with the polysilicon of exterior domain, namely in the S16 step, adopt the mode of polishing to carry out groove with the grinding of the polysilicon of exterior domain, when polishing speed changes, just can stop polishing.Here attention is, can also adopt the transition zone of other materials, does not do restriction here.
Further, the polishing mode that adopts in the S16 step is preferably chemico-mechanical polishing.Chemico-mechanical polishing has added chemicals in mechanical polishing, can react with polished thing, makes the burnishing surface of polished thing more smooth, also reduces further the chance of residual polycrystalline silicon.
In addition, the polishing precision of zones of different is difference slightly, if some zone mill is few, possible these zones have the residual of a small amount of polysilicon.Therefore, in order to guarantee that groove is removed totally fully with the polysilicon of exterior domain, avoid the residual of polysilicon, can adopt the mode of excessive polishing, with transition zone, such as Si
3N
4Layer also grinds off, and namely the S16 step specifically can be: adopt the mode of polishing to carry out groove with the grinding of the polysilicon of exterior domain; When polishing speed changes, proceed to stop polishing after the polishing of certain hour.Wherein, the time of excessive polishing can be grasped flexibly according to the thickness of actual conditions and transition zone.
In order to make those skilled in the art better understand technical scheme of the present invention, also embodiments of the present invention is described in detail by reference to the accompanying drawings below by specific embodiment.Here be noted that following specific embodiment just in order to describe the present invention, but be not limited to the present invention.
Embodiment one
Present embodiment is groove-shaped dual diffuse metal conductor oxidate (DMOS, Doubl-Deffused Metel Oxide Semiconductor) preparation method of field effect transistor, as shown in Figure 4, wherein, Fig. 4 (a) is the process chart of present embodiment, Fig. 4 (b) is the implementation result figure corresponding with the technological process of Fig. 4 (a), comprises the following steps:
S21 is at Si Grown SiO
2Hard mask layer;
The implementation result of this step is seen S21 '.
S22 is at SiO
2Deposit Si on the hard mask layer
3N
4Transition zone;
The implementation result of this step is seen S22 '.Si
3N
4Transition zone will be as the polysilicon stop-layer that polish of subsequent step to zone outside the groove.
S23 is at Si
3N
4Carry out photoetching on the transition zone, form trench openings;
The implementation result of this step is seen S23 '.
S24 adopts dry plasma etch, and zone corresponding with trench openings on the Si substrate forms groove;
In this step, at first successively to Si
3N
4Transition zone and SiO
2Dry etching is carried out in the zone that hard mask layer is corresponding with trench openings, opens hard mask layer and transition zone, exposes the zone that needs to form groove on the substrate; Then to the trench region on the Si substrate, namely dry etching is carried out in the zone corresponding with trench openings, forms groove, and channel bottom is carried out round and smooth processing, and implementation result is seen S24 '.
S25 carries out the oxidation of trench wall;
The implementation result of this step is seen S25 '.
S26 fills polysilicon in groove;
The implementation result of this step is seen S26 '.
S27, the mode of employing chemico-mechanical polishing grinds away polycrystalline regional outside the groove.
In this step, will judge polishing by the detection to polishing speed.Because Si
3N
4Polishing speed and polysilicon different, when the polishing speed of polissoir monitoring changes, just can judge that groove has been polished totally with the polysilicon of exterior domain.But for groove being removed totally fully with the polycrystalline of exterior domain, this step can adopt the mode of excessive polishing, when polishing speed changes, continues the polishing regular hour, with Si
3N
4Layer also grinds off, and like this, just can avoid the residual of polysilicon fully.And compare with dry etching, the cost of chemico-mechanical polishing is lower, has also just reduced the process costs of preparation slot type power device.The implementation result of this step is seen S27 '.
After the S27 step, first with the Si on the Si substrate
3N
4Transition zone and SiO
2Hard mask layer removes, and then comprises forming P type tagma, forms the source region, forms all the other steps such as insulating medium layer, contact hole, metal level and passivation layer.It is pointed out that these steps all can get final product according to the preparation method of the groove type DMOS of routine, since same as the prior art, repeat no more here.
In sum, the preparation method of the slot type power device that the embodiment of the invention provides, by changing technological process, before etching groove, increase one deck transition zone, the polishing mode of following adopted polysilicon replaces present polysilicon dry etching, solves because the residual polycrystalline silicon problem that polymer residue causes in the projection of polysilicon surface and the polysilicon dry etching process, and then solved gate-source short circuit, the electric leakage problem of finished product, greatly improve rate of finished products.In addition, with respect to dry etching, adopt the mode of polishing, further reduced cost.
The above; be the specific embodiment of the present invention only, but protection scope of the present invention is not limited to this, anyly is familiar with those skilled in the art in the technical scope that the present invention discloses; can expect easily changing or replacing, all should be encompassed within protection scope of the present invention.Therefore, protection scope of the present invention should be as the criterion with the protection range of described claim.
Claims (3)
1. the preparation method of a slot type power device is characterized in that, comprising:
At substrate hard mask layer is set;
At described hard mask layer transition zone is set;
Carry out photoetching at described transition zone, form trench openings;
Zone corresponding with described trench openings on described substrate forms groove;
In described groove, fill polysilicon;
Adopt the mode of polishing that the polysilicon grinding of described groove with exterior domain fallen;
The mode of described employing polishing is fallen to be specially with the polysilicon grinding of described groove with exterior domain:
Adopt the mode of polishing to carry out described groove with the grinding of the polysilicon of exterior domain, when polishing speed changes, stop polishing, perhaps when polishing speed changes, proceed to stop to polish after the polishing of certain hour.
2. method according to claim 1 is characterized in that, described transition zone is Si
3N
4Layer.
3. method according to claim 1 is characterized in that, the mode of described employing polishing is fallen to be specially with the polysilicon grinding of described groove with exterior domain:
Adopt the mode of chemico-mechanical polishing that the polysilicon grinding of described groove with exterior domain fallen.
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|---|---|---|---|
| CN 201010189988 CN102263030B (en) | 2010-05-25 | 2010-05-25 | Method for manufacturing groove-type power device |
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| Application Number | Priority Date | Filing Date | Title |
|---|---|---|---|
| CN 201010189988 CN102263030B (en) | 2010-05-25 | 2010-05-25 | Method for manufacturing groove-type power device |
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| CN102263030A CN102263030A (en) | 2011-11-30 |
| CN102263030B true CN102263030B (en) | 2013-04-10 |
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Families Citing this family (2)
| Publication number | Priority date | Publication date | Assignee | Title |
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| CN103000534B (en) * | 2012-12-26 | 2017-06-09 | 上海华虹宏力半导体制造有限公司 | Groove-type P-type metal oxide semiconductor power transistor manufacture method |
| CN106252405B (en) * | 2015-06-15 | 2019-04-05 | 北大方正集团有限公司 | Super-junction structure and its lithographic method and field effect transistor with the super-junction structure |
Citations (5)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| CN1438683A (en) * | 2001-12-20 | 2003-08-27 | 东部电子株式会社 | Method for short-channel transistor of semiconductor element |
| CN1700447A (en) * | 2004-05-20 | 2005-11-23 | 中芯国际集成电路制造(上海)有限公司 | Use of chemical and mechanical polishing in joining polycrystalline silicon plug bolt manufacture and arrangement thereof |
| CN101345209A (en) * | 2003-12-12 | 2009-01-14 | 三星电子株式会社 | Slurry compositions and CMP methods using the same |
| CN101567338A (en) * | 2009-06-04 | 2009-10-28 | 上海宏力半导体制造有限公司 | Manufacturing method for power MOS transistor |
| CN101872724A (en) * | 2009-04-24 | 2010-10-27 | 上海华虹Nec电子有限公司 | Manufacturing method of super junction MOSFET (Metal-Oxide-Semiconductor Field-Effect Transistor) |
-
2010
- 2010-05-25 CN CN 201010189988 patent/CN102263030B/en active Active
Patent Citations (5)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| CN1438683A (en) * | 2001-12-20 | 2003-08-27 | 东部电子株式会社 | Method for short-channel transistor of semiconductor element |
| CN101345209A (en) * | 2003-12-12 | 2009-01-14 | 三星电子株式会社 | Slurry compositions and CMP methods using the same |
| CN1700447A (en) * | 2004-05-20 | 2005-11-23 | 中芯国际集成电路制造(上海)有限公司 | Use of chemical and mechanical polishing in joining polycrystalline silicon plug bolt manufacture and arrangement thereof |
| CN101872724A (en) * | 2009-04-24 | 2010-10-27 | 上海华虹Nec电子有限公司 | Manufacturing method of super junction MOSFET (Metal-Oxide-Semiconductor Field-Effect Transistor) |
| CN101567338A (en) * | 2009-06-04 | 2009-10-28 | 上海宏力半导体制造有限公司 | Manufacturing method for power MOS transistor |
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Effective date of registration: 20220727 Address after: 518116 founder Microelectronics Industrial Park, No. 5, Baolong seventh Road, Baolong Industrial City, Longgang District, Shenzhen, Guangdong Province Patentee after: SHENZHEN FOUNDER MICROELECTRONICS Co.,Ltd. Address before: 100871, Beijing, Haidian District Cheng Fu Road 298, founder building, 5 floor Patentee before: PEKING UNIVERSITY FOUNDER GROUP Co.,Ltd. Patentee before: SHENZHEN FOUNDER MICROELECTRONICS Co.,Ltd. |
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