CN102254225A - Evolution hardware implementation method based on trend type compact genetic algorithm - Google Patents
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Abstract
An evolutionary hardware implementation method based on a trend-oriented compact genetic algorithm, the method comprising: 1) acquiring configuration parameters of an actual programmable logic device; 2) mapping the configuration parameters of the actual programmable logic device and forming a chromosome individual; 3) calculating the fitness value fitness of the current chromosome individual; 4) and judging whether the evolution is terminated or not according to the condition of the fitness value fitness. The invention provides an evolution hardware implementation method based on the trend type compact genetic algorithm, which can enhance the search capability of a hardware configuration structure bit string, improve the diversity of a candidate solution space, obtain the high-quality optimal hardware configuration structure bit string more quickly, greatly improve the convergence speed, reduce the time required for obtaining the optimal hardware circuit structure and enhance the real-time property of the actual evolution hardware.
Description
Technical field
The invention belongs to the computer control field, relate to a kind of implementation method of the hardware that develops, relate in particular to a kind of evolution hardware implementation method based on the compact genetic algorithm of trend type.
Background technology
Evolution hardware (Evolvable Hardware) is a kind of hardware circuit or large scale integrated circuit, and the structure that it can change self as biological variation according to environment has the function of self-organization, self-adaptation, selfreparing to adapt to its living environment.
Evolution hardware is by the simulating nature evolutionary process thought of evolution algorithmic to be used for the design of hardware physical arrangement, and mainly be made of two key elements: one is to be the programmable logic device (PLD) of representative with CPLD, FPGA, and another is an evolution algorithmic.The realization of evolution hardware is based upon on the basis of EVOLUTIONARY COMPUTATION and programmable logic device (PLD) development.
The ultimate principle of evolution hardware is configuration bit string that structure and performance of programmable logic device and parameter etc. the are formed evolution object as evolution algorithmic, produce the corresponding configuration bit string of current required realization function by the evolution operation of evolution algorithmic, again it is downloaded in the programmable logic device (PLD), through the demand adaptation degree comparison repeatedly and the operation of developing, constantly generate and level off to the configuration bit string of demand adaptation degree the best, obtain the hardware configuration of the most suitable current environment and action purpose at last, promptly by directly adjusting the configuration bit string of programmable logic device (PLD), thereby obtain the hardware configuration of required the best, to guarantee that hardware configuration is in the most suitable state always, keep it to work real-time and efficiently.
Evolution algorithmic is a kind of random search optimized Algorithm with robustness, and it seeks the optimum solution of problem by the biological evolution process of simulation the Nature according to the natural selection rule of the simple genetic manipulation and the survival of the fittest.Evolution algorithmic has features such as the highly-parallel of being suitable for and self-organization, self study, self-adaptation.When using evolution algorithmic that practical problems is found the solution, the relevant information that algorithm can utilize in the evolutionary process and be obtained is organized search behavior voluntarily on the one hand.On the other hand because evolution algorithmic adopts the mode of population to organize the search of carrying out optimum solution, thereby can search for simultaneously, therefore be particularly suitable for large-scale parallel a plurality of zones of the solution space of practical problems.
Compact genetic algorithm (CGA, Compact Genetic Algorithm) is a kind of in the evolution algorithmic commonly used, and its probability of use variable is described problem candidate solution space.Considering when realizing evolution hardware, require working time that evolution algorithmic consumes still less, is very unfavorable and carry out the needed time loss of evolution algorithmic by software.Therefore, the researcher begins consider to use hardware such as FPGA to carry out evolution algorithmic.The fundamental purpose that the CGA algorithm is suggested is exactly for evolution algorithmic is carried out on hardware better.By hard-wired CGA algorithm, reduced evolution algorithmic significantly in the consumption of working time.Come the problem of representation solution space owing to the probability of use variate-value simultaneously, thereby reduced storage resources required when hardware is realized.
Be convenient to hard-wired advantage although the CGA algorithm has, it only is applicable to and solves comparatively significantly simple problem of regularity, is easy to take place the local convergence phenomenon for complicated problems algorithm slightly in evolutionary process.In addition, before the probability variable convergence, the CGA algorithm is lost obtained outstanding through regular meeting and is separated.The most key is, when using the CGA algorithm to realize evolution hardware, because its search capability deficiency, speed of convergence are slow, the evolution hardware that causes being realized is difficult to be applicable to the demand of practical application.
Summary of the invention
In order to solve the above-mentioned technical matters that exists in the background technology, the invention provides a kind of search capability of hardware configuration structure bit string, evolution hardware implementation method that improves the diversity in candidate solution space, obtains the hardware configuration structure bit string of high-quality optimum quickly, improved speed of convergence significantly, reduced the needed time of hardware circuit that obtains optimum and strengthened the real-time of actual evolution hardware of strengthening based on the compact genetic algorithm of trend type.
Technical solution of the present invention is: the invention provides a kind of evolution hardware implementation method based on the compact genetic algorithm of trend type, its special character is: described evolution hardware implementation method based on the compact genetic algorithm of trend type may further comprise the steps:
1) obtains the configuration parameter of actual programmable logic device (PLD);
2) configuration parameter of the programmable logic device (PLD) of the reality that step 1) acquired is shone upon and form the chromosome individuality; Described chromosome individuality is to separate the binary string that mapping obtains by one in the practical problems solution space; The individual Chromosome={chrom[1 of described chromosome] ..., chrom[i] ..., chrom[L] }, each is for the individual winner={winr[1 of the optimum chromosome that develops] ..., winr[i] ..., winr[L] }, wherein L represents the length of chromosome individuality, the span of i is [1, L];
3) according to the input and output logical relation of the individual pairing evolution circuit of chromosome, calculate fitness value fitness when the prochromosome individuality; Described fitness value fitness represents the degree of conformity between the circuit logic function of current circuit logic function and practical problems demand;
4) whether the situation according to the fitness value fitness that step 3) acquired stops judging that if fitness equals zero, then evolutionary process finishes to developing; If fitness is not equal to zero, then continue execution in step 1)～step 4).
Above-mentioned steps 2) specific implementation is:
2.1) to the probability variable initialization;
2.2) obtain the individual winner of optimum chromosome;
2.3) hold back that tendency is judged and probability variable upgrades;
2.4) carry out mutation operation; Described mutation operation is meant in the coded strings of chromosome individuality, according to certain variation probability, uses some allelic value to replace genic value on wherein the change point, thereby forms new chromosome individuality.
Above-mentioned steps 2.1) specific implementation is:
2.1.1) make probability variable P={p[1], p[2] ..., p[i] ..., p[L] } be all 0.5, chrom[i among the individual Chromosome of the value representation chromosome of described probability variable P] be 1 probability, wherein the span of i is [1, L];
2.1.2) generate two individual Chromosome_a of separate initialization chromosome and Chromosome_b at random according to probability variable P, and individual Chromosome_a of chromosome and Chromosome_b are sent into evolutionary process first.
Above-mentioned steps 2.2) specific implementation is:
2.2.1) the individual Chromosome_a of two chromosomes and the Chromosome_b that at first will develop the present age compare, and selects fitness value better chromosome individuality among both, as the individual winner of current optimum chromosome;
2.2.2) by setting the resampling cycle, in evolutionary process, when identical generation with the cycle, use and the irrelevant probable value P_samp resampling of current probability variable value, generate the individual Chromosome_s of new chromosome, and itself and the individual winner of current optimum chromosome are compared, choose a side outstanding among both as new optimum chromosome individuality winner.
Above-mentioned steps 2.3) specific implementation is:
2.3.1) with each winr[i of the individual winner of optimum chromosome] reverse;
2.3.2) relatively the fitness value fitness_w of the individuality after each counter-rotating and the fitness value fitness_wn of former individuality;
2.3.3) if fitness_w greater than fitness_wn, then continue to judge winr[i] and value, if winr[i] value after reversing is 1, then upgrades p[i by increasing step-length et]; If winr[i] value after reversing is 0, then upgrades p[i by reducing step-length et]; Wherein upgrade step-length et and equal 1/N, N represents the population number; If fitness_w is less than fitness_wn, then do not carry out corresponding p[i] the renewal operation, i.e. p[i] remain unchanged.
Above-mentioned steps 2.4) specific implementation is to adopt binary coding to realize or the realization of employing random variation operator.
Above-mentioned steps 2.4) implementation is when adopting binary coding to realize in, described step 2.4) specific implementation is: to winr[i] value and probability variable value p[i thereof] judge, if p[i] value less than 0.5 and winr[i] value be 1, then this position is made a variation, it is become 0; If p[i] value more than or equal to 0.5 and winr[i] value be 0, then this position is made a variation, it is become 1.
Above-mentioned steps 2.4) implementation is when adopting the random variation operator to realize in, described step 2.4) specific implementation be: select the random variation template for use, set variation probability P _ mode, usually value in 0.01～0.001 scope, generate random variation template mutatemode={mtmd[1 according to probability] ..., mtmd[i], ..., mtmd[L] }, the length of template is identical with the length of winner, if mtmd[i] value be 1, winr[i then] morph, promptly inversion operation is carried out in this position.
Above-mentioned steps 3) specific implementation of structure fitness is:
Wherein, outputvalue represents the actual output of current evolution circuit, and idealvalue represents the output of the circuit structure of practical problems demand, and j represents the number of the circuit output of practical problems demand.
Advantage of the present invention is:
The invention provides a kind of based on the compact genetic algorithm (TCGA of trend type, Compact Genetic Algorithm with Tendency) evolution hardware implementation method, this method with the configuration structure bit string of actual programmable logic device (PLD) as the evolution object, advantage with the allocation optimum bit string that faster more accurately obtains actual hardware, the real-time of evolution hardware can be provided effectively, this method is when having kept being easy to hard-wired advantage, can improve the speed of convergence of evolution algorithmic effectively, be a kind of more implementation method of the evolution hardware of hard real-time that has.This method has strengthened the search capability for optimum hardware configuration structure bit string, and has improved the diversity in candidate solution space; Can obtain the hardware configuration structure bit string of high-quality optimum quickly; Improve speed of convergence significantly, reduced the optimum needed time of hardware circuit that obtains; Strengthened the real-time of actual evolution hardware, particularly, advantage of the present invention mainly contains:
1, introduced of the judgement of current configuration bit string, can go on foot all little by little near the allocation optimum bit string at each with the renewal that promotes probability variable towards the tendency of allocation optimum bit string.In the evolutionary process in each generation, for candidate's chromosome individuality each, at first it is reversed, then individuality after each counter-rotating of judgement comparison and the fitness value between the former individuality.When the fitness value of new individuality is bigger, judge the value of counter-rotating position again, if the value after this reverses is 1, then upgrade this pairing probability variable value by the step-length that increases 1/N; If the value after this reverses is 0, then upgrade this pairing probability variable value by the step-length that reduces 1/N.N represents the population number that develops.Dependence has been guided the renewal direction of the probability variable value of candidate's chromosome individuality effectively for the judgement of convergent tendency, makes candidate's chromosome individuality can converge to optimum hardware configuration bit string quickly.
2, introduced improved mutation operation.Traditional mutation operation is a randomness, uses the variation probable value to control mutation operation.The present invention has increased new variation step on the basis of traditional random variation method, whether each the probability variable value decision of judging the chromosome individuality is to the individual mutation operation of carrying out of candidate's chromosome.Its criterion is, if the probability variable value of present bit greater than 0.5, and this position is 0 it reversed, and is 1 and remains unchanged; Otherwise this position is 1 reverses to it, is 0 and remains unchanged.By introducing improved mutation operation, can obtain better chromosome individuality with bigger probability, and increase the diversity of population in the evolutionary process, avoided local convergence situation phenomenon.
Description of drawings
Fig. 1 is the process flow diagram of implementation method provided by the present invention.
Embodiment
Referring to Fig. 1, the invention provides a kind of evolution hardware implementation method based on the compact genetic algorithm of trend type, this method may further comprise the steps:
At first, the configuration parameter of the programmable logic device (PLD) of reality is mapped as the required chromosome individuality of algorithm engine, the coded system of chromosome individuality is used binary coding.The individual expression of chromosome is separated the binary string that mapping obtains by one in the practical problems solution space.
Make the individual Chromosome={chrom[1 of chromosome] ..., chrom[i] ..., chrom[L] }, each is for the individual winner={winr[1 of the optimum chromosome that develops] ..., winr[i] ..., winr[L] }, wherein L represents the length of chromosome individuality, the span of i is [1, L].
Then, input and output logical relation according to the pairing evolution circuit of the individual Chromosome of chromosome, calculate the fitness value fitness as the individual Chromosome of prochromosome, fitness value fitness represents the degree of conformity between the circuit logic function of current circuit logic function and practical problems demand.
Structure fitness computing function is as follows:
Wherein, outputvalue represents the actual output of current evolution circuit, and idealvalue represents the output of the circuit structure of practical problems demand, and j represents the number of the circuit output of practical problems demand.According to this constructed fuction, the value of fitness is more little, then works as the pairing circuit structure of the individual Chromosome of prochromosome just more near actual demand.When fitness equals zero, complete realistic circuit logic functional requirement.
According to the situation of fitness value fitness, stop judging.Stop criterion is: if fitness equals zero, then evolutionary process finishes; Otherwise, continue evolutionary process.
Below the algorithm engine among the present invention partly is described in detail.By the algorithm engine part, can operate the individual Chromosome of current chromosome, obtain each for the individual winner of the optimum chromosome in developing, so that make the internal resource configuration of programmable logic device (PLD) adapt to the circuit requirements of practical problems gradually.
1, probability variable initialization
Algorithm engine part probability of use variable among the present invention is described the candidate solution space of practical problems, probability variable is carried out initialization, make probability variable P={p[1], p[2] ..., p[i], ..., p[L] } be all 0.5, chrom[i among the individual Chromosome of the value representation chromosome of P] be 1 probability, the span of i is [1, L].Generate two individual Chromosome_a of separate initialization chromosome and Chromosome_b at random according to probability variable P then, and it is sent into evolutionary process first.Owing to adopt probability variable P to represent population, can greatly reduce the needed hardware resource of storage population, the hardware that helps algorithm is more realized.
2, individual Chromosome_a of chromosome and Chromosome_b are carried out contention operation
Individual Chromosome_a of two chromosomes that contention operation at first will develop the present age and Chromosome_b compare, and select fitness value better chromosome individuality among both, as the individual winner of current optimum chromosome.Then by setting the resampling cycle, in evolutionary process, when identical generation with the cycle, use and the irrelevant probable value P_samp resampling of current probability variable value, generate the individual Chromosome_s of new chromosome, and itself and the individual winner of current optimum chromosome are compared, choose a side outstanding among both as new optimum chromosome individuality winner.This method uses the relative value conduct of the fitness of chromosome individuality to judge standard, helps the reservation of the good chromosome individuality of fitness more, helps avoid the local optimum that is absorbed in search in evolutionary process simultaneously and stagnates.
3, convergent tendency decision operation and probability variable upgrade
The convergent tendency decision operation is an emphasis among the present invention.In the evolutionary process in each generation, for each winr[i of the individual winner of optimum chromosome], at first to winr[i] reverse the fitness value fitness_w of the individuality after relatively each reverses then and the fitness value fitness_wn of former individuality.If fitness_w＞fitness_wn, judge winr[i again] value, if winr[i] value after reversing is 1, then upgrades p[i by increasing step-length et]; If winr[i] value after reversing is 0, then upgrades p[i by reducing step-length et].Wherein upgrade step-length et and equal 1/N, N represents the population number.Dependence can be guided the renewal direction of the probability variable value of candidate's chromosome individuality effectively for the judgement of convergent tendency, makes candidate's chromosome individuality can converge to optimum solution quickly.
4, improved mutation operation
Improved mutation operation is another emphasis among the present invention.Mutation operation is meant in the coded strings of chromosome individuality, according to certain variation probability, uses some allelic value to replace genic value on wherein the change point, thereby forms new chromosome individuality.When adopting binary coding, mutation operation is exactly that 0,1 value of chromosome individuality on change point carried out inversion operation.The present invention increases each winr[i of the individual winner of optimum chromosome finish before being fated on the basis of traditional mutation operation] pairing probability variable value p[i] situation judge whether winr[i] carry out the operation steps of variation.At first to winr[i] value and probability variable value p[i thereof] judge, if p[i] value less than 0.5 and winr[i] value be 1, then this position is made a variation, it is become 0; If p[i] value more than or equal to 0.5 and winr[i] value be 0, then this position is made a variation, it is become 1.
When using traditional random variation operator, select the random variation template for use, set variation probability P _ mode, value in 0.01～0.001 scope usually.
Generate random variation template mutatemode={mtmd[1 according to probability] ..., mtmd[i] ..., mtmd[L] }, the length of template is identical with the length of winner, as if mtmd[i] value be 1, winr[i then] morph, promptly inversion operation is carried out in this position.
The existence of mutation operation helps algorithm engine to jump out the regional area of search, has increased the hunting zone in per generation evolutionary process, has also expanded the diversity in candidate solution space simultaneously.
The individual winner of chromosome of the optimum that obtains after finishing of will developing at last is converted into the internal resource configuration file of device, downloads this document to programmable logic device (PLD), thereby realizes the hardware circuit of realistic issue requirement.
Convergent tendency decision operation among the present invention and improved mutation operation, not only can guide the convergence direction of probability variable, improve speed of convergence, and strengthened search capability for the allocation optimum bit string of programmable logic device (PLD), expanded the diversity in candidate solution space, the real world applications in the hardware that helps more developing.
Claims (9)
1. evolution hardware implementation method based on the compact genetic algorithm of trend type, it is characterized in that: described evolution hardware implementation method based on the compact genetic algorithm of trend type may further comprise the steps:
1) obtains the configuration parameter of actual programmable logic device (PLD);
2) configuration parameter of the programmable logic device (PLD) of the reality that step 1) acquired is shone upon and form the chromosome individuality; Described chromosome individuality is to separate the binary string that mapping obtains by one in the practical problems solution space; The individual Chromosome={chrom[1 of described chromosome] ..., chrom[i] ..., chrom[L] }, each is for the individual winner={winr[1 of the optimum chromosome that develops] ..., winr[i] ..., winr[L] }, wherein L represents the length of chromosome individuality, the span of i is [1, L];
3) according to the input and output logical relation of the individual pairing evolution circuit of chromosome, calculate fitness value fitness when the prochromosome individuality; Described fitness value fitness represents the degree of conformity between the circuit logic function of current circuit logic function and practical problems demand;
4) whether the situation according to the fitness value fitness that step 3) acquired stops judging that if fitness equals zero, then evolutionary process finishes to developing; If fitness is not equal to zero, then continue execution in step 1)～step 4).
2. the evolution hardware implementation method based on the compact genetic algorithm of trend type according to claim 1, it is characterized in that: specific implementation described step 2) is:
2.1) to the probability variable initialization;
2.2) obtain the individual winner of optimum chromosome;
2.3) hold back that tendency is judged and probability variable upgrades;
2.4) carry out mutation operation; Described mutation operation is meant in the coded strings of chromosome individuality, according to certain variation probability, uses some allelic value to replace genic value on wherein the change point, thereby forms new chromosome individuality.
3. the evolution hardware implementation method based on the compact genetic algorithm of trend type according to claim 2, it is characterized in that: specific implementation described step 2.1) is:
2.1.1) make probability variable P={p[1], p[2] ..., p[i] ..., p[L] } be all 0.5, chrom[i among the individual Chromosome of the value representation chromosome of described probability variable P] be 1 probability, wherein the span of i is [1, L];
2.1.2) generate two individual Chromosome_a of separate initialization chromosome and Chromosome_b at random according to probability variable P, and individual Chromosome_a of chromosome and Chromosome_b are sent into evolutionary process first.
4. the evolution hardware implementation method based on the compact genetic algorithm of trend type according to claim 3, it is characterized in that: specific implementation described step 2.2) is:
2.2.1) the individual Chromosome_a of two chromosomes and the Chromosome_b that at first will develop the present age compare, and selects fitness value better chromosome individuality among both, as the individual winner of current optimum chromosome;
2.2.2) by setting the resampling cycle, in evolutionary process, when identical generation with the cycle, use and the irrelevant probable value P_samp resampling of current probability variable value, generate the individual Chromosome_s of new chromosome, and itself and the individual winner of current optimum chromosome are compared, choose a side outstanding among both as new optimum chromosome individuality winner.
5. the evolution hardware implementation method based on the compact genetic algorithm of trend type according to claim 4, it is characterized in that: specific implementation described step 2.3) is:
2.3.1) with each winr[i of the individual winner of optimum chromosome] reverse;
2.3.2) relatively the fitness value fitness_w of the individuality after each counter-rotating and the fitness value fitness_wn of former individuality;
2.3.3) if fitness_w greater than fitness_wn, then continue to judge winr[i] and value, if winr[i] value after reversing is 1, then upgrades p[i by increasing step-length et]; If winr[i] value after reversing is 0, then upgrades p[i by reducing step-length et]; Wherein upgrade step-length et and equal 1/N, N represents the population number; If fitness_w is less than fitness_wn, then do not carry out corresponding p[i] the renewal operation, i.e. p[i] remain unchanged.
6. the evolution hardware implementation method based on the compact genetic algorithm of trend type according to claim 5 is characterized in that: specific implementation described step 2.4) is to adopt binary coding to realize or the realization of employing random variation operator.
7. the evolution hardware implementation method based on the compact genetic algorithm of trend type according to claim 6, it is characterized in that: implementation is when adopting binary coding to realize described step 2.4), described step 2.4) specific implementation is: to winr[i] value and probability variable value p[i thereof] judge, if p[i] value less than 0.5 and winr[i] value be 1, then, it is become 0 to this position variation; If p[i] value more than or equal to 0.5 and winr[i] value be 0, then this position is made a variation, it is become 1.
8. the evolution hardware implementation method based on the compact genetic algorithm of trend type according to claim 6, it is characterized in that: implementation is when adopting the random variation operator to realize described step 2.4), described step 2.4) specific implementation is: select the random variation template for use, set variation probability P _ mode, usually value in 0.01～0.001 scope, generate random variation template mutatemode={mtmd[1 according to probability], ..., mtmd[i] ..., mtmd[L], the length of template is identical with the length of winner, if mtmd[i] value be 1, winr[i then] morph, promptly inversion operation is carried out in this position.
9. according to the described evolution hardware implementation method based on the compact genetic algorithm of trend type of the arbitrary claim of claim 1-8, it is characterized in that: the specific implementation of described step 3) structure fitness is:
Wherein, outputvalue represents the actual output of current evolution circuit, and idealvalue represents the output of the circuit structure of practical problems demand, and j represents the number of the circuit output of practical problems demand.
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| CN112182974A (en) * | 2020-10-09 | 2021-01-05 | 中国人民解放军陆军工程大学 | Neuron circuit evolution design method |
| CN112182974B (en) * | 2020-10-09 | 2022-04-26 | 中国人民解放军陆军工程大学 | Neuron circuit evolution design method |
| CN114647541A (en) * | 2022-03-18 | 2022-06-21 | 西安微电子技术研究所 | Circuit self-repairing method based on improved evolution hardware |
| CN114647541B (en) * | 2022-03-18 | 2024-04-26 | 西安微电子技术研究所 | Circuit self-repairing method based on improved evolution hardware |
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