CN102214728A - Technology for processing dead layers on surface of crystalline silicon solar cell - Google Patents
Technology for processing dead layers on surface of crystalline silicon solar cell Download PDFInfo
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- CN102214728A CN102214728A CN2010101485181A CN201010148518A CN102214728A CN 102214728 A CN102214728 A CN 102214728A CN 2010101485181 A CN2010101485181 A CN 2010101485181A CN 201010148518 A CN201010148518 A CN 201010148518A CN 102214728 A CN102214728 A CN 102214728A
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- sodium silicate
- silicate solution
- silicon chip
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- Y—GENERAL TAGGING OF NEW TECHNOLOGICAL DEVELOPMENTS; GENERAL TAGGING OF CROSS-SECTIONAL TECHNOLOGIES SPANNING OVER SEVERAL SECTIONS OF THE IPC; TECHNICAL SUBJECTS COVERED BY FORMER USPC CROSS-REFERENCE ART COLLECTIONS [XRACs] AND DIGESTS
- Y02—TECHNOLOGIES OR APPLICATIONS FOR MITIGATION OR ADAPTATION AGAINST CLIMATE CHANGE
- Y02E—REDUCTION OF GREENHOUSE GAS [GHG] EMISSIONS, RELATED TO ENERGY GENERATION, TRANSMISSION OR DISTRIBUTION
- Y02E10/00—Energy generation through renewable energy sources
- Y02E10/50—Photovoltaic [PV] energy
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- Y—GENERAL TAGGING OF NEW TECHNOLOGICAL DEVELOPMENTS; GENERAL TAGGING OF CROSS-SECTIONAL TECHNOLOGIES SPANNING OVER SEVERAL SECTIONS OF THE IPC; TECHNICAL SUBJECTS COVERED BY FORMER USPC CROSS-REFERENCE ART COLLECTIONS [XRACs] AND DIGESTS
- Y02—TECHNOLOGIES OR APPLICATIONS FOR MITIGATION OR ADAPTATION AGAINST CLIMATE CHANGE
- Y02P—CLIMATE CHANGE MITIGATION TECHNOLOGIES IN THE PRODUCTION OR PROCESSING OF GOODS
- Y02P70/00—Climate change mitigation technologies in the production process for final industrial or consumer products
- Y02P70/50—Manufacturing or production processes characterised by the final manufactured product
Abstract
The invention relates to the field of solar photovoltaic and discloses a technology for processing dead layers on surface of a crystalline silicon solar cell. The technology comprises the followings steps: carrying out heavy doping on crystalline silicon wafers to prepare PN junctions in a diffusion furnace, so that the square resistances on the surfaces of the crystalline silicon wafers keep in the range from 20 to 40 ohm; preparing a 0.5%-2% sodium silicate solution, wherein the temperature of the sodium silicate solution is controlled between 30 DEG C and 50 DEG C; and placing the crystalline silicon wafers in an etchant solution for carrying out ultrasonic erosion, wherein the ultrasonic power is controlled between 1kW and 20kW, thus the etched square resistances are in the range from 35 omega to 50 omega.
Description
Technical field
The present invention relates to the photovoltaic field, relate in particular to a kind of treatment process of surface " dead layer " of crystal-silicon solar cell.
Background technology
PN junction is the core of crystal-silicon solar cell, the electric property of its decision crystal-silicon solar cell.
Conventional crystal-silicon solar cell technology is to adopt the method for High temperature diffusion that silicon chip surface is evenly mixed, and improve battery performance, and the doping content of top layer is high more good more.But diffusion concentration is too high, when temperature reduces, can separate out having a lot of superfluous phosphorus atoms, becomes certain thickness rich phosphorus layer and its concentration not with change in depth.This rich phosphorus layer is " dead layer ", a large amount of crack phosphorus atoms, dislocation and defectives of adding are arranged in this one deck, thereby the life-span of minority carrier is extremely short, and the non equilibrium carrier of generation is very fast by compound, so it is very low to collect probability.So in order to reduce " dead layer " thickness as far as possible, the surface concentration of phosphorous diffusion should be controlled under the limit of solid solubility.General diffusion back battery surface square resistance is controlled between 40 to 50 ohm.The emitter junction that conventional diffusion back forms is clean deeply about 0.4 micron, and " dead layer " thickness is between the 0.1-0.2 micron, and therefore the influence of " dead layer " is inevitable.
At present, a kind of so-called purple battery is arranged, it does emitter junction very shallow, has only about 0.1 micron, and this battery can be good at improving the short wave response of battery.But the manufacturing process difficulty of this battery is very big, and because the top layer diffusion concentration is low, so series resistance is very big, power loss increases.
Present domestic laboratory is studied usually and is used high-temperature oxydation to prepare silica membrane to carry out surface passivation, battery " dead layer " is handled, this technical process more complicated, and because silica membrane is at high temperature (1000 degree more than) preparation, energy consumption height.Consider that from the cost angle prior art also is not suitable for large-scale production.
Summary of the invention
The present invention's first purpose is to provide a kind of surface " dead layer " treatment process of crystal-silicon solar cell, reduces its surperficial dead layer, thereby reduces the solar cell photo-generated carrier at the compound loss in efficiency that brings of " dead layer " part.
The process of surface treatment of a kind of crystal-silicon solar cell that the embodiment of the invention provides is characterized in that, comprising:
In the diffusion furnace crystal silicon chip is carried out heavily doped preparation PN junction, make the square resistance on described crystal silicon chip surface between 20-40 ohm;
Configuration quality percentage is the sodium silicate solution of 0.5%-2%, and the temperature of described sodium silicate solution is controlled between 30 ℃-50 ℃;
Described crystal silicon chip inserted carry out ultrasonic wave corrosion in the described sodium silicate solution, wherein, ultrasonic power is controlled between the 1KW-20KW, makes square resistance after the corrosion between 35 Ω-50 Ω.
Alternatively, configuration quality percentage is after the sodium silicate solution of 0.5%-2%, also comprises:
In described sodium silicate solution, add hydrogen peroxide, the volume ratio of wherein said hydrogen peroxide element and water element: H
2O
2/ H
2O=0-5%;
Described crystal silicon chip inserted carries out ultrasonic wave corrosion in the described sodium silicate solution, specifically be,
Described crystal silicon chip inserted carry out the ultrasonic wave corrosion in the described sodium silicate solution that is added with hydrogen peroxide.
Therefore, adopt the battery of the conventional relatively method of diffusion preparation in surface " dead layer " of the battery of this processing method preparation obviously to reduce, the high 1-2 μ of the minority carrier lifetime S of the battery of the minority carrier lifetime that mainly shows the battery that adopts this PROCESS FOR TREATMENT after than conventional diffusion., the short circuit current that adopts the battery that this PROCESS FOR TREATMENT obtains will exceed about 50mA with respect to the crystal-silicon solar cell of routine.
In addition, this process is convenient and simple for operation, is fit to large-scale production.
Description of drawings
Accompanying drawing described herein is used to provide further understanding of the present invention, constitutes the application's a part, does not constitute to improper qualification of the present invention, in the accompanying drawings:
The schematic flow sheet of surface " dead layer " treatment process of a kind of crystal-silicon solar cell that Fig. 1 provides for the embodiment of the invention 1.
Embodiment
Describe the present invention in detail below in conjunction with accompanying drawing and specific embodiment, be used for explaining the present invention in this illustrative examples of the present invention and explanation, but not as a limitation of the invention.
Embodiment 1:
Referring to shown in Figure 1, this technology mainly comprises following flow process:
Step 101: in the diffusion furnace crystal silicon chip is carried out heavily doped preparation PN junction, make the square resistance on crystal silicon chip surface between 20-40 ohm.
Step 102: configuration quality percentage is the sodium silicate solution of 0.5%-2%.
Configuration quality percentage is the sodium silicate solution of 0.5%-2%, and the temperature of sodium silicate solution is controlled at 30 ℃-50 ℃.
In addition, in order to improve its corrosivity, can also be in sodium silicate solution an amount of adding hydrogen peroxide solution, the wherein volume ratio of this hydrogen peroxide solution: H
2O
2/ H
2O=0-5%, the temperature of this solution is controlled between 30 ℃-50 ℃.
Step 103: described crystal silicon chip is inserted carry out the ultrasonic wave corrosion in the sodium silicate solution of step 102.
Ultrasonic power is set between 1KW 20KW, will corrodes in the solution of crystal silicon chip as for step 102 configuration, its extent of corrosion is controlled at: the surperficial square resistance of the crystalline silicon after the ultrasonic erosion is between 35 Ω-50 Ω.
The taking-up crystalline silicon gets final product.
Therefore, adopt the battery of the conventional relatively method of diffusion preparation in surface " dead layer " of the battery of this processing method preparation obviously to reduce, the high 1-2 μ of the minority carrier lifetime S of the battery of the minority carrier lifetime that mainly shows the battery that adopts this PROCESS FOR TREATMENT after than conventional diffusion., the short circuit current that adopts the battery that this PROCESS FOR TREATMENT obtains will exceed about 50mA with respect to the crystal-silicon solar cell of routine.
In addition, this process is convenient and simple for operation, is fit to large-scale production.
Below present embodiment is further described in detail:
Embodiment 2:
Spread in the high temperature dispersing furnace, regulate diffusion temperature, source flux and diffusion time, the square resistance after the control diffusion is between 20 ± 2 ohm; The sodium silicate solution of configuration 0.5% is heated to 30 ℃, and ultrasonic power is controlled at 1KW, and silicon chip surface is corroded, and by the monitoring etching time, the square resistance that records silicon chip surface is 35 Ω.
Embodiment 3:
Spread in the high temperature dispersing furnace, regulate diffusion temperature, source flux and diffusion time, the square resistance after the control diffusion is between 30 ± 2 ohm; The sodium silicate solution of configuration 1% is heated to 40 ℃, and ultrasonic power is controlled at 10KW, and silicon chip surface is corroded, and by the monitoring etching time, the square resistance that records silicon chip surface is 40 Ω.
Embodiment 4:
Spread in the high temperature dispersing furnace, regulate diffusion temperature, source flux and diffusion time, the square resistance after the control diffusion is between 40 ± 2 ohm; The sodium silicate solution of configuration 2% is heated to 50 ℃, and ultrasonic power is controlled at 20KW, and silicon chip surface is corroded, and by the monitoring etching time, the square resistance that records silicon chip surface is 45 Ω.
More than the technical scheme that the embodiment of the invention provided is described in detail, used specific case herein the principle and the execution mode of the embodiment of the invention are set forth, the explanation of above embodiment only is applicable to the principle that helps to understand the embodiment of the invention; Simultaneously, for one of ordinary skill in the art, according to the embodiment of the invention, the part that on embodiment and range of application, all can change, in sum, this description should not be construed as limitation of the present invention.
Claims (2)
1. the surface of a crystal-silicon solar cell " dead layer " treatment process is characterized in that, comprising:
In the diffusion furnace crystal silicon chip is carried out heavily doped preparation PN junction, make the square resistance on described crystal silicon chip surface between 20-40 ohm;
Configuration quality percentage is the sodium silicate solution of 0.5%-2%, and the temperature of described sodium silicate solution is controlled between 30 ℃-50 ℃;
Described crystal silicon chip inserted carry out ultrasonic wave corrosion in the described sodium silicate solution, wherein, ultrasonic power is controlled between the 1KW-20KW, makes square resistance after the corrosion between 35 Ω-50 Ω.
2. the process of surface treatment of a kind of crystal-silicon solar cell according to claim 1 is characterized in that,
Configuration quality percentage is after the sodium silicate solution of 0.5%-2%, also comprises:
In described sodium silicate solution, add hydrogen peroxide, the volume ratio of wherein said hydrogen peroxide and water: H
2O
2/ H
2O=0-5%;
Described crystal silicon chip inserted carries out ultrasonic wave corrosion in the described sodium silicate solution, specifically be,
Described crystal silicon chip inserted carry out the ultrasonic wave corrosion in the described sodium silicate solution that is added with hydrogen peroxide.
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Cited By (3)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| CN102244149A (en) * | 2011-07-20 | 2011-11-16 | 苏州阿特斯阳光电力科技有限公司 | Method for removing silicon solar cell diffusion death layer |
| CN102569523A (en) * | 2012-02-09 | 2012-07-11 | 苏州盛康光伏科技有限公司 | Diffusion method for polycrystalline silicon solar photovoltaic cell silicon chip |
| CN102623557A (en) * | 2012-03-27 | 2012-08-01 | 山东力诺太阳能电力股份有限公司 | Technology for preparing dead layer-free emitting electrode of solar battery through alkali method |
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| Publication number | Priority date | Publication date | Assignee | Title |
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| CN101079452A (en) * | 2007-06-11 | 2007-11-28 | 江苏林洋新能源有限公司 | N-type underlay single-side extraction electrode crystal silicon cell and its making method |
| CN101414647A (en) * | 2007-10-17 | 2009-04-22 | 北京中科信电子装备有限公司 | Diffusion method for high-efficiency solar battery local depth junction |
| CN101459206A (en) * | 2008-12-26 | 2009-06-17 | 上海联孚新能源科技有限公司 | Manufacturing process for high-efficiency multi-junction solar cell |
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Patent Citations (3)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| CN101079452A (en) * | 2007-06-11 | 2007-11-28 | 江苏林洋新能源有限公司 | N-type underlay single-side extraction electrode crystal silicon cell and its making method |
| CN101414647A (en) * | 2007-10-17 | 2009-04-22 | 北京中科信电子装备有限公司 | Diffusion method for high-efficiency solar battery local depth junction |
| CN101459206A (en) * | 2008-12-26 | 2009-06-17 | 上海联孚新能源科技有限公司 | Manufacturing process for high-efficiency multi-junction solar cell |
Cited By (3)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| CN102244149A (en) * | 2011-07-20 | 2011-11-16 | 苏州阿特斯阳光电力科技有限公司 | Method for removing silicon solar cell diffusion death layer |
| CN102569523A (en) * | 2012-02-09 | 2012-07-11 | 苏州盛康光伏科技有限公司 | Diffusion method for polycrystalline silicon solar photovoltaic cell silicon chip |
| CN102623557A (en) * | 2012-03-27 | 2012-08-01 | 山东力诺太阳能电力股份有限公司 | Technology for preparing dead layer-free emitting electrode of solar battery through alkali method |
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