CN102637767B - Solar cell manufacturing method and solar cell - Google Patents
Solar cell manufacturing method and solar cell Download PDFInfo
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- CN102637767B CN102637767B CN201110038160.1A CN201110038160A CN102637767B CN 102637767 B CN102637767 B CN 102637767B CN 201110038160 A CN201110038160 A CN 201110038160A CN 102637767 B CN102637767 B CN 102637767B
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- Y02E10/547—Monocrystalline silicon PV cells
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- Y—GENERAL TAGGING OF NEW TECHNOLOGICAL DEVELOPMENTS; GENERAL TAGGING OF CROSS-SECTIONAL TECHNOLOGIES SPANNING OVER SEVERAL SECTIONS OF THE IPC; TECHNICAL SUBJECTS COVERED BY FORMER USPC CROSS-REFERENCE ART COLLECTIONS [XRACs] AND DIGESTS
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Abstract
The invention discloses a solar cell manufacturing method which comprises the following steps: forming an N+ type doping layer on the surface of an N type substrate; forming a thin film with a pattern on the surface of the N+ type doping layer; etching an open area till a groove is formed in the N type substrate, wherein the etching depth is more than the thickness of the N+ type doping layer; forming a P+ type doping area in the surface of the groove, wherein the P+ type doping area is not in mutual contact with the non-etched N+ type doping layer; removing the thin film to obtain a doped chip; forming a coating on the back face of the doped chip; forming a second passivation layer on the surface of the doped chip; forming a positive electrode and a negative electrode on the surface of the doped chip; and sintering the doped chip so that metal elements of the positive electrode and the negative electrode as well as the doped chip are subjected to eutectic compounding. The invention further discloses a solar cell. The manufacturing method disclosed by the invention has the advantages that the process steps are simplified, a photoetching machine does not need to be purchased, a plurality of mask plates do not need to be used, a mask plate calibration problem is avoided and the manufacturing cost is reduced.
Description
Technical field
The present invention relates to a kind of manufacture method and solar cell of solar cell, particularly relate to a kind of manufacture method and back contact solar cell of back contact solar cell.
Background technology
New forms of energy are that in 21st century development of world economy, most determines one of five large technical fields of power.Solar energy is a kind of clean, efficiently and the new forms of energy of never exhaustion.In the new century, solar energy resources is all utilized the important content as National Sustainable Development Strategies by national governments.And photovoltaic generation have safe and reliable, noiseless, pollution-free, restriction less, the advantage such as failure rate is low, easy maintenance.
In recent years, international photovoltaic generation fast development, supply falls short of demand for solar wafer, so the raising electricity conversion of solar wafer and the production capacity of solar wafer become important problem.Solar cell is by after illumination, and battery absorbs after an energy is greater than the incident photon of band gap width and produces electron-hole pair, and electronics and hole are energized into the upper state of conduction band and valence band respectively.Moment after excitation, the energy of incident photon is depended in the energy position of excitation state in electronics and hole.The very fast and lattice of the photo-generated carrier being in upper state interacts, and give phonon by energy and fall back at the bottom of conduction band and top of valence band, this process is also referred to as thermalization process, and thermalization process makes the energy loss of a high-energy photon part.After thermalization process, in the transport process (barrier region or diffusion region) of photo-generated carrier, recombination losses will be had.Last voltage exports once pressure drop again, and pressure drop derives from the difference with the work function of electrode material.By above-mentioned analysis, solar battery efficiency, by the impact of material, device architecture and preparation technology, comprises the light loss of battery, the limited mobility of material, recombination losses, series resistance and bypass resistance loss etc.For certain material, the improvement of battery structure and preparation technology is important to improving photoelectric conversion efficiency.It is a kind of that feasible to realize low-cost high-efficiency solar cell scheme be concentrator solar cell.Concentrator solar cell can save material cost greatly, significantly improves efficiency of solar cell.Adopting the solar cell of front junction structure, in order to meet the larger feature of concentrator cell current density, must greatly increase front gate line density, this can affect grid line shading rate conversely, reduces short circuit current.The scheme of feasible solution shading loss is exactly a back contact structure solar cell, is also back of the body junction battery.Doped region and golden half contact area of back contact structure solar cell are all integrated in back of solar cell, and it is very most of that backplate occupies back surface, reduce contact resistance loss.In addition, direction of current flow is perpendicular to interface, and this just further obviates Facad structure transverse current and to flow the ohmic loss caused, and will meet the requirement of high-strength focused front light and high-photoelectric transformation efficiency so simultaneously.Back contact solar cell is also conducive to cell package, reduces costs further.
But because the PN junction carrying on the back junction battery is near cell backside, and minority carrier has to diffuse through whole silicon wafer thickness just can reach interface, the back side, so this battery design just needs the silicon chip of especially high minority carrier life time as base material, otherwise few son is not also diffused into interface, the back side and has just been fallen by compound, and the efficiency of such battery will decline greatly.IBC (interdigitated back contact) solar cell is the back of the body junction battery studied the earliest, be mainly used at first in condenser system, structure and the manufacture craft of various back contact silicon solar cell is described in the back contact silicon solar cell progress (material Leader volume the 9th phase September the 22nd in 2008) of Ren Bingyan etc., for IBC solar cell, the most high conversion efficiency of the IBC solar cell that SUNPOWER company makes can reach 24%, then owing to which employs photoetching process, the complex operations brought due to photoetching makes its cost be difficult to decline, difficulty is caused to the commercial applications of civilian or common occasion.In order to reduce costs, also have and utilizing mask plate to form P+ district and the N+ district of cross arrangement, but multiple mask plates must be used in manufacturing process, also create the problem of mask plate calibration while increasing cost, for manufacturing process brings many difficulty.
Summary of the invention
The technical problem to be solved in the present invention uses the defect that lithographic process steps is numerous and diverse, cost is higher in the manufacturing process in order to overcome IBC solar cell in prior art, provides in a kind of manufacturing process and only need a mask plate, maskless plate calibration problem, cost is lower, processing step is less and Doped ions concentration is able to manufacture method and the solar cell of the solar cell accurately controlled.
The present invention solves above-mentioned technical problem by following technical proposals:
A manufacture method for solar cell, its feature is, it comprises the following steps:
Step S
1, form N+ type doped layer at N-type substrate surface;
Step S
2, form the film with pattern on this N+ type doped layer surface, wherein, be not open area by this region with the plastic film covering of pattern; This film with pattern plays the effect of mask;
Step S
3, this open area is etched, etch depth is greater than the thickness of this N+ type doped layer and until this N-type substrate, forms a groove with the position corresponding with this open area at this N-type substrate surface; Namely, except the N+ type doped layer of open area is possible to determine when the sample has been completely etched and eliminates, the N-type substrate also etched skim that this open area is corresponding, just defines groove in this N-type substrate like this;
Step S
4, in the groove surfaces of N-type substrate, form P+ type doped region, wherein, this P+ type doped region with should be not in contact with each other without the N+ type doped layer etched;
Step S
5, remove this film with pattern to obtain wafers doped;
Step S
6, the back side of this wafers doped formed coating, this coating be the first passivation layer and and anti-reflection film;
Step S
7, form the second passivation layer on the surface of this wafers doped; Surface passivation can reduce the surface activity of semiconductor, the recombination rate on surface is reduced, its major way is the dangling bonds at saturated semiconductor surface place, reduce surface activity, increase the cleaning procedure on surface, avoid, because impurity forms complex centre in the introducing of superficial layer, reducing the recombination velocity of minority carrier with this.By surface passivation, surface recombination is reduced, thus improve effective minority carrier life time.Anti-reflection film can reduce the reflection of surperficial sunlight, improves the utilance of sunlight, adopts above-mentioned coating to be the effective means improving solar cell photoelectric conversion efficiency;
Step S
8, form positive electrode and negative electrode on the surface of this wafers doped, wherein, this positive electrode is formed on this P+ type doped region, and this negative electrode is formed on this N+ type doped layer without etching;
Step S
9, sinter this wafers doped, make metallic element and the wafers doped eutectic compound of positive electrode and negative electrode,
Wherein, when described P type replaces with N-type, N-type replaces with P type simultaneously.
Preferably, step S
1in form this N+ type doped layer by the mode of thermal diffusion or ion implantation, wherein the square resistance of this N+ type doped layer is 20-100 Ω/.Preferably, the square resistance of this N+ type doped layer is 30-90 Ω/, and more preferably, the square resistance of this N+ type doped layer is 40-80 Ω/.Those skilled in the art can select diffuse source and diffusion temperature according to conventional parameter, such as POCl
3as diffuse source.
Preferably, step S
2in form by the mode of silk screen printing the film that this has pattern, wherein this thickness with the film of pattern is 1-50 μm and by synthetic rubber or metal, such as albronze is made.After this film with pattern is formed, also comprise the step of drying this film.Adopt silk screen printing just comparatively preferred mode, but be not limited thereto, other known means can also be adopted to form the film that this has pattern.
Preferably, step S
3in the degree of depth of N-type substrate of etching be at least 5 μm, preferably, the degree of depth of the N-type substrate of etching is 5-30 μm, and namely the degree of depth of the N-type substrate of etching mentioned here refers to the thickness of the skim that this N-type substrate is etched.Breakdown in order to make PN junction be not easy, improve the useful life of solar cell, the preferred depth of the degree of depth of the N-type substrate of this etching is 5-20 μm.
Preferably, step S
4in form this P+ type doped region by the mode of thermal diffusion or ion implantation, those skilled in the art can select diffuse source and diffusion temperature according to conventional parameter, or accelerate P type ion and by the mode of ion implantation, this P type ion be injected into N-type substrate to form P+ type doped region from this open area of this N-type substrate surface, wherein, this P type ion is accelerated to 500eV-50keV, and the square resistance of the P+ type doped region formed is 40-120 Ω/.Preferably, P type ion is accelerated to 1keV-40keV, and more preferably, P type ion is accelerated to 5keV-30keV; Preferably, the square resistance of the P+ type doped region formed is 60-110 Ω/, and more preferably, the square resistance of the P+ type doped region formed is 80-100 Ω/.
In addition, in step S
4in, because thermal diffusion process does not have a directivity, its diffusion is all directions, except form P+ type doped region in the surface of groove except, also can form P+ type doped layer in two of this groove sidewall; Even if in step S
4middle employing be the method for ion implantation, although ion implantation has good directivity, in the process of ion implantation, part ion also may be caused to be injected in the two side of this groove, form thinner P+ type doped layer.What no matter adopt is the method for thermal diffusion process or ion implantation, in the process forming P+ type doped region, all likely cause in the sidewall of groove forming P+ type doped layer, and this P+ type doped layer with without etching (step S
3described etching) the contact of N+ doped layer, can cause the structure of P+/N+ like this, its depletion layer is very thin, is very easy to breakdown, have impact on quality and the useful life of final obtained solar cell, therefore in step S
4afterwards, step S
5also comprise step S before
p: etching removal step S
4the P+ type doped layer formed in this recess sidewall during this P+ type doped region of middle formation, what described etching adopted is conventional means.
Preferably, step S
5also comprise annealing steps afterwards.After ion implantation, at the temperature of 700-1100 DEG C, anneal 30 seconds to 30 minutes to activate Doped ions, preferably, annealing temperature is 850-1000 DEG C.
Preferably, step S
6in form coating by PECVD (plasma enhanced chemical vapor deposition method), first passivation layer of this coating is one or more the lamination in silica, carborundum, aluminium oxide, silicon nitride or amorphous silicon membrane, and the anti-reflection film of this coating is silicon nitride film.
Preferably, step S
7in form the second passivation layer by PECVD, this second passivation layer is one or more the lamination in silica, carborundum, aluminium oxide, silicon nitride or amorphous silicon membrane.
Preferably, step S
8middle employing silver slurry or silver-colored aluminium paste are also by silk screen printing method for producing positive electrode and/or negative electrode.If adopt silver-colored aluminium paste as electrode material, then in described silver-colored aluminium paste, the content of aluminium is greater than 3%, and preferably, in described silver-colored aluminium paste, the content of aluminium is greater than 5%, and described percentage is the mass percent that aluminium accounts for silver/aluminium paste total amount.
Preferably, step S
8further comprising the steps of:
Step S
81, in second passivation layer corresponding with this P+ type doped region, form the first contact hole, and form the second contact hole in the second passivation layer corresponding without the N+ type doped layer etched with this;
Step S
82, form positive electrode and negative electrode on the surface of this wafers doped, wherein, this positive electrode is connected to this P+ type doped region by this first contact hole, and this negative electrode is connected to this N+ type doped layer without etching by this second contact hole.Such positive electrode and negative electrode and semi-conducting material just define point cantact, further reduce contact resistance.
The solar cell that the present invention also provides a kind of manufacture method of solar cell as described above obtained, its feature is, this solar cell comprises:
One wafers doped, wherein this wafers doped comprises:
The reeded N-type substrate of one surperficial tool;
Be formed at least one the N+ type doped region in this N-type substrate surface;
Be formed at the P+ type doped region in this N-type base groove surface, and
Be formed at the coating at this wafers doped back side, this coating be the first passivation layer and and anti-reflection film;
Be formed at second passivation layer on this wafers doped surface;
At least one is positioned at the negative electrode on this at least one N+ type doped region surface;
Be positioned at the positive electrode on this P+ type doped region surface;
Wherein, this N+ type doped region and this P+ type doped region are not in contact with each other,
Wherein, when described P type replaces with N-type, N-type replaces with P type simultaneously.
Preferably, the minimum range of this N+ type doped region and this P+ type doped region is at least 5 μm, and preferably, the degree of depth of the N-type substrate of etching is 5-30 μm, and more preferably, the minimum range of this N+ type doped region and this P+ type doped region is 5-20 μm.
Preferably, the square resistance of this N+ type doped region is 20-100 Ω/.Preferably, the square resistance of this N+ type doped region is 30-90 Ω/, and more preferably, the square resistance of this N+ type doped region is 40-80 Ω/.
Preferably, the square resistance of P+ type doped region is 40-120 Ω/.Preferably, the square resistance of the P+ type doped region formed is 60-110 Ω/, and more preferably, the square resistance of the P+ type doped region formed is 80-100 Ω/.
Preferably, the first passivation layer of this coating is one or more the lamination in silica, carborundum, aluminium oxide, silicon nitride or amorphous silicon membrane, and the anti-reflection film of this coating is silicon nitride film.
Preferably, this second passivation layer is one or more the lamination in silica, carborundum, aluminium oxide, silicon nitride or amorphous silicon membrane.
Preferably, in the second passivation layer corresponding with this P+ type doped region, there is the first contact hole, there is in the second passivation layer corresponding with this at least one N+ type doped region at least one second contact hole, wherein, this positive electrode is connected to this P+ type doped region by this first contact hole, and by this, at least one second contact hole is connected to this at least one N+ type doped region to this at least one negative electrode.
Only need in above process, the impurity material that the mode of exchanging base material and ion implantation or diffusion growth is adulterated, then the method is equally applicable to the making of P type solar energy solar cell, and when namely described N-type replaces with P type, P type replaces with N-type simultaneously.
Positive progressive effect of the present invention is:
1, P+ type doped region and have N-type base material as resilient coating without between the N+ type doped layer etched in the present invention, makes to cause breakdown because depletion layer is too thin between PN junction, which thereby enhances the useful life of this solar cell.
2, back of the body junction battery is made compared with employing photoetching process, this invention simplifies processing step, without the need to buying mask aligner, cost reduces greatly, in addition in Making programme without the need to using multiple mask plates, also reduce cost of manufacture while solving mask plate calibration problem.
The minimum widith of the N-type resilient coating 3, in the present invention between P+ type doped region and N+ type doped region is 5 μm, the mask plate adopting pure machining process to obtain is difficult to accomplish such precision, namely enablely to accomplish, such mask plate is also that price is high, the present invention also forms the mode of P+ doped region in a groove by forming groove in base material, self-assembling formation meets the N-type resilient coating of above-mentioned minimum widith, eliminate the cost of the high mask plate of purchasing price, reduce further cost of manufacture.
4, adopt ion implantation to carry out doping and form P+ type doped region, the concentration of Doped ions obtains accurate control, and the doping compared with thermal diffusion process is more favourable to the efficiency improving opto-electronic conversion.
Accompanying drawing explanation
Fig. 1-8 is the decomposition step schematic diagram of making solar cell of the present invention.
Embodiment
Present pre-ferred embodiments is provided, to describe technical scheme of the present invention in detail below in conjunction with accompanying drawing.
Embodiment 1
With reference to figure 1, step S
1, form N+ type doped layer 2 on N-type substrate 1 surface, the square resistance of this N+ type doped layer is 20 Ω/.Specifically, phosphonium ion is accelerated to 500eV and by the mode of ion implantation by this phosphonium ion from the surface imp lantation of this N-type substrate to this N-type substrate.
With reference to figure 2, step S
2, form the film 3 with pattern on this N+ type doped layer 2 surface, wherein, the region do not covered by this film 3 with pattern is open area; This film with pattern plays the effect of mask.Wherein form this film 3 with pattern by the mode of silk screen printing, wherein this thickness with the film of pattern is 1 μm and is made up of synthetic rubber.After this film with pattern is formed, dry this film.
With reference to figure 3, step S
3, this open area is etched, etch depth is greater than the thickness of this N+ type doped layer 2 and until this N-type substrate 1, in the present embodiment, the degree of depth of the N-type substrate of etching is 5 μm; Namely, except the N+ type doped layer of open area is possible to determine when the sample has been completely etched and eliminates, the N-type substrate also etched skim that this open area is corresponding, this N-type substrate just defines groove 4 like this.This film with pattern, except the effect of mask plate, also has the effect of protection without the need to the N+ type doped layer of etching.
With reference to figure 4a, step S
4, accelerate boron ion and to 500eV and by the mode of ion implantation, this boron ion be vertically injected into from this open area on this N-type substrate 1 surface along direction a N-type substrate 1 to form the P+ type doped region 5 that square resistance is 40 Ω/, that is, this P+ type doped region 5 is formed in this groove 4, wherein, this P+ type doped region 5 be not in contact with each other without the N+ type doped layer etched with this.In the present embodiment, this P+ type doped region 5 be 5 μm with the minimum range of being somebody's turn to do without the N+ type doped layer etched.
With reference to figure 5, step S
5, adopt the conventional means of this area to remove this film 3 with pattern, carry out annealing steps afterwards, solar cell annealed 30 minutes to activate Doped ions at the temperature of 700 DEG C.By this P+ type doped region 5, the PN junction that should form P+/N/N+ structure without the N+ type doped layer 2 of etching and above-mentioned N-type substrate between the two.Thus, wafers doped completes.
With reference to figure 6, step S
6, by PECVD the back side of this wafers doped formed coating, this coating be the first passivation layer 61 and and anti-reflection film 7, wherein, this first passivation layer 61 and anti-reflection film 7 are silicon nitride film.
With reference to figure 7, step S
7, form the second passivation layer 62 by PECVD on the surface of this wafers doped, wherein, this second passivation layer 62 is silicon oxide film.
With reference to figure 8, step S
8, form positive electrode 81 and negative electrode 82 on the surface of this wafers doped, wherein, this positive electrode 81 is formed on this P+ type doped region 5, and this negative electrode 82 is formed on this N+ type doped layer 2 without etching.Silver is wherein adopted to starch and pass through silk screen printing method for producing positive electrode 81 and negative electrode 82.Enter step S afterwards
9, by this wafers doped 700 DEG C sintering 30 minutes, make metallic element and the wafers doped eutectic compound of positive electrode 81 and negative electrode 82, thus, described solar cell completes.It will be appreciated by those skilled in the art that surface described here, the back side are all comparatively speaking, not limitation of the present invention.
Embodiment 2
With reference to figure 1, step S
1, form N+ type doped layer 2 on N-type substrate 1 surface, the square resistance of this N+ type doped layer is 100 Ω/.Specifically, phosphonium ion is accelerated to 50keV and by the mode of ion implantation by this phosphonium ion from the surface imp lantation of this N-type substrate to this N-type substrate.
With reference to figure 2, step S
2, form the film 3 with pattern on this N+ type doped layer 2 surface, wherein, the region do not covered by this film 3 with pattern is open area; This film with pattern plays the effect of mask.Wherein form this film 3 with pattern by the mode of silk screen printing, wherein this thickness with the film of pattern is 50 μm and is made up of albronze.After this film with pattern is formed, dry this film.
With reference to figure 3, step S
3, this open area is etched, etch depth is greater than the thickness of this N+ type doped layer 2 and until this N-type substrate 1, in the present embodiment, the degree of depth of the N-type substrate of etching is 30 μm; Namely, except the N+ type doped layer of open area is possible to determine when the sample has been completely etched and eliminates, the N-type substrate also etched skim that this open area is corresponding, this N-type substrate just defines groove 4 like this.This film with pattern, except the effect of mask plate, also has the effect of protection without the need to the N+ type doped layer of etching.
With reference to figure 4a, step S
4, accelerate boron ion and to 50keV and by the mode of ion implantation, this boron ion be vertically injected into from this open area on this N-type substrate 1 surface along direction a N-type substrate 1 to form the P+ type doped region 5 that square resistance is 120 Ω/, that is, this P+ type doped region 5 is formed in this groove 4, wherein, this P+ type doped region 5 be not in contact with each other without the N+ type doped layer etched with this.In the present embodiment, this P+ type doped region 5 be 30 μm with the minimum range of being somebody's turn to do without the N+ type doped layer etched.
With reference to figure 5, step S
5, adopt the conventional means of this area to remove this film 3 with pattern, carry out annealing steps afterwards, solar cell annealed 30 seconds to activate Doped ions at the temperature of 1100 DEG C.By this P+ type doped region 5, the PN junction that should form P+/N/N+ structure without the N+ type doped layer 2 of etching and above-mentioned N-type substrate between the two.Thus, wafers doped completes.
With reference to figure 6, step S
6, by PECVD the back side of this wafers doped formed coating, this coating be the first passivation layer 61 and and anti-reflection film 7, wherein, this first passivation layer 61 is silicon oxide film, and anti-reflection film 7 is silicon nitride film.
With reference to figure 7, step S
7, form the second passivation layer 62 by PECVD on the surface of this wafers doped, wherein, this second passivation layer 62 is amorphous silicon membrane.
With reference to figure 8, step S
8, form positive electrode 81 and negative electrode 82 on the surface of this wafers doped, wherein, this positive electrode 81 is formed on this P+ type doped region 5, and this negative electrode 82 is formed on this N+ type doped layer 2 without etching.Silver is wherein adopted to starch and pass through silk screen printing method for producing positive electrode 81 and negative electrode 82.Enter step S afterwards
9, by this wafers doped 1100 DEG C sintering 30 seconds, make metallic element and the wafers doped eutectic compound of positive electrode 81 and negative electrode 82, thus, completing of solar cell.
Embodiment 3
With reference to figure 1, step S
1, form N+ type doped layer 2 on N-type substrate 1 surface, the square resistance of this N+ type doped layer is 60 Ω/.Specifically, phosphonium ion is accelerated to 30keV and by the mode of ion implantation by this phosphonium ion from the surface imp lantation of this N-type substrate to this N-type substrate.
With reference to figure 2, step S
2, form the film 3 with pattern on this N+ type doped layer 2 surface, wherein, the region do not covered by this film 3 with pattern is open area; This film with pattern plays the effect of mask.Wherein form this film 3 with pattern by the mode of silk screen printing, wherein this thickness with the film of pattern is 30 μm and is made up of albronze.After this film with pattern is formed, dry this film.
With reference to figure 3, step S
3, this open area is etched, etch depth is greater than the thickness of this N+ type doped layer 2 and until this N-type substrate 1, in the present embodiment, the degree of depth of the N-type substrate of etching is 10 μm; Namely, except the N+ type doped layer of open area is possible to determine when the sample has been completely etched and eliminates, the N-type substrate also etched skim that this open area is corresponding, this N-type substrate just defines groove 4 like this.This film with pattern, except the effect of mask plate, also has the effect of protection without the need to the N+ type doped layer of etching.
With reference to figure 4a, step S
4, accelerate boron ion and to 30keV and by the mode of ion implantation, this boron ion be vertically injected into from this open area on this N-type substrate 1 surface along direction a N-type substrate 1 to form the P+ type doped region 5 that square resistance is 80 Ω/, that is, this P+ type doped region 5 is formed in this groove 4, wherein, this P+ type doped region 5 be not in contact with each other without the N+ type doped layer etched with this.In the present embodiment, this P+ type doped region 5 be 10 μm with the minimum range of being somebody's turn to do without the N+ type doped layer etched.
With reference to figure 5, step S
5, adopt the conventional means of this area to remove this film 3 with pattern, carry out annealing steps afterwards, solar cell annealed 10 minutes to activate Doped ions at the temperature of 850 DEG C.By this P+ type doped region 5, the PN junction that should form P+/N/N+ structure without the N+ type doped layer 2 of etching and above-mentioned N-type substrate between the two.Thus, wafers doped completes.
With reference to figure 6, step S
6, by PECVD the back side of this wafers doped formed coating, this coating be the first passivation layer 61 and and anti-reflection film 7, wherein, this first passivation layer 61 and anti-reflection film 7 are silicon nitride film.
With reference to figure 7, step S
7, form the second passivation layer 62 by PECVD on the surface of this wafers doped, wherein, this second passivation layer 62 is amorphous silicon membrane.
With reference to figure 8, step S
8, form positive electrode 81 and negative electrode 82 on the surface of this wafers doped, wherein, this positive electrode 81 is formed on this P+ type doped region 5, and this negative electrode 82 is formed on this N+ type doped layer 2 without etching.Silver is wherein adopted to starch and pass through silk screen printing method for producing positive electrode 81 and negative electrode 82.Enter step S afterwards
9, by this wafers doped 850 DEG C sintering 10 minutes, make metallic element and the wafers doped eutectic compound of positive electrode 81 and negative electrode 82, thus, completing of solar cell.
Embodiment 4
The principle of embodiment 4 is identical with embodiment 1, and its main technological steps is also identical, and difference is only the selection of following technique and parameter:
Step S
1middle employing POCl
3as diffuse source, form this N+ type doped layer 2 by the mode of thermal diffusion, the square resistance of this N+ type doped layer is 50 Ω/.
Step S
3, this open area is etched, etch depth is greater than the thickness of this N+ type doped layer 2 and until this N-type substrate 1, in the present embodiment, the degree of depth of the N-type substrate of etching is 15 μm.All the other NM processing steps and Selecting parameter are all identical in embodiment 1.
Embodiment 5
The principle of embodiment 5 is identical with embodiment 1, and its main technological steps is also identical, and difference is only the selection of following technique and parameter:
With reference to figure 4b, step S
4, accelerate boron ion to 500eV and by the mode of ion implantation, this boron ion to be vertically injected into from this open area on this N-type substrate 1 surface along direction a N-type substrate 1 to form the P+ type doped region 5 that square resistance is 70 Ω/, that is, this P+ type doped region 5 is formed in this groove 4, although ion implantation has good directivity, but in the collision process of ion, also part ion may be caused to be rebounded in the two side of this groove, form thinner P+ type doped layer 51, with reference to figure 4b, now this P+ type doped layer 51 contact without the N+ type doped layer 2 etched with this, in order to prevent PN junction breakdown, the P+ type doped layer 51 in this recess sidewall must be removed.Therefore, need to carry out step S
p: etching removal step S
4the P+ type doped layer 51 formed in this recess sidewall during this P+ type doped region of middle formation, what described etching adopted is conventional means.
After eliminating the P+ type doped layer 51 in this recess sidewall, this P+ type doped region 5 be not in contact with each other without the N+ type doped layer etched with this.In the present embodiment, this P+ type doped region 5 be 5 μm with the minimum range of being somebody's turn to do without the N+ type doped layer etched.
All the other NM processing steps and Selecting parameter are all identical in embodiment 1.
Embodiment 6
The principle of embodiment 6 is identical with embodiment 1, and its main technological steps is also identical, and difference is only the selection of following technique and parameter:
With reference to figure 4b, step S
4, form by the mode of thermal diffusion the P+ type doped region 5 that square resistance is 80 Ω/, that is, this P+ type doped region 5 is formed in this groove 4, because thermal diffusion process does not have a directivity, its diffusion is all directions, except form P+ type doped region 5 in the surface of groove except, also can form P+ type doped layer 51 in two of this groove sidewall, with reference to figure 4b, now this P+ type doped layer 51 contact without the N+ type doped layer 2 etched with this, in order to prevent PN junction breakdown, the P+ type doped layer 51 in this recess sidewall must be removed.Therefore, need to carry out step S
p: etching removal step S
4the P+ type doped layer 51 formed in this recess sidewall during this P+ type doped region of middle formation, what described etching adopted is conventional means.
After eliminating the P+ type doped layer 51 in this recess sidewall, this P+ type doped region 5 be not in contact with each other without the N+ type doped layer etched with this.In the present embodiment, this P+ type doped region 5 be 5 μm with the minimum range of being somebody's turn to do without the N+ type doped layer etched.
All the other NM processing steps and Selecting parameter are all identical with embodiment 1.
Embodiment 7
The principle of embodiment 7 is identical with embodiment 5, and its main technological steps is also identical, and difference is only the selection of following technique and parameter:
With reference to figure 8, step S
8further comprising the steps of:
Step S
81, in second passivation layer 62 corresponding with this P+ type doped region 5, form the first contact hole, and form the second contact hole in the second passivation layer 62 corresponding without the N+ type doped layer etched with this;
Step S
82, form positive electrode 81 and negative electrode 82 on the surface of this wafers doped, wherein, this positive electrode 81 is connected to this P+ type doped region 5 by this first contact hole, and this negative electrode 82 is connected to this N+ type doped layer 2 without etching by this second contact hole.That is, positive electrode 81 and negative electrode 82 form point cantact with wafers doped.
All the other NM processing steps and Selecting parameter are all identical with embodiment 5.
Embodiment 8
The principle of embodiment 8 is identical with embodiment 6, and its main technological steps is also identical, and difference is only the selection of following technique and parameter:
With reference to figure 8, step S
8further comprising the steps of:
Step S
81, in second passivation layer 62 corresponding with this P+ type doped region 5, form the first contact hole, and form the second contact hole in the second passivation layer 62 corresponding without the N+ type doped layer etched with this;
Step S
82, form positive electrode 81 and negative electrode 82 on the surface of this wafers doped, wherein, this positive electrode 81 is connected to this P+ type doped region 5 by this first contact hole, and this negative electrode 82 is connected to this N+ type doped layer 2 without etching by this second contact hole.That is, positive electrode 81 and negative electrode 82 form point cantact with wafers doped.
All the other NM processing steps and Selecting parameter are all identical with embodiment 6.
Only need in above process, the impurity material that the mode of exchanging base material and ion implantation or diffusion growth is adulterated, then the method is equally applicable to the making of P type solar energy solar cell, and when namely described N-type replaces with P type, P type replaces with N-type simultaneously.
Although the foregoing describe the specific embodiment of the present invention, it will be understood by those of skill in the art that these only illustrate, protection scope of the present invention is defined by the appended claims.Those skilled in the art, under the prerequisite not deviating from principle of the present invention and essence, can make various changes or modifications to these execution modes, but these change and amendment all falls into protection scope of the present invention.
Claims (16)
1. a manufacture method for solar cell, is characterized in that, it comprises the following steps:
Step S
1, in N-type substrate surface, form N+ type doped layer;
Step S
2, form the film with pattern on this N+ type doped layer surface, wherein, be not open area by this region with the plastic film covering of pattern;
Step S
3, this open area is etched, etch depth is greater than the thickness of this N+ type doped layer and until this N-type substrate, forms a groove with the position corresponding with this open area at this N-type substrate surface;
Step S
4, in the groove surfaces of N-type substrate, form P+ type doped region, wherein, this P+ type doped region be not in contact with each other without the N+ type doped layer etched;
Step S
5, remove this film with pattern to obtain wafers doped;
Step S
6, the back side of this wafers doped formed coating, this coating be the first passivation layer and and anti-reflection film;
Step S
7, form the second passivation layer on the surface of this wafers doped;
Step S
8, form positive electrode and negative electrode on the surface of this wafers doped, wherein, this positive electrode is formed on this P+ type doped region, and this negative electrode is formed on this N+ type doped layer without etching;
Step S
9, sinter this wafers doped, make metallic element and the wafers doped eutectic compound of positive electrode and negative electrode,
Wherein, step S
4afterwards, step S
5also comprise step S before
p:
Etching removal step S
4the P+ type doped layer formed in this recess sidewall during this P+ type doped region of middle formation,
This P+ type doped region is formed by the mode of ion implantation in step S4,
When described P type replaces with N-type, N-type replaces with P type simultaneously.
2. the manufacture method of solar cell as claimed in claim 1, is characterized in that, step S
1in form this N+ type doped layer by the mode of thermal diffusion or ion implantation, wherein the square resistance of this N+ type doped layer is 20-100 Ω/.
3. the manufacture method of solar cell as claimed in claim 1, is characterized in that, step S
2in form by the mode of silk screen printing the film that this has pattern, wherein this thickness with the film of pattern is 1-50 μm and is made up of synthetic rubber or metal.
4. the manufacture method of solar cell as claimed in claim 1, is characterized in that, step S
3in the degree of depth of N-type substrate of etching be at least 5 μm.
5. the manufacture method of solar cell as claimed in claim 1, is characterized in that, step S
4the square resistance of middle formed P+ type doped region is 40-120 Ω/.
6. as the manufacture method of the solar cell in claim 1-5 as described in any one, it is characterized in that, step S
6in form coating by PECVD, the first passivation layer of this coating is one or more the lamination in silica, carborundum, aluminium oxide, silicon nitride or amorphous silicon membrane, and the anti-reflection film of this coating is silicon nitride film.
7. as the manufacture method of the solar cell in claim 1-5 as described in any one, it is characterized in that, step S
7in form the second passivation layer by PECVD, this second passivation layer is one or more the lamination in silica, carborundum, aluminium oxide, silicon nitride or amorphous silicon membrane.
8. as the manufacture method of the solar cell in claim 1-5 as described in any one, it is characterized in that, step S
8middle employing silver slurry or silver-colored aluminium paste are also by silk screen printing method for producing positive electrode and/or negative electrode.
9. as the manufacture method of the solar cell in claim 1-5 as described in any one, it is characterized in that, step S
8further comprising the steps of:
Step S
81, in second passivation layer corresponding with this P+ type doped region, form the first contact hole, and form the second contact hole in the second passivation layer corresponding without the N+ type doped layer etched with this;
Step S
82, form positive electrode and negative electrode on the surface of this wafers doped, wherein, this positive electrode is connected to this P+ type doped region by this first contact hole, and this negative electrode is connected to this N+ type doped layer without etching by this second contact hole.
10., according to the solar cell that the manufacture method of solar cell as claimed in claim 1 is obtained, it is characterized in that, this solar cell comprises:
One wafers doped, wherein this wafers doped comprises:
The reeded N-type substrate of one surperficial tool;
Be formed at least one the N+ type doped region in this N-type substrate surface;
Be formed at the P+ type doped region in this N-type base groove surface, and
Be formed at the coating at this wafers doped back side, this coating be the first passivation layer and and anti-reflection film;
Be formed at second passivation layer on this wafers doped surface;
At least one is positioned at the negative electrode on this at least one N+ type doped region surface;
Be positioned at the positive electrode on this P+ type doped region surface;
Wherein, this N+ type doped region and this P+ type doped region are not in contact with each other,
Wherein, when described P type replaces with N-type, N-type replaces with P type simultaneously.
11. solar cells as claimed in claim 10, it is characterized in that, the minimum range of this N+ type doped region and this P+ type doped region is at least 5 μm.
12. solar cells as claimed in claim 10, is characterized in that, the square resistance of this N+ type doped region is 20-100 Ω/.
13., as the solar cell in claim 10-12 as described in any one, is characterized in that, the square resistance of P+ type doped region is 40-120 Ω/.
14. as the solar cell in claim 10-12 as described in any one, it is characterized in that, first passivation layer of this coating is one or more the lamination in silica, carborundum, aluminium oxide, silicon nitride or amorphous silicon membrane, and the anti-reflection film of this coating is silicon nitride film.
15., as the solar cell in claim 10-12 as described in any one, is characterized in that, this second passivation layer is one or more the lamination in silica, carborundum, aluminium oxide, silicon nitride or amorphous silicon membrane.
16. as the solar cell in claim 10-12 as described in any one, it is characterized in that, in the second passivation layer corresponding with this P+ type doped region, there is the first contact hole, there is in the second passivation layer corresponding with this at least one N+ type doped region at least one second contact hole, wherein, this positive electrode is connected to this P+ type doped region by this first contact hole, and by this, at least one second contact hole is connected to this at least one N+ type doped region to this at least one negative electrode.
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CN201110038160.1A CN102637767B (en) | 2011-02-15 | 2011-02-15 | Solar cell manufacturing method and solar cell |
KR1020137018723A KR101620532B1 (en) | 2010-12-17 | 2011-09-23 | Doping method, pn structure, method for fabricating solar cell, and solar cell |
KR1020157004300A KR101583599B1 (en) | 2010-12-17 | 2011-09-23 | Doping method, pn structure, method for fabricating solar cell, and solar cell |
KR1020157004294A KR101583594B1 (en) | 2010-12-17 | 2011-09-23 | Doping method, pn structure, method for fabricating solar cell, and solar cell |
PCT/CN2011/080101 WO2012079403A1 (en) | 2010-12-17 | 2011-09-23 | Doping method, pn structure, method for fabricating solar cell, and solar cell |
KR1020157004302A KR101583601B1 (en) | 2010-12-17 | 2011-09-23 | Doping method, pn structure, method for fabricating solar cell, and solar cell |
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US20140158192A1 (en) * | 2012-12-06 | 2014-06-12 | Michael Cudzinovic | Seed layer for solar cell conductive contact |
CN103035770A (en) * | 2012-12-21 | 2013-04-10 | 常州天合光能有限公司 | Back passivated iron-binding capacity (IBC) solar cell structure and preparation method thereof |
CN103904138A (en) * | 2012-12-27 | 2014-07-02 | 北京汉能创昱科技有限公司 | Full back side contact crystalline silicon cell and preparation method thereof |
US9461192B2 (en) | 2014-12-16 | 2016-10-04 | Sunpower Corporation | Thick damage buffer for foil-based metallization of solar cells |
KR102373649B1 (en) * | 2015-05-28 | 2022-03-11 | 엘지전자 주식회사 | Solar cell and method for manufacturing the same |
CN105244392A (en) * | 2015-11-09 | 2016-01-13 | 常州天合光能有限公司 | Photovoltaic cell applied to automobile roof for improving shadow shading reliability, and manufacturing method thereof |
CN108598215A (en) * | 2018-04-24 | 2018-09-28 | 通威太阳能(安徽)有限公司 | A kind of simple preparation method of novel I BC solar cells |
CN110676343A (en) * | 2018-06-15 | 2020-01-10 | 君泰创新(北京)科技有限公司 | Back contact solar cell and preparation method thereof |
CN113437179A (en) * | 2021-06-04 | 2021-09-24 | 浙江爱旭太阳能科技有限公司 | Solar cell and preparation method thereof |
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