CN102184883A - Method for filling deep trench having superstructure - Google Patents
Method for filling deep trench having superstructure Download PDFInfo
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- CN102184883A CN102184883A CN2011100872410A CN201110087241A CN102184883A CN 102184883 A CN102184883 A CN 102184883A CN 2011100872410 A CN2011100872410 A CN 2011100872410A CN 201110087241 A CN201110087241 A CN 201110087241A CN 102184883 A CN102184883 A CN 102184883A
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Abstract
The invention provides a method for filling a deep trench having a superstructure. The method comprises the following steps of: A, providing the deep trench to be formed with the superstructure, wherein the deep trench is positioned in an N-type epitaxial layer on an N-type semiconductor substrate; B, growing a P-type epitaxial layer into the deep trench to fill the deep trench, wherein a gas of an epitaxial process comprises dichloro silicane and hydrogen chloride having a large proportion; C, etching the P-type epitaxial layer in the deep trench by a drying method by taking the hydrogen chloride as an etching gas so that the top of the deep trench is opened; and D, keeping growing the P-type epitaxial layer in the deep trench and filling the deep trench, wherein the gas of the epitaxial process comprises the dichloro silicane and the hydrogen chloride having the large proportion. In the method, the epitaxial layer is alternatively grown in the deep trench having the superstructure and the epitaxial layer is etched on the top of the deep trench so that the trench notch is opened fully, and totally seamless epitaxial filling of the deep trench can be realized; slots in the trench are eliminated, creepage is avoided, and a power metal oxide semiconductor device can meet the electrical requirement on high voltage bearing and the mechanical requirement on a silicon sheet ground into a thin sheet.
Description
Technical field
The present invention relates to technical field of manufacturing semiconductors, specifically, the present invention relates to a kind of method for filling deep trench of super-junction structure.
Background technology
Power MOS (Metal Oxide Semiconductor) device with its input impedance height, loss is low, switching speed is fast, no second breakdown, the safety operation area is wide, dynamic property good, easily generally be used for low-power conversion and control field with characteristics such as the big electric currentization of preceding utmost point coupling realization, conversion efficiency height.Though power MOS (Metal Oxide Semiconductor) device has obtained surprising raising on power handling capability, but in the high pressure field along with the raising of operating voltage, its conducting resistance is index rising thereupon also, makes the conduction loss of power MOS (Metal Oxide Semiconductor) device rise rapidly along with withstand voltage raising.
In order to break the silicon limit of conducting resistance, improve withstand voltage, reduction conduction loss, further improve the characteristic of high power transistor, a series of new construction, new technology are arisen at the historic moment.And the effect of super knot (Super Junction) technology in the high pressure field that wherein is used for improving the power MOS (Metal Oxide Semiconductor) device performance showing very much, attracted large quantities of device suppliers research and development of injecting capital into, successfully developed the cold MOS in plane at present and dropped into commercial the application.
Cold MOS (Cool MOS) has another name called Super Junction MOSFET (super node MOSFET), invented by the Chen Xing of the Chengdu University of Electronic Science and Technology academician that assists at first, after transfer company of German Infineon.As the new device of power MOSFET field milestone, Cool MOS has broken the theoretical limit of conventional power MOSFET, comes out in 1998 and also moves towards market very soon.
Compare with common high-voltage MOSFET, Cool MOS is owing to adopt new structure of voltage-sustaining layer, utilized the notion of super knot, when almost keeping all advantages of power MOSFET, extremely low conduction loss is arranged again, caloric value is very low, can also show in addition to reduce chip area, so just be called Cool MOS.At this power transistor with 600 volts is example, uses the conducting resistance of the Cool MOS with super-junction structure to have only 20% of conventional power transistors of the same area.And its output capacitance, input capacitance also reduce synchronously, and the operating frequency characteristic of device is improved.
In general, the realization of super-junction structure has two kinds of approach, a kind of method that is to use repeatedly injection, multilayer epitaxial to form super knot; Another kind is the method that diffuses to form super knot in deep trench.Fig. 1 is use in the prior art is repeatedly injected, multilayer epitaxial forms super-junction structure cross-sectional view.As shown in the figure, this method is by extension successively on N type silicon substrate 100, and the mode of using ion to inject p type impurity on each layer N type epitaxial loayer 101～103 respectively correspondingly successively forms the P trap 104～106 of same horizontal level.Advance with boiler tube technology then, the expanded range of the P trap 104～106 in the N type epitaxial loayer 101～103 is come, the P trap 104～106 of same horizontal level is together in series up and down and forms a kind of " sugarcoated haws " shape, obtains the super-junction structure of Cool MOS.And Fig. 2 is the cross-sectional view of an extension intussusception growth formation super-junction structure in deep trench in the prior art.As shown in the figure, this method is by etching deep trench on N type silicon substrate 200, and fills these deep trench with P type epitaxial loayer 201,202.Advance with boiler tube technology afterwards, form p type diffusion region 203, obtain the super-junction structure of Cool MOS in the deep trench outside.
In above-mentioned two kinds of methods, the method that though first kind of use repeatedly injected, multilayer epitaxial forms super-junction structure need be on Semiconductor substrate etching and fill deep trench, but this method need repeatedly be used epitaxy technique, and cost is very high, so industry no longer adopts gradually.And the method for second kind of extension intussusception growth formation super-junction structure in deep trench is used the very difficult of epitaxy technique in deep trench, in the process of filling deep trench (degree of depth＞30 μ m) with epitaxial loayer, the top of deep trench possibly in advance sealing cause not filling up in the groove and stay long and narrow slit one.Fig. 3 in the prior art one in deep trench the extension intussusception growth form super-junction structure stays the scanning electron microscopy in one long and narrow slit in groove photo.As shown in the figure, leaky takes place in the long and narrow slit 301 that is arranged in deep trench in the time of can causing the work of Cool MOS device, thereby reduces the electric property and the mechanical performance of device.
Summary of the invention
Technical problem to be solved by this invention provides a kind of method for filling deep trench of super-junction structure, can realize seamless fully deep trench extension filling, make satisfied electricity requirement and the silicon chip grinding that bears high pressure of power MOS (Metal Oxide Semiconductor) device encapsulate sheet mechanical requirement.
In order to solve the problems of the technologies described above, the invention provides a kind of method for filling deep trench of super-junction structure, comprise step:
A., the deep trench of super-junction structure to be formed is provided, and described deep trench is arranged in the N type epitaxial loayer on the N type semiconductor substrate;
B. the growing P-type epitaxial loayer is filled described deep trench in described deep trench, and the gas of described epitaxy technique comprises the hydrogen chloride of dichloride base silane and vast scale;
C. be etching gas with hydrogen chloride, the P type epitaxial loayer in the described deep trench of dry etching makes the open-top of described deep trench;
D. continue in described deep trench the growing P-type epitaxial loayer and fill described deep trench, the gas of described epitaxy technique comprises the hydrogen chloride of dichloride base silane and vast scale.
Alternatively, the volume ratio of dichloride base silane (DCS) and hydrogen chloride (HCL) is 1: 2 to 1: 4 in the gas of described epitaxy technique.
Alternatively, described method also comprises at least one step C of circulation execution and D after step D, fill up described deep trench fully until described P type epitaxial loayer.
Alternatively, described method comprises also that after filling up described deep trench fully the unnecessary P type epitaxial loayer outside the described deep trench is returned quarter to be removed.
Alternatively, described N type semiconductor substrate is a N type silicon substrate.
Alternatively, the thickness of described N type epitaxial loayer is greater than 50 μ m.
Alternatively, the degree of depth of described deep trench is greater than 30 μ m.
Alternatively, the institute in the described method all finishes on the same process menu in epitaxial growth chamber in steps.
Compared with prior art, the present invention has the following advantages:
The present invention makes notch fully unlimited by the epitaxial loayer at alternating growth epitaxial loayer in the deep trench of super-junction structure and etching deep trench top, realize seamless fully deep trench extension filling gradually, eliminate long and narrow slit in the groove, avoided leaky, the electricity that power MOS (Metal Oxide Semiconductor) device can be satisfied bear high pressure requires and silicon chip grinding encapsulates sheet mechanical requirement.
Description of drawings
The above and other features of the present invention, character and advantage will become more obvious by the description below in conjunction with drawings and Examples, wherein:
Fig. 1 is use in the prior art is repeatedly injected, multilayer epitaxial forms super-junction structure cross-sectional view;
Fig. 2 is the cross-sectional view of an extension intussusception growth formation super-junction structure in deep trench in the prior art;
Fig. 3 in the prior art one in deep trench the extension intussusception growth form super-junction structure stays the scanning electron microscopy in one long and narrow slit in groove photo;
Fig. 4 is the flow chart of method for filling deep trench of the super-junction structure of one embodiment of the invention;
Fig. 5 to Fig. 8 is the cross-sectional view of deep trench filling process of the super-junction structure of one embodiment of the invention;
Fig. 9 to Figure 10 is the etching once more of deep trench filling process of super-junction structure of one embodiment of the invention and the cross-sectional view of filling step;
Figure 11 is the photo that the extension intussusception growth in deep trench of one embodiment of the invention forms the scanning electron microscopy of super-junction structure.
Embodiment
The invention will be further described below in conjunction with specific embodiments and the drawings, but should not limit protection scope of the present invention with this.
Fig. 4 is the flow chart of method for filling deep trench of the super-junction structure of one embodiment of the invention.As shown in the figure, this manufacture method originates in step S401.This method can comprise: execution in step S401, the deep trench of super-junction structure to be formed is provided, and deep trench is arranged in the N type epitaxial loayer on the N type semiconductor substrate; Execution in step S402, the growing P-type epitaxial loayer is filled deep trench in deep trench, and the gas of epitaxy technique comprises the hydrogen chloride of dichloride base silane and vast scale; Execution in step S403 is an etching gas with hydrogen chloride, and the P type epitaxial loayer in the dry etching deep trench makes the open-top of deep trench; Execution in step S404 continues growing P-type epitaxial loayer filling deep trench in deep trench, and the gas of epitaxy technique comprises the hydrogen chloride of dichloride base silane and vast scale.
Fig. 5 to Fig. 8 is the cross-sectional view of deep trench filling process of the super-junction structure of one embodiment of the invention.As shown in Figure 5, provide the deep trench 502 of super-junction structure to be formed, deep trench 502 is arranged in the N type epitaxial loayer 501 on the N type semiconductor substrate 500.In the present embodiment, this N type semiconductor substrate 500 can be N type silicon substrate.The thickness of N type epitaxial loayer 501 can be greater than 50 μ m, and the degree of depth of deep trench 502 can be greater than 30 μ m.
As shown in Figure 6, growing P-type epitaxial loayer 503 is filled deep trench 502 in deep trench 502, and the gas of epitaxy technique comprises the hydrogen chloride (HCL) of dichloride base silane (DCS) and vast scale, and wherein P type epitaxial loayer 503 does not have the disposable whole deep trench 502 of all filling up.P type epitaxial loayer 503 has just been filled out a part earlier in deep trench 502, when find that P type epitaxial loayer 503 when the top of deep trench 502 notch 504 might seal, stops the filling of P type epitaxial loayer 503 immediately in advance.
As shown in Figure 7, be etching gas with hydrogen chloride, the P type epitaxial loayer 503 in the dry etching deep trench 502 opens wide the top notch 504 of deep trench 502, fills more P type epitaxial loayers 503 with convenient continuation in deep trench 502.
As shown in Figure 8, continuation growing P-type epitaxial loayer 503 in deep trench 502 is filled deep trench 502, filled up fully by P type epitaxial loayer 503 until deep trench 502, obtain complete seamless super-junction structure in the deep trench 502, the gas of epitaxy technique comprises the hydrogen chloride of dichloride base silane and vast scale.
In the present embodiment, repeatedly in the gas of epitaxy technique the volume ratio of dichloride base silane and hydrogen chloride can be 1: 2 to 1: 4.
Certainly, also might on the basis of as shown in Figure 7 deep trench 502, continue therein growing P-type epitaxial loayer 503 with after filling this deep trench 502, find that once more P type epitaxial loayer 503 when the top of deep trench 502 notch 504 might seal in advance (as shown in Figure 9), should stop the filling of P type epitaxial loayer 503 once more.Then, as shown in figure 10, with hydrogen chloride etching gas once more, the P type epitaxial loayer 503 in the dry etching deep trench 502 opens wide the top notch 504 of deep trench 502, fills more P type epitaxial loayers 503 with convenient continuation in deep trench 502.In the present embodiment promptly, said method is in as shown in Figure 8 continuation after growing P-type epitaxial loayer 503 is filled deep trench 502 in deep trench 502, may also need to circulate carry out at least once as shown in Figure 7 etching and filling step as shown in Figure 8, fill up deep trench 502 fully until P type epitaxial loayer 503.
As shown in figure 11, it is the photo that the extension intussusception growth in deep trench of one embodiment of the invention forms the scanning electron microscopy of super-junction structure.As shown in the figure, use fill method of the present invention to eliminate long and narrow slit in the deep trench fully, it is very fine and close that the entire profile structure becomes, and the electricity that power MOS (Metal Oxide Semiconductor) device can be satisfied bear high pressure requires and silicon chip grinding encapsulates sheet mechanical requirement.
In addition, channel filling method of the present invention can also comprise that after filling up deep trench fully the unnecessary P type epitaxial loayer outside the deep trench is returned quarter to be removed, so that carry out other processing steps.
Institute in the channel filling method of the present invention can all finish on the same process menu (Recipe) in epitaxial growth chamber in steps.The cycle-index of each rapid step by step needed process time, epitaxial growth and etching etc. can be carried out necessary fine setting according to the actual process needs in the said method.
The present invention makes notch fully unlimited by the epitaxial loayer at alternating growth epitaxial loayer in the deep trench of super-junction structure and etching deep trench top, realize seamless fully deep trench extension filling gradually, eliminate long and narrow slit in the groove, avoided leaky, the electricity that power MOS (Metal Oxide Semiconductor) device can be satisfied bear high pressure requires and silicon chip grinding encapsulates sheet mechanical requirement.
Though the present invention with preferred embodiment openly as above; but it is not to be used for limiting the present invention; any those skilled in the art without departing from the spirit and scope of the present invention; can make possible change and modification, so protection scope of the present invention should be as the criterion with the scope that claim of the present invention was defined.
Claims (8)
1. the method for filling deep trench of a super-junction structure comprises step:
A., the deep trench of super-junction structure to be formed is provided, and described deep trench is arranged in the N type epitaxial loayer on the N type semiconductor substrate;
B. the growing P-type epitaxial loayer is filled described deep trench in described deep trench, and the gas of described epitaxy technique comprises the hydrogen chloride of dichloride base silane and vast scale;
C. be etching gas with hydrogen chloride, the P type epitaxial loayer in the described deep trench of dry etching makes the open-top of described deep trench;
D. continue in described deep trench the growing P-type epitaxial loayer and fill described deep trench, the gas of described epitaxy technique comprises the hydrogen chloride of dichloride base silane and vast scale.
2. method for filling deep trench according to claim 1 is characterized in that, the volume ratio of dichloride base silane and hydrogen chloride is 1: 2 to 1: 4 in the gas of described epitaxy technique.
3. method for filling deep trench according to claim 2 is characterized in that, described method also comprises at least one step C of circulation execution and D after step D, fill up described deep trench fully until described P type epitaxial loayer.
4. method for filling deep trench according to claim 3 is characterized in that, described method comprises also that after filling up described deep trench fully the unnecessary P type epitaxial loayer outside the described deep trench is returned quarter to be removed.
5. method for filling deep trench according to claim 1 is characterized in that, described N type semiconductor substrate is a N type silicon substrate.
6. method for filling deep trench according to claim 1 is characterized in that, the thickness of described N type epitaxial loayer is greater than 50 μ m.
7. method for filling deep trench according to claim 6 is characterized in that, the degree of depth of described deep trench is greater than 30 μ m.
8. according to each described method for filling deep trench in the claim 1 to 4, it is characterized in that the institute in the described method all finishes on the same process menu in steps in epitaxial growth chamber.
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| CN2011100872410A CN102184883A (en) | 2011-04-08 | 2011-04-08 | Method for filling deep trench having superstructure |
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Cited By (8)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| CN103094107A (en) * | 2011-10-28 | 2013-05-08 | 上海华虹Nec电子有限公司 | Filling method of silicon epitaxy for deep trench |
| CN103094067A (en) * | 2011-10-31 | 2013-05-08 | 上海华虹Nec电子有限公司 | Manufacture method of semi-conductor device |
| CN103855002A (en) * | 2012-11-28 | 2014-06-11 | 上海华虹宏力半导体制造有限公司 | Super junction depth groove filling process |
| CN106876463A (en) * | 2016-12-28 | 2017-06-20 | 全球能源互联网研究院 | A kind of superjunction silicon carbide device and preparation method thereof |
| CN107611080A (en) * | 2017-08-24 | 2018-01-19 | 上海华虹宏力半导体制造有限公司 | The extension fill method of groove |
| CN107919399A (en) * | 2017-12-13 | 2018-04-17 | 深圳市晶特智造科技有限公司 | Half superjunction devices and its manufacture method |
| CN114914191A (en) * | 2021-02-09 | 2022-08-16 | 格科半导体(上海)有限公司 | Method for epitaxial growth in deep trench |
| CN115188804A (en) * | 2022-09-14 | 2022-10-14 | 江苏长晶科技股份有限公司 | Super junction semiconductor device and manufacturing method thereof |
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| US6495294B1 (en) * | 1999-10-28 | 2002-12-17 | Denso Corporation | Method for manufacturing semiconductor substrate having an epitaxial film in the trench |
| CN1945796A (en) * | 2005-10-06 | 2007-04-11 | 株式会社上睦可 | Manufacturing method of semiconductor substrate |
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2011
- 2011-04-08 CN CN2011100872410A patent/CN102184883A/en active Pending
Patent Citations (2)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| US6495294B1 (en) * | 1999-10-28 | 2002-12-17 | Denso Corporation | Method for manufacturing semiconductor substrate having an epitaxial film in the trench |
| CN1945796A (en) * | 2005-10-06 | 2007-04-11 | 株式会社上睦可 | Manufacturing method of semiconductor substrate |
Cited By (9)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| CN103094107A (en) * | 2011-10-28 | 2013-05-08 | 上海华虹Nec电子有限公司 | Filling method of silicon epitaxy for deep trench |
| CN103094067A (en) * | 2011-10-31 | 2013-05-08 | 上海华虹Nec电子有限公司 | Manufacture method of semi-conductor device |
| CN103094067B (en) * | 2011-10-31 | 2015-10-14 | 上海华虹宏力半导体制造有限公司 | A kind of manufacture method of semiconductor device |
| CN103855002A (en) * | 2012-11-28 | 2014-06-11 | 上海华虹宏力半导体制造有限公司 | Super junction depth groove filling process |
| CN106876463A (en) * | 2016-12-28 | 2017-06-20 | 全球能源互联网研究院 | A kind of superjunction silicon carbide device and preparation method thereof |
| CN107611080A (en) * | 2017-08-24 | 2018-01-19 | 上海华虹宏力半导体制造有限公司 | The extension fill method of groove |
| CN107919399A (en) * | 2017-12-13 | 2018-04-17 | 深圳市晶特智造科技有限公司 | Half superjunction devices and its manufacture method |
| CN114914191A (en) * | 2021-02-09 | 2022-08-16 | 格科半导体(上海)有限公司 | Method for epitaxial growth in deep trench |
| CN115188804A (en) * | 2022-09-14 | 2022-10-14 | 江苏长晶科技股份有限公司 | Super junction semiconductor device and manufacturing method thereof |
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Application publication date: 20110914 |