CN102130024A - Method for plating silver on front side of silicon wafer - Google Patents

Method for plating silver on front side of silicon wafer Download PDF

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Publication number
CN102130024A
CN102130024A CN2010100273208A CN201010027320A CN102130024A CN 102130024 A CN102130024 A CN 102130024A CN 2010100273208 A CN2010100273208 A CN 2010100273208A CN 201010027320 A CN201010027320 A CN 201010027320A CN 102130024 A CN102130024 A CN 102130024A
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CN
China
Prior art keywords
photoresist
silver
silicon chip
coating
time
Prior art date
Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
Pending
Application number
CN2010100273208A
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Chinese (zh)
Inventor
陈冲
魏炜
殷建斐
Current Assignee (The listed assignees may be inaccurate. Google has not performed a legal analysis and makes no representation or warranty as to the accuracy of the list.)
Shanghai Huahong Grace Semiconductor Manufacturing Corp
Original Assignee
Shanghai Hua Hong NEC Electronics Co Ltd
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed by Shanghai Hua Hong NEC Electronics Co Ltd filed Critical Shanghai Hua Hong NEC Electronics Co Ltd
Priority to CN2010100273208A priority Critical patent/CN102130024A/en
Publication of CN102130024A publication Critical patent/CN102130024A/en
Pending legal-status Critical Current

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Abstract

The invention discloses a method for plating silver on the front side of a silicon wafer, which comprises the following steps of: coating photoresist on the front side of the silicon wafer for the first time, and performing exposure on the full silicon wafer; coating the photoresist for the second time, and performing the exposure for the second time by using a photoetching mask; developing, so that the retained photoresist forms an inverted trapezoid graph; depositing the silver on the silicon wafer by an evaporation coating technology, wherein the thickness of the silver is less than that of the retained photoresist; laminating on the silicon wafer and stripping by a laminating and film stripping technology, so that the silver on the photoresist is stripped with a film; and removing the residual photoresist.

Description

Silver-plated method on the silicon chip front
Technical field
The present invention relates in a kind of Chip Packaging method silver-plated on the silicon chip front.
Background technology
In semiconductor integrated circuit, in the typical desired chip manufacturing of power MOS transistor encapsulation technology, just need be silver-plated behind the silicon chip thinning back side.And the silicon chip in folder weldering (CLIP Bonding) encapsulation technology not only needs the back side silver-plated, and it is silver-plated that the front also needs, because the front of silicon chip is the device service area, also the silver-colored film that is plated must be kept apart according to the device service area.But silver-colored film can't form figure by etching as other metals.
Summary of the invention
Technical problem to be solved by this invention provides a kind of method silver-plated on the silicon chip front, and it can be at the positive silver-colored figure that needs that forms of silicon chip.
For solving the problems of the technologies described above, method silver-plated on the silicon chip front of the present invention comprises the steps: to carry out in the silicon chip front earlier the photoresist coating first time, then to described silicon chip flood exposure; Then carry out the photoresist coating second time, then adopt lithography mask version to carry out the exposure second time; Develop, make the photoresist that remains form down trapezoidal figure; Adopt evaporation coating technology deposit silver on silicon chip, the thickness of silver is less than the photoresist thickness that remains; Then adopt pad pasting to take off membrane technology, pad pasting and taking off on silicon chip is taken off the silver that is positioned on the photoresist together; Remove remaining photoresist at last.
In the method for the present invention, adopt Twi-lithography glue coating exposure, once developing obtains having the photoresist figure of inverted trapezoidal structure, makes the follow-up silver that steams more easily form loose silverskin section at photoresistance graphical interfaces place, is convenient to the final film of taking off; And there are certain thickness difference in photoresist and silver-colored film, making silver plating film at photoresist and non-photoresist zone intersection be unlikely to glutinous connects together, after pad pasting was taken off film, the silverskin on photoresist top layer will be stripped from totally, thereby realized that silver is covered needed any zone by selectivity.The ingenious pad pasting of exemplary power MOS device that utilized is taken off membrane process in the method for the present invention, makes this cover technology except being used for chip back surface, can also be used for front wafer surface and steam silver process.
Description of drawings
The present invention is further detailed explanation below in conjunction with the drawings and specific embodiments:
Fig. 1 to Fig. 8 is the structural representation with the corresponding instantiation of step of the present invention;
Fig. 9 is a method flow diagram of the present invention.
Embodiment
Fig. 9 is a method silver-plated on the silicon chip front of the present invention, is applied as example with method of the present invention in CLIP Bonding (folder weldering) encapsulation technology below, is specifically described.
Finish the wafer surface of all processing procedures, photoresistance is coated with twice development of double exposure once, forms the photoresistance figure of trapezoidal shape.Be specially and carry out a photoresist coating earlier, then do not adopt lithography mask version, silicon chip flood exposure (claiming blind exposing to the sun); Then carry out the photoresist coating once more, then adopt lithography mask version to carry out the exposure second time; Develop at last, make the photoresist figure that remains be trapezoidal (see Fig. 1 to Fig. 5, the photoresist among Fig. 5 comprises photoresist 1 and photoresist 2).The thickness of the photoresist of twice coating can be identical, and the condition of double exposure can be consistent.The time of developing can be 160 seconds to 185 seconds.
Adopt the silver-plated technology of evaporation silver-plated on said structure, the thickness of the silver that is plated is less than the thickness (see figure 6) of photoresist, and silver-plated film from can not stick and connecting together to prevent.
Adopt conventional pad pasting to take off membrane technology, pad pasting (see figure 7) on above-mentioned structure after silver-plated is then thrown off, and the Filming Technology that is adopted in adopting the typical silicon chip back side to grind to cut gets final product.Therefore in taking off the process of film, because a little less than the adhesion of photoresist and anterior layer aluminium film, evaporation is torn with the film that pastes at the silverskin on photoresist surface, and the silverskin on photoresist does not contact finely with following aluminium film, can not torn off and remains.
Carry out wet-cleaned at last and remove remaining photoresist, finish the purpose (see figure 8) of silver-plated formation predetermined pattern on the silicon chip front.
Subsequent technique and technology and conventional power MOS transistor device making technology before the photoresist coating that increases are in full accord.

Claims (4)

1. a positive silver-plated method on silicon chip is characterized in that, comprises the steps:
On the silicon chip front, carry out earlier the photoresist coating first time, then to described silicon chip flood exposure;
Then carry out the photoresist coating second time, then adopt lithography mask version to carry out the exposure second time;
Develop, the photoresist that remains forms down trapezoidal figure;
Adopt evaporation coating technology deposit silver on described silicon chip, the thickness of the silver of institute's deposit is less than the photoresist thickness that remains;
Then adopt pad pasting to take off membrane technology, pad pasting and taking off on described silicon chip, the silver that wherein is positioned on the described photoresist is taken off together;
Remove remaining photoresist at last.
2. method according to claim 1 is characterized in that: the photoresist of described twice coating is identical, and the condition of double exposure is identical.
3. method according to claim 1 is characterized in that: in the described step of developing, the time range of development is: 160 seconds to 185 seconds.
4. method according to claim 1 is characterized in that: wet clean process is adopted in the removal of described photoresist.
CN2010100273208A 2010-01-20 2010-01-20 Method for plating silver on front side of silicon wafer Pending CN102130024A (en)

Priority Applications (1)

Application Number Priority Date Filing Date Title
CN2010100273208A CN102130024A (en) 2010-01-20 2010-01-20 Method for plating silver on front side of silicon wafer

Applications Claiming Priority (1)

Application Number Priority Date Filing Date Title
CN2010100273208A CN102130024A (en) 2010-01-20 2010-01-20 Method for plating silver on front side of silicon wafer

Publications (1)

Publication Number Publication Date
CN102130024A true CN102130024A (en) 2011-07-20

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Family Applications (1)

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CN2010100273208A Pending CN102130024A (en) 2010-01-20 2010-01-20 Method for plating silver on front side of silicon wafer

Country Status (1)

Country Link
CN (1) CN102130024A (en)

Cited By (6)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
CN102544217A (en) * 2012-01-16 2012-07-04 中国电子科技集团公司第十一研究所 Large-scale indium column generation method for infrared focal plane detector
CN103078003A (en) * 2012-12-28 2013-05-01 中国电子科技集团公司第十一研究所 Method and device for photoetching focal plane detector indium column
CN103105729A (en) * 2011-11-14 2013-05-15 上海华虹Nec电子有限公司 Photolithography method capable of preventing ground silicon dust from polluting wafers
CN105374697A (en) * 2014-08-29 2016-03-02 无锡华润上华半导体有限公司 Method for forming front metal pattern of device
CN107887257A (en) * 2017-11-15 2018-04-06 上海华虹宏力半导体制造有限公司 The method that wafer frontside steams gold
CN109600910A (en) * 2018-11-07 2019-04-09 惠州市华星光电技术有限公司 A kind of reflective circuit board and preparation method thereof

Cited By (8)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
CN103105729A (en) * 2011-11-14 2013-05-15 上海华虹Nec电子有限公司 Photolithography method capable of preventing ground silicon dust from polluting wafers
CN102544217A (en) * 2012-01-16 2012-07-04 中国电子科技集团公司第十一研究所 Large-scale indium column generation method for infrared focal plane detector
CN103078003A (en) * 2012-12-28 2013-05-01 中国电子科技集团公司第十一研究所 Method and device for photoetching focal plane detector indium column
CN103078003B (en) * 2012-12-28 2015-07-29 中国电子科技集团公司第十一研究所 The photoetching method of focal plane detector indium column and device
CN105374697A (en) * 2014-08-29 2016-03-02 无锡华润上华半导体有限公司 Method for forming front metal pattern of device
CN105374697B (en) * 2014-08-29 2017-12-15 无锡华润上华科技有限公司 A kind of method for forming device front metal pattern
CN107887257A (en) * 2017-11-15 2018-04-06 上海华虹宏力半导体制造有限公司 The method that wafer frontside steams gold
CN109600910A (en) * 2018-11-07 2019-04-09 惠州市华星光电技术有限公司 A kind of reflective circuit board and preparation method thereof

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Application publication date: 20110720