CN102097286A - Method for monitoring step profiler in measuring accuracy of chip groove depth - Google Patents
Method for monitoring step profiler in measuring accuracy of chip groove depth Download PDFInfo
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- CN102097286A CN102097286A CN2009102424888A CN200910242488A CN102097286A CN 102097286 A CN102097286 A CN 102097286A CN 2009102424888 A CN2009102424888 A CN 2009102424888A CN 200910242488 A CN200910242488 A CN 200910242488A CN 102097286 A CN102097286 A CN 102097286A
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Abstract
The invention discloses a method for monitoring a step profiler in measuring the accuracy of chip groove depth, which reduces the delay on monitoring of the chip groove depth, improves the accuracy on monitoring of the groove depth and achieves the purpose of monitoring the step profiler in measuring the accuracy of the chip groove depth. The method comprises the following steps of: selecting a plurality of wafers, and determining the depth of a groove in a wafer chip area through measuring the depth of a groove in a wafer scribing channel area and the thickness of a hard mask layer by the step profiler in allusion to each wafer; and determining whether the accuracy of the groove depth measured by the step profiler reaches the requirements on the accuracy through analyzing the depth value of the groove in the chip area of the plurality of the wafers. By adopting the technical scheme, the time delay on monitoring of the chip depth can be shortened, the accuracy on controlling of the chip groove depth is improved, and the purpose of monitoring the step profiler in measuring the accuracy of the groove depth is realized.
Description
Technical field
The present invention relates to the semiconductor device layout design field, relate in particular to a kind of monitoring step instrument measured chip gash depth method of accuracy.
Background technology
Source drain breakdown voltage Bvdss and source leakage conductance energising resistance Rdson are the comparatively crucial parameters of low pressure groove DMOS (DMOS) device, these two parameters are comparatively responsive each other, generally speaking, the desired value of Bvdss is 20 volts～100 volts, the desired value of Rdson is for being lower than tens milliohms, because the value of Bvdss and Rdson is relevant with gash depth, therefore the gash depth difference may be determined the Bvdss and the Rdson of different values, therefore, in dried ditch groove technical process, the degree of depth of groove controlled accurately seem particularly important.
At present, the DMOS of conventional design (Double-diffused Metal Oxide Semiconductor, double-diffused metal oxide semiconductor) trench lithography layer domain only need have groove figure in the chip region of wafer, but the degree of depth of present groove and the ratio of width are bigger, generally speaking, as shown in Figure 3A, the width of the groove of chip region is about 0.4um, the degree of depth of groove is about 1.3um～2.5um, and the diameter of the probe of step instrument is generally more than tens um, therefore, the degree of depth of chip groove is measured the internal structure that to destroy chip if adopt the step instrument, therefore, can't adopt the step instrument that the degree of depth of chip groove is measured at present.At present, the monitoring mode that gash depth adopted is: have a fling at sheet in advance in advance, and the sheet of will going ahead of the rest carries out SEM (Scanning Electron Microscope., scanning electron microscopy) section, when carrying out the groove etching work procedure, whether the degree of depth of doing the groove that obtains after quarter by scanning SEM observation reaches predetermined degree of depth requirement, if do not have, then by calculating etch rate or increase etch period or reducing etch period and control the degree of depth requirement that the degree of depth of groove reaches setting.
Though can control the degree of depth requirement that the degree of depth of groove reaches setting to a certain extent, still there is following defective in prior art:
(1) because when carrying out etching groove at every turn, all need a large amount of sheets in advance to do the section monitoring, and with SEM the current degree of depth of groove is measured, whether the data decision that measures according to SEM adjusts the time of dried ditch groove again, therefore, consuming time long.
(2) some quarters, equipment was in the work defective mode, when etch rate has fluctuation, do not reach the degree of depth requirement of setting in the degree of depth of groove, do the time at quarter and may cause the degree of depth of the groove after the etching inaccurate, will cause the yield of product then if adjust according to the etch rate of this fluctuation; In addition, if SEM itself also may cause measurement data that the current degree of depth of groove is measured inaccurate when having the lower problem of measuring accuracy, thereby cause the degree of depth of the groove after the actual etching can not reach the degree of depth requirement of setting.
Summary of the invention
The embodiment of the invention provides a kind of monitoring step instrument measured chip gash depth method of accuracy, to reduce time delay that the chip gash depth is monitored, to improve the accuracy of gash depth monitoring and reach the purpose that the accuracy of step instrument measured chip gash depth is monitored.
A kind of method of accuracy of monitoring step instrument measured chip gash depth comprises:
Fill each wafer in the multi-disc wafer of polarity same trench depth test module of trench lithography floor of polarity and chip region at the cross ecotone in scribing road district, for described wafer is provided with corresponding etching duration, carry out the gash depth d that following step obtains the chip region of described multi-disc wafer:
Generate layer protecting film at described crystal column surface; Chip region and scribing road district to described wafer carry out trench lithography and etching groove processing, the etching groove duration is the etching duration of the setting of described wafer correspondence, form first groove in described chip region, in the gash depth test module in described scribing road district, be formed for second groove that the degree of depth to described first groove detects; The degree of depth that adopts the step instrument to measure described second groove is d1; Obtain the depth d of described first groove according to the thickness d 2 of described d1 and described diaphragm;
The degree of depth of second groove in the scribing road district of the described multi-disc wafer of employing scanning electron microscopy measurement is d ';
The depth d of second groove of the described multi-disc wafer that obtains according to the depth d 2 of second groove of the multi-disc wafer that obtains by described step instrument, the first gash depth d and by scanning electron microscopy, whether the accuracy of determining the gash depth in described step instrument measured chip district reaches accuracy requirement.
In the embodiment of the invention, on the one hand, the depth value of first gash depth of the chip region of a plurality of wafers that the step instrument is measured and first groove of the corresponding wafer that scanning electron microscope test obtains compares, thereby whether the accuracy of judging step instrument measurement gash depth meets the requirement of expectation, thereby realized that the accuracy of the step instrument being measured gash depth monitors, with the accuracy of the gash depth value of the chip region that guarantees to measure; On the other hand, introduce the gash depth test module, and the chip region and the scribing road district of wafer all carried out the operation of trench lithography and etching groove, in the gash depth test module in chip region and scribing road district, form groove in the scribing road district of wafer; Measure the degree of depth of the groove in the gash depth test module by the step instrument, and determine the degree of depth of the groove of chip region according to the thickness of the diaphragm of the degree of depth of this groove and crystal column surface.Adopt technical solution of the present invention, only need to adopt the step instrument can be in real time, the degree of depth of the groove in monitoring chip district accurately, thereby overcome and need carry out the degree of depth that slicing treatment measures the chip region groove extremely to sheet in advance by scanning electron microscopy when the chip gash depth is measured at every turn in the prior art, and determined whether to adjust according to the degree of depth of groove and do the time at quarter and cause the problem big to gash depth monitoring time-delay, that accuracy is lower.
Description of drawings
Figure 1A is a monitoring step instrument measured chip gash depth method of accuracy flow process in the embodiment of the invention;
Figure 1B is for measuring the method flow diagram of chip wafer district gash depth in the embodiment of the invention;
Fig. 2 A is the schematic diagram of crystal column surface in the prior art;
Fig. 2 B is a schematic diagram of introducing the gash depth test module in the embodiment of the invention in the scribing road, cross zone of crystal column surface;
Fig. 3 A is the schematic diagram that forms groove in the prior art in the chip region of wafer;
Fig. 3 B is the schematic diagram that forms groove in the chip region and the scribing road district of wafer in the embodiment of the invention;
The data list that Fig. 4 detects for the accuracy that is used in the embodiment of the invention the step instrument test trenches degree of depth;
Fig. 5 be step instrument in the embodiment of the invention, the SEM test trenches degree of depth and calculate gash depth between the corresponding relation curve chart;
Fig. 6 is total etching duration correspondence table of chip wafer gash depth and consumption in the embodiment of the invention.
Embodiment
Below in conjunction with Figure of description the embodiment of the invention is described in detail.
Referring to Figure 1A, be monitoring step instrument measured chip gash depth method of accuracy flow process in the embodiment of the invention, this flow process comprises step:
The depth value of the chip region groove of depth value, the depth value d of chip region groove and these a plurality of wafers that SEM measures of the groove in the scribing road district of step 104, these a plurality of wafers of measuring according to the step instrument determines that the step instrument measures the accuracy of gash depth and whether meet the expectation requirement.
The specific implementation flow process of the step 104 in the above-mentioned flow process is shown in Figure 1B.
Referring to Figure 1B, for measuring the method flow diagram of chip wafer district gash depth in the embodiment of the invention, this flow process is that example describes with any wafer in the above-mentioned multi-disc wafer, cross ecotone filling shape at crystal column surface is the module (being the gash depth test module) of cuboid in advance, the polarity of this module is identical with the polarity of the trench lithography layer of chip region, and when photoetching process, this cuboid module is that the district is opened in photoetching; This flow process may further comprise the steps:
The structure of the wafer in this step is filling groove depth test module 23 gained in all or part of cross ecotone 22 of existing wafer 21 shown in Fig. 2 A shown in Fig. 2 B.Preferably, in order to reach the effect of better measurement gash depth, in the embodiment of the invention, in the wafer 21 with respect to being filled with gash depth test module 23 in the equally distributed a plurality of cross ecotones 22 of crystal column surface, shown in Fig. 2 B, be filled with gash depth test module 23 in equally distributed 5 cross ecotones 22 in wafer 21 surfaces.Wherein, the width of the upper surface of gash depth test module 23 can be set to 60um, and length is set to 100um, and these a plurality of gash depth test modules 23 that are distributed in wafer 21 surfaces are made the reticle that the GDS file is handed over the channeled layer that plate-making factory makes.
In the embodiment of the invention, can also adopt existing comparatively conventional mode to generate hard mask layer 31 with the growth pad oxide as hard mask layer 31, implementation be varied.
The photoresist layer (photoresist layer marks in the accompanying drawings) on step 204, removal wafer 21 surfaces.
In this step, shown in Fig. 3 B, (probe of step instrument is a cone shape to the width of the groove 33 that forms less than the maximum gauge of the probe of step instrument 32, the maximum gauge of probe is exactly the bottom surface diameter of a circle of this cone), therefore the width of groove 34 can be measured by the degree of depth of 32 pairs of grooves 34 of step instrument greater than the maximum gauge of the probe of step instrument 32.
In this step, the mode of the degree of depth of probe 32 test trenches 34 by the step instrument is as follows: step instrument probe 32 is streaked the gash depth test module 23 that is positioned at scribing road district cross ecotone 22, and the test data that obtains is the depth value of groove 34.
In this step, determine that the degree of depth of the groove 33 of chip region is specially: the depth d (being d=(d1-d2)) that (d1-d2) is defined as groove 33.
When the depth d of step 209, the groove in determining chip region 33 reaches the depth threshold of setting, remove the hard mask layer 31 on wafer 21 surfaces.
Preferably, in order better to monitor the accuracy that the step tester is monitored gash depth, find in time whether the test of step instrument is accurate, the embodiment of the invention is also set up the degree of depth and the step instrument of the groove 33 in SEM test chip district and is tested the graph of relation of the degree of depth of the groove 34 of drawing the section, road, whether accurately whether accurate, thereby reach timely monitoring step instrument test purpose by this graph of relation if analyzing the test of step instrument.
Whether the accuracy of the definite step instrument in the above-mentioned process step 104 being measured gash depth with a concrete example meets expectation and requires to be described in detail below.
In the embodiment of the invention, (numbering is respectively 01#～06#) to be taken at 6 wafer of introducing the gash depth test module in scribing road district, and be that this 6 wafer is set corresponding etching duration, the etching duration of 01#～06# wafer is linear change, as sets gradually and be 140s, 155s, 170s, 185s, 200s, 215s; And the desired value of the depth value of the groove of the chip region of setting 01#～06# wafer is followed successively by 1.45um, 1.55um, 1.65um, 1.75um, 1.85um, 1.95um.
At each wafer in above-mentioned 6 wafer, carry out following operation:
Etching groove mode in step 1, the above-mentioned flow process of employing is carried out etching processing to the gash depth test module in chip wafer district and the scribing road district, the etching duration of this wafer setting etching duration corresponding with this wafer equated, form groove and in the gash depth test module in this wafer scribing road district, form groove in the chip region of this wafer.
Step 3, adopt SEM directly to measure the degree of depth of groove of the chip region of above-mentioned wafer, the depth value that obtains is d ' and record.
Can obtain three groups of data of 6 wafer by above-mentioned three steps.
Each wafer that data list as shown in Figure 4 is record carries out the duration of etching groove and three groups of data of correspondence thereof; According to the data of list records shown in Figure 4, obtain many curve of approximation graphs of a relation as shown in Figure 5, whether the accuracy that the step instrument is measured gash depth meets expectation requires to judge that judgment mode is as follows:
The depth value of the chip region groove of 01#～06# wafer that the gash depth in step 3, the scribing road district that will measure by the step instrument obtains connects with broken line, obtains curve of approximation Q2;
Step 4, these three curves are analyzed, relatively determine that the step instrument measures the accuracy of gash depth.As: comparing data curve Q1 and data and curves Q3 are as can be known, the both is approximate linear change, and these two slope of a curve approximately equals (, determine by step instrument test and obtain the difference of depth value and the depth value of the chip region groove of measuring this wafer by SEM of chip region groove of this wafer in the fluctuation range of setting) promptly at each wafer; Comparing data curve Q3 and data and curves Q2 as can be known, these two curves are identical substantially; Thereby can determine by the accuracy of step instrument measurement gash depth higher.
By comparative analysis as can be known, the depth value that the gash depth of measuring wafer scribing road district by the step instrument obtains the groove of chip region equates substantially with the depth value of the groove of the direct chip region that measures by SEM, therefore, the accuracy of the degree of depth of the groove in chip wafer district being monitored by the step instrument is higher.The measurement of gash depth when inaccurate, is then needed to operations such as the step instrument overhaul the accuracy of the degree of depth of the groove of chip region being monitored with further assurance step instrument if obtain the step instrument according to above-mentioned three tracing analysis.
Preferably, for in the depth accuracy of the formed groove of chip region, shortening required debug time and debugging number of times and shortening product operation time delay in the etching groove process in the further assurance practical application, the embodiment of the invention is being determined accuracy that the step instrument measures gash depth when higher according to aforesaid way, may further comprise the steps:
When the degree of depth that adopts the step instrument to monitor the groove in chip wafer district reached the depth threshold of setting, record carried out total etching duration of etching groove institute actual consumption to the chip of this wafer, and sets up this total etching duration and the corresponding relation of depth threshold; When follow-up chip region to other wafers is carried out etching groove, directly according to this corresponding relation, the etching duration of etching groove is carried out in adjustment to the chip region of above-mentioned other wafers, so that the degree of depth of the groove of chip region reaches the depth threshold of setting, do not need again the degree of depth of frequent groove according to current chip region to adjust etch period so that the degree of depth of the groove of chip region reaches the depth threshold of setting.Adopt this kind mode when guaranteeing to obtain accurately gash depth, also to have shortened chip is carried out required debug time and debugging number of times in the etching groove process, thereby further improve product operation time delay, raise the efficiency.When in actual applications in batches wafer being carried out etching groove, effect is particularly remarkable.
With 6 wafer of enumerating in the embodiment of the invention is that example is described in detail above-mentioned mode, as:
Be respectively 01#～corresponding gash depth threshold value of 06# wafer setting and be respectively 1.55um, 1.65um, 1.75um, 1.85um, 1.95um, 2.05um.
Continuation is carried out etching to the groove of the chip region of above-mentioned 01#～06# wafer, adopt the gash depth of the chip region of step instrument monitoring 01#～06# wafer, when the gash depth of the chip region that monitors this 6 wafer reaches 1.55um respectively, 1.65um, 1.75um, 1.85um, 1.95um, 2.05um the time, record is respectively t1 to total etching duration (this total etching duration is total duration that gash depth is consumed from 0～gash depth threshold value) that this 01#～06# wafer carries out etching groove institute actual consumption, t2, t3, t4, t5, t6, and set up above-mentioned wafer and corresponding gash depth threshold value and actual consumption total etching duration corresponding relation as shown in Figure 6.Follow-up need carry out etching groove to other wafer the time, only need the corresponding relation according to as shown in Figure 6, can adjust the duration that above-mentioned other wafers is carried out etching groove.
Technical solution of the present invention is mainly used in and is not limited in the DMOS device, also can be applicable in IGBT (Insulated Gate Bipolar Transistor, the insulated gate bipolar transistor) device.
In the embodiment of the invention, on the one hand, the depth value of first gash depth of the chip region of a plurality of wafers that the step instrument is measured and first groove of the corresponding wafer that scanning electron microscope test obtains compares, thereby whether the accuracy of judging step instrument measurement gash depth meets the requirement of expectation, thereby realized that the accuracy of the step instrument being measured gash depth monitors, with the accuracy of the gash depth value of the chip region that guarantees to measure; On the other hand, introduce the gash depth test module, and the chip region and the scribing road district of wafer all carried out the operation of trench lithography and etching groove, in the gash depth test module in chip region and scribing road district, form groove in the scribing road district of wafer; Measure the degree of depth of the groove in the gash depth test module by the step instrument, and determine the degree of depth of the groove of chip region according to the thickness of the diaphragm of the degree of depth of this groove and crystal column surface.Adopt technical solution of the present invention, only need to adopt the step instrument can be in real time, the degree of depth of the groove in monitoring chip district accurately, thereby overcome and need carry out the degree of depth that slicing treatment measures the chip region groove extremely to sheet in advance by scanning electron microscopy when the chip gash depth is measured at every turn in the prior art, and determined whether to adjust according to the degree of depth of groove and do the time at quarter and cause the problem big to gash depth monitoring time-delay, that accuracy is lower; Again on the one hand, in the embodiment of the invention, obtain accuracy that the step instrument measures gash depth when higher in analysis, when the degree of depth that adopts the step instrument to monitor the groove in chip wafer district reaches the depth threshold of setting, record carries out the etching duration of etching groove institute actual consumption to the chip of this wafer, and sets up the corresponding relation of this etching duration and depth threshold; When follow-up chip region to other wafers is carried out etching groove, directly according to this corresponding relation, the etching duration of etching groove is carried out in adjustment to the chip region of above-mentioned other wafers, do not need again the degree of depth of frequent groove according to current chip region to adjust etch period so that the degree of depth of the groove of chip region reaches the depth threshold of setting, thereby when guaranteeing to obtain accurately gash depth, also shortened chip is carried out in the etching groove process the required adjustment time and adjusts number of times, thereby further shorten product operation time delay, raise the efficiency.
Obviously, those skilled in the art can carry out various changes and modification to the present invention and not break away from the spirit and scope of the present invention.Like this, if of the present invention these are revised and modification belongs within the scope of claim of the present invention and equivalent technologies thereof, then the present invention also is intended to comprise these changes and modification interior.
Claims (9)
1. a method of accuracy of monitoring step instrument measured chip gash depth is characterized in that, comprising:
Fill each wafer in the multi-disc wafer of polarity same trench depth test module of trench lithography floor of polarity and chip region at the cross ecotone in scribing road district, for described wafer is provided with corresponding etching duration, carry out the gash depth d that following step obtains the chip region of described multi-disc wafer:
Generate layer protecting film at described crystal column surface; Chip region and scribing road district to described wafer carry out trench lithography and etching groove processing, the etching groove duration is the etching duration of the setting of described wafer correspondence, form at least one first groove in described chip region, in the gash depth test module in described scribing road district, be formed for second groove that the degree of depth to described first groove detects; The degree of depth that adopts the step instrument to measure described second groove is d1; Obtain the depth d of described first groove according to the thickness d 2 of described d1 and described diaphragm;
The degree of depth of second groove in the scribing road district of the described multi-disc wafer of employing scanning electron microscopy measurement is d ';
The depth d of second groove of the described multi-disc wafer that obtains according to the depth d 2 of second groove of the multi-disc wafer that obtains by described step instrument, the first gash depth d and by scanning electron microscopy, whether the accuracy of determining the gash depth in described step instrument measured chip district reaches accuracy requirement.
2. the method for claim 1 is characterized in that, the etching duration of the setting of described multi-disc wafer correspondence is linear change;
The described accuracy of determining the gash depth in described step instrument measured chip district is specially:
Etching duration from low to high the order of described a plurality of wafers according to correspondence sorted;
Change if the depth value d1 of second groove of the described a plurality of wafers after the ordering is equal difference successively, and (d-d ') of each wafer in the fluctuation range of setting the time, determine that then described step instrument measures the accuracy of gash depth and reach accuracy requirement.
3. the method for claim 1 is characterized in that, the cross ecotone filling groove depth test module in the scribing road district of each wafer in the described multi-disc wafer is specially:
In crystal column surface with respect to being filled with the gash depth test module in the equally distributed a plurality of cross ecotones of crystal column surface.
4. the method for claim 1 is characterized in that, described first groove and described second groove are cuboid;
The width of described first groove is less than the maximum gauge of the probe of described step instrument, and the width of described second groove is greater than the maximum gauge of the probe of described step instrument.
5. the method for claim 1 is characterized in that, obtains the depth d of described first groove according to the thickness d 2 of described d1 and described diaphragm, is specially:
The difference of described d1 and d2 is defined as the depth d of described first groove.
6. as each described method of claim 1～5, it is characterized in that, obtain the thickness d 2 of the diaphragm of described crystal column surface, be specially:
Adopt the blooming tester to measure the thickness of described diaphragm, and the measurement data of described blooming tester is defined as the thickness d 2 of described diaphragm.
7. as each described method of claim 1～5, it is characterized in that, also comprise:
At each wafer in the described multi-disc wafer, after the chip region of described wafer and scribing road district obtain first groove and second groove respectively, remove the diaphragm of described crystal column surface.
8. as each described method of claim 1～5, it is characterized in that described diaphragm is a hard mask layer.
9. as each described method of claim 1～5, it is characterized in that, after the accuracy of the groove of determining described step instrument measured chip district reaches accuracy requirement, also comprise step:
For described multi-disc wafer is set corresponding gash depth threshold value d respectively ", and the gash depth threshold value d of each wafer correspondence " greater than the depth value d of separately first groove;
At each wafer in the described multi-disc wafer, continuation is carried out etching to first groove of this wafer, the degree of depth that measures first groove of described wafer by the step instrument reaches d " time; the degree of depth that writes down first groove of this wafer arrives d from d " the second etching duration, the degree of depth that is defined as first groove of described wafer with value of the duration of the setting etching duration of described wafer correspondence and described second etching is reached d " total duration of being consumed;
According to the gash depth threshold value of described multi-disc wafer correspondence and total duration of consumption, set up the gash depth threshold value of each wafer and correspondence thereof and the corresponding relation of total duration.
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