CN102077173B - 利用写入验证减轻代码的误码平层 - Google Patents

利用写入验证减轻代码的误码平层 Download PDF

Info

Publication number
CN102077173B
CN102077173B CN200980124441.XA CN200980124441A CN102077173B CN 102077173 B CN102077173 B CN 102077173B CN 200980124441 A CN200980124441 A CN 200980124441A CN 102077173 B CN102077173 B CN 102077173B
Authority
CN
China
Prior art keywords
codeword
erroneous
bits
bit
bit information
Prior art date
Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
Active
Application number
CN200980124441.XA
Other languages
English (en)
Chinese (zh)
Other versions
CN102077173A (zh
Inventor
N·格拉菲
K·冈曼
Current Assignee (The listed assignees may be inaccurate. Google has not performed a legal analysis and makes no representation or warranty as to the accuracy of the list.)
Avago Technologies International Sales Pte Ltd
Original Assignee
Agere Systems LLC
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed by Agere Systems LLC filed Critical Agere Systems LLC
Publication of CN102077173A publication Critical patent/CN102077173A/zh
Application granted granted Critical
Publication of CN102077173B publication Critical patent/CN102077173B/zh
Active legal-status Critical Current
Anticipated expiration legal-status Critical

Links

Classifications

    • HELECTRICITY
    • H03ELECTRONIC CIRCUITRY
    • H03MCODING; DECODING; CODE CONVERSION IN GENERAL
    • H03M13/00Coding, decoding or code conversion, for error detection or error correction; Coding theory basic assumptions; Coding bounds; Error probability evaluation methods; Channel models; Simulation or testing of codes
    • H03M13/03Error detection or forward error correction by redundancy in data representation, i.e. code words containing more digits than the source words
    • H03M13/05Error detection or forward error correction by redundancy in data representation, i.e. code words containing more digits than the source words using block codes, i.e. a predetermined number of check bits joined to a predetermined number of information bits
    • H03M13/11Error detection or forward error correction by redundancy in data representation, i.e. code words containing more digits than the source words using block codes, i.e. a predetermined number of check bits joined to a predetermined number of information bits using multiple parity bits
    • H03M13/1102Codes on graphs and decoding on graphs, e.g. low-density parity check [LDPC] codes
    • GPHYSICS
    • G06COMPUTING OR CALCULATING; COUNTING
    • G06FELECTRIC DIGITAL DATA PROCESSING
    • G06F11/00Error detection; Error correction; Monitoring
    • G06F11/07Responding to the occurrence of a fault, e.g. fault tolerance
    • G06F11/08Error detection or correction by redundancy in data representation, e.g. by using checking codes
    • G06F11/10Adding special bits or symbols to the coded information, e.g. parity check, casting out 9's or 11's
    • G06F11/1008Adding special bits or symbols to the coded information, e.g. parity check, casting out 9's or 11's in individual solid state devices
    • G06F11/1012Adding special bits or symbols to the coded information, e.g. parity check, casting out 9's or 11's in individual solid state devices using codes or arrangements adapted for a specific type of error
    • GPHYSICS
    • G11INFORMATION STORAGE
    • G11BINFORMATION STORAGE BASED ON RELATIVE MOVEMENT BETWEEN RECORD CARRIER AND TRANSDUCER
    • G11B20/00Signal processing not specific to the method of recording or reproducing; Circuits therefor
    • G11B20/10Digital recording or reproducing
    • G11B20/18Error detection or correction; Testing, e.g. of drop-outs
    • G11B20/1833Error detection or correction; Testing, e.g. of drop-outs by adding special lists or symbols to the coded information
    • HELECTRICITY
    • H03ELECTRONIC CIRCUITRY
    • H03MCODING; DECODING; CODE CONVERSION IN GENERAL
    • H03M13/00Coding, decoding or code conversion, for error detection or error correction; Coding theory basic assumptions; Coding bounds; Error probability evaluation methods; Channel models; Simulation or testing of codes
    • H03M13/03Error detection or forward error correction by redundancy in data representation, i.e. code words containing more digits than the source words
    • H03M13/05Error detection or forward error correction by redundancy in data representation, i.e. code words containing more digits than the source words using block codes, i.e. a predetermined number of check bits joined to a predetermined number of information bits
    • H03M13/11Error detection or forward error correction by redundancy in data representation, i.e. code words containing more digits than the source words using block codes, i.e. a predetermined number of check bits joined to a predetermined number of information bits using multiple parity bits
    • H03M13/1102Codes on graphs and decoding on graphs, e.g. low-density parity check [LDPC] codes
    • H03M13/1105Decoding
    • H03M13/1108Hard decision decoding, e.g. bit flipping, modified or weighted bit flipping
    • HELECTRICITY
    • H03ELECTRONIC CIRCUITRY
    • H03MCODING; DECODING; CODE CONVERSION IN GENERAL
    • H03M13/00Coding, decoding or code conversion, for error detection or error correction; Coding theory basic assumptions; Coding bounds; Error probability evaluation methods; Channel models; Simulation or testing of codes
    • H03M13/03Error detection or forward error correction by redundancy in data representation, i.e. code words containing more digits than the source words
    • H03M13/05Error detection or forward error correction by redundancy in data representation, i.e. code words containing more digits than the source words using block codes, i.e. a predetermined number of check bits joined to a predetermined number of information bits
    • H03M13/11Error detection or forward error correction by redundancy in data representation, i.e. code words containing more digits than the source words using block codes, i.e. a predetermined number of check bits joined to a predetermined number of information bits using multiple parity bits
    • H03M13/1102Codes on graphs and decoding on graphs, e.g. low-density parity check [LDPC] codes
    • H03M13/1105Decoding
    • H03M13/1142Decoding using trapping sets
    • HELECTRICITY
    • H03ELECTRONIC CIRCUITRY
    • H03MCODING; DECODING; CODE CONVERSION IN GENERAL
    • H03M13/00Coding, decoding or code conversion, for error detection or error correction; Coding theory basic assumptions; Coding bounds; Error probability evaluation methods; Channel models; Simulation or testing of codes
    • H03M13/37Decoding methods or techniques, not specific to the particular type of coding provided for in groups H03M13/03 - H03M13/35
    • H03M13/45Soft decoding, i.e. using symbol reliability information
    • H03M13/451Soft decoding, i.e. using symbol reliability information using a set of candidate code words, e.g. ordered statistics decoding [OSD]
    • H03M13/453Soft decoding, i.e. using symbol reliability information using a set of candidate code words, e.g. ordered statistics decoding [OSD] wherein the candidate code words are obtained by an algebraic decoder, e.g. Chase decoding
    • H03M13/455Soft decoding, i.e. using symbol reliability information using a set of candidate code words, e.g. ordered statistics decoding [OSD] wherein the candidate code words are obtained by an algebraic decoder, e.g. Chase decoding using a set of erasure patterns or successive erasure decoding, e.g. generalized minimum distance [GMD] decoding
    • GPHYSICS
    • G11INFORMATION STORAGE
    • G11BINFORMATION STORAGE BASED ON RELATIVE MOVEMENT BETWEEN RECORD CARRIER AND TRANSDUCER
    • G11B20/00Signal processing not specific to the method of recording or reproducing; Circuits therefor
    • G11B20/10Digital recording or reproducing
    • G11B20/18Error detection or correction; Testing, e.g. of drop-outs
    • G11B20/1816Testing
    • G11B2020/1823Testing wherein a flag is set when errors are detected or qualified
    • GPHYSICS
    • G11INFORMATION STORAGE
    • G11BINFORMATION STORAGE BASED ON RELATIVE MOVEMENT BETWEEN RECORD CARRIER AND TRANSDUCER
    • G11B20/00Signal processing not specific to the method of recording or reproducing; Circuits therefor
    • G11B20/10Digital recording or reproducing
    • G11B20/18Error detection or correction; Testing, e.g. of drop-outs
    • G11B20/1833Error detection or correction; Testing, e.g. of drop-outs by adding special lists or symbols to the coded information
    • G11B2020/185Error detection or correction; Testing, e.g. of drop-outs by adding special lists or symbols to the coded information using an low density parity check [LDPC] code
    • GPHYSICS
    • G11INFORMATION STORAGE
    • G11BINFORMATION STORAGE BASED ON RELATIVE MOVEMENT BETWEEN RECORD CARRIER AND TRANSDUCER
    • G11B2220/00Record carriers by type
    • G11B2220/20Disc-shaped record carriers
    • G11B2220/25Disc-shaped record carriers characterised in that the disc is based on a specific recording technology
    • G11B2220/2508Magnetic discs
    • G11B2220/2516Hard disks
    • GPHYSICS
    • G11INFORMATION STORAGE
    • G11BINFORMATION STORAGE BASED ON RELATIVE MOVEMENT BETWEEN RECORD CARRIER AND TRANSDUCER
    • G11B2220/00Record carriers by type
    • G11B2220/60Solid state media
    • G11B2220/61Solid state media wherein solid state memory is used for storing A/V content

Landscapes

  • Engineering & Computer Science (AREA)
  • Physics & Mathematics (AREA)
  • Theoretical Computer Science (AREA)
  • Probability & Statistics with Applications (AREA)
  • Signal Processing (AREA)
  • Mathematical Physics (AREA)
  • Quality & Reliability (AREA)
  • General Engineering & Computer Science (AREA)
  • General Physics & Mathematics (AREA)
  • Error Detection And Correction (AREA)
  • Data Exchanges In Wide-Area Networks (AREA)
CN200980124441.XA 2009-04-21 2009-04-21 利用写入验证减轻代码的误码平层 Active CN102077173B (zh)

Applications Claiming Priority (1)

Application Number Priority Date Filing Date Title
PCT/US2009/041215 WO2010123493A1 (en) 2009-04-21 2009-04-21 Error-floor mitigation of codes using write verification

Publications (2)

Publication Number Publication Date
CN102077173A CN102077173A (zh) 2011-05-25
CN102077173B true CN102077173B (zh) 2015-06-24

Family

ID=43011368

Family Applications (1)

Application Number Title Priority Date Filing Date
CN200980124441.XA Active CN102077173B (zh) 2009-04-21 2009-04-21 利用写入验证减轻代码的误码平层

Country Status (7)

Country Link
US (1) US8484535B2 (https=)
EP (1) EP2307960B1 (https=)
JP (1) JP5432367B2 (https=)
KR (1) KR101321487B1 (https=)
CN (1) CN102077173B (https=)
TW (1) TWI411912B (https=)
WO (1) WO2010123493A1 (https=)

Families Citing this family (25)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
US8301979B2 (en) * 2008-10-07 2012-10-30 Sandisk Il Ltd. Low density parity code (LDPC) decoding for memory with multiple log likelihood ratio (LLR) decoders
US8683277B1 (en) 2010-07-13 2014-03-25 Marvell International Ltd. Defect detection using pattern matching on detected data
US8996967B2 (en) 2010-08-06 2015-03-31 Stmicroelectronics, Inc. Rendering data write errors detectable
US8745466B2 (en) * 2010-08-06 2014-06-03 Stmicroelectronics, Inc. Detecting data-write errors
US8769380B1 (en) * 2010-11-02 2014-07-01 Marvell International Ltd. Methods and apparatus for error recovery in memory systems employing iterative codes
US8768990B2 (en) 2011-11-11 2014-07-01 Lsi Corporation Reconfigurable cyclic shifter arrangement
EP2595321A1 (en) * 2011-11-16 2013-05-22 MStar Semiconductor, Inc. Tail-biting convolutional decoding apparatus and decoding method
US8775897B2 (en) * 2012-05-07 2014-07-08 Lsi Corporation Data processing system with failure recovery
US9213602B1 (en) 2014-06-23 2015-12-15 Seagate Technology Llc Write mapping to mitigate hard errors via soft-decision decoding
US9602243B2 (en) * 2014-08-26 2017-03-21 Electronics And Telecommunications Research Institute Low density parity check encoder, and low density parity check encoding method using the same
GB2531783B (en) 2014-10-30 2016-09-28 Ibm Method and device for removing error patterns in binary data
KR102556479B1 (ko) * 2015-03-20 2023-07-17 에스케이하이닉스 주식회사 Ldpc 디코더, 반도체 메모리 시스템 및 그것의 동작 방법
US9817716B2 (en) 2015-07-16 2017-11-14 Avago Technologies General Ip (Singapore) Pte. Ltd. Systems and methods for retaining non-converged data sets for additional processing
US10108509B2 (en) * 2015-07-16 2018-10-23 Texas Instruments Incorporated Dynamic enabling of redundant memory cells during operating life
US20170161141A1 (en) * 2015-12-02 2017-06-08 Samsung Electronics Co., Ltd. Method and apparatus for correcting data in multiple ecc blocks of raid memory
TWI632780B (zh) 2016-12-30 2018-08-11 慧榮科技股份有限公司 解碼方法與相關解碼裝置
US11010245B2 (en) * 2018-06-21 2021-05-18 Winbond Electronics Corp. Memory storage apparatus with dynamic data repair mechanism and method of dynamic data repair thereof
KR102643457B1 (ko) * 2018-11-19 2024-03-06 에스케이하이닉스 주식회사 Ldpc 디코더, 반도체 메모리 시스템 및 그것의 동작 방법
TWI748214B (zh) 2019-07-29 2021-12-01 慧榮科技股份有限公司 快閃記憶體控制器、儲存裝置及其讀取方法
US11271589B2 (en) * 2019-10-18 2022-03-08 SK Hynix Inc. Memory system with error-reduction scheme for decoding and method of operating such memory system
US11537927B2 (en) 2020-02-14 2022-12-27 International Business Machines Corporation Quantum readout error mitigation by stochastic matrix inversion
US11456757B2 (en) * 2020-12-16 2022-09-27 SK Hynix Inc. Oscillation detection and mitigation in bit-flipping decoders
CN113053451B (zh) * 2021-03-05 2022-05-10 深圳三地一芯电子有限责任公司 Nandflash内生成softbit的方法、系统、主机以及储存介质
US11621727B2 (en) 2021-06-04 2023-04-04 SK Hynix Inc. Decoding systems and methods for local reinforcement
US20250370858A1 (en) * 2024-06-04 2025-12-04 Infineon Technologies LLC Non-volatile memory metadata protection

Citations (5)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
US20050204264A1 (en) * 2004-02-27 2005-09-15 Oki Electric Industry Co., Ltd. Error correction circuit
US20070234184A1 (en) * 2003-12-22 2007-10-04 Qualcomm Incorporated Methods and apparatus for reducing error floors in message passing decoders
US20080104485A1 (en) * 2005-01-19 2008-05-01 Mikhail Yurievich Lyakh Data Communications Methods and Apparatus
CN101174839A (zh) * 2006-10-30 2008-05-07 富士通株式会社 编码装置、解码装置、编码/解码装置及记录/再现装置
CN101174838A (zh) * 2006-11-01 2008-05-07 富士通株式会社 最大似然检测器、错误校正电路和介质存储装置

Family Cites Families (109)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
US3755779A (en) 1971-12-14 1973-08-28 Ibm Error correction system for single-error correction, related-double-error correction and unrelated-double-error detection
US4295218A (en) 1979-06-25 1981-10-13 Regents Of The University Of California Error-correcting coding system
CA1305768C (en) 1987-11-16 1992-07-28 Masanobu Arai Digital signal receiving circuit with means for controlling a baud rate sampling phase by a power of sampled signals
US5721745A (en) 1996-04-19 1998-02-24 General Electric Company Parallel concatenated tail-biting convolutional code and decoder therefor
US6023783A (en) 1996-05-15 2000-02-08 California Institute Of Technology Hybrid concatenated codes and iterative decoding
US5734962A (en) 1996-07-17 1998-03-31 General Electric Company Satellite communications system utilizing parallel concatenated coding
JP2856190B2 (ja) 1997-02-27 1999-02-10 日本電気株式会社 演算処理装置および演算処理方法
US6550023B1 (en) 1998-10-19 2003-04-15 Hewlett Packard Development Company, L.P. On-the-fly memory testing and automatic generation of bitmaps
US6598204B1 (en) 1999-02-18 2003-07-22 Imec Vzw System and method of turbo decoding
US6678843B2 (en) 1999-02-18 2004-01-13 Interuniversitair Microelektronics Centrum (Imec) Method and apparatus for interleaving, deinterleaving and combined interleaving-deinterleaving
US6307901B1 (en) 2000-04-24 2001-10-23 Motorola, Inc. Turbo decoder with decision feedback equalization
US6888897B1 (en) 2000-04-27 2005-05-03 Marvell International Ltd. Multi-mode iterative detector
AU2001261509A1 (en) 2000-05-11 2001-11-20 Thomas J. Reynolds Interactive method and system for teaching decision making
US6910000B1 (en) 2000-06-02 2005-06-21 Mitsubishi Electric Research Labs, Inc. Generalized belief propagation for probabilistic systems
US6745157B1 (en) 2000-06-02 2004-06-01 Mitsubishi Electric Research Laboratories, Inc Super-node normalized belief propagation for probabilistic systems
JP2002111512A (ja) 2000-09-29 2002-04-12 Sony Corp 復号装置及び方法、並びにデータ受信装置及び方法
US6950977B2 (en) 2001-03-15 2005-09-27 3G.Com, Inc. Mechanism for turbo decoding when CRC for partial blocks is provided
NO316488B1 (no) 2002-04-26 2004-01-26 Kongsberg Defence Comm As Fremgangsmåte og apparat for mottak av digitale kommunikasjonssignaler
JP3708064B2 (ja) * 2002-05-31 2005-10-19 株式会社東芝 ディスク記憶装置、ディスクコントローラ及び同装置に適用するエラー訂正方法
EP1568140A1 (en) * 2002-11-27 2005-08-31 Koninklijke Philips Electronics N.V. Running minimum message passing ldpc decoding
US7296216B2 (en) 2003-01-23 2007-11-13 Broadcom Corporation Stopping and/or reducing oscillations in low density parity check (LDPC) decoding
CA2516541A1 (en) 2003-02-26 2004-09-16 Flarion Technologies, Inc. Soft information scaling for iterative decoding
US20070234178A1 (en) 2003-02-26 2007-10-04 Qualcomm Incorporated Soft information scaling for interactive decoding
US7340671B2 (en) 2003-10-10 2008-03-04 Regents Of The University Of California Decoding low density parity codes
KR101009785B1 (ko) 2003-12-10 2011-01-19 삼성전자주식회사 불균일 반복 축적 부호 부호화/복호화 장치 및 방법
DE60316616T2 (de) 2003-12-30 2008-07-17 Telefonaktiebolaget Lm Ericsson (Publ) Verfahren und system zur berechnung der bitfehlerrate eines empfangenen signals
US20050193320A1 (en) * 2004-02-09 2005-09-01 President And Fellows Of Harvard College Methods and apparatus for improving performance of information coding schemes
US7383484B2 (en) 2004-03-12 2008-06-03 Seagate Technology Llc Cyclic redundancy check based message passing in turbo product code decoding
WO2005096509A1 (en) 2004-03-31 2005-10-13 Intel Corporation Multi-threshold message passing decoding of low-density parity check codes
US7353444B2 (en) 2004-05-07 2008-04-01 Comtech Aha Corporation LDPC architecture
GB2414638A (en) 2004-05-26 2005-11-30 Tandberg Television Asa Decoding a concatenated convolutional-encoded and block encoded signal
US20050283707A1 (en) * 2004-06-22 2005-12-22 Eran Sharon LDPC decoder for decoding a low-density parity check (LDPC) codewords
US7457367B2 (en) 2004-07-07 2008-11-25 University Of Utah Research Foundation Detector and method for estimating data probability in a multi-channel receiver
CN1985520A (zh) 2004-07-15 2007-06-20 三星电子株式会社 运动信息编/解码及可分级视频编/解码设备和方法
US7181676B2 (en) 2004-07-19 2007-02-20 Texas Instruments Incorporated Layered decoding approach for low density parity check (LDPC) codes
US7730377B2 (en) 2004-07-22 2010-06-01 Texas Instruments Incorporated Layered decoding of low density parity check (LDPC) codes
US7143333B2 (en) 2004-08-09 2006-11-28 Motorola, Inc. Method and apparatus for encoding and decoding data
CN101341659B (zh) 2004-08-13 2012-12-12 Dtvg许可公司 用于多输入多输出通道的低密度奇偶校验码的码设计与实现的改进
US7760880B2 (en) 2004-10-13 2010-07-20 Viasat, Inc. Decoder architecture system and method
JP4595574B2 (ja) 2005-02-07 2010-12-08 ソニー株式会社 復号装置および方法、並びにプログラム
EP1717959A1 (en) 2005-04-29 2006-11-02 STMicroelectronics N.V. Method and device for controlling the decoding of a LDPC encoded codeword, in particular for DVB-S2 LDPC encoded codewords
US7577891B2 (en) 2005-05-27 2009-08-18 Aquantia Corporation Method and apparatus for extending decoding time in an iterative decoder using input codeword pipelining
US7802172B2 (en) 2005-06-20 2010-09-21 Stmicroelectronics, Inc. Variable-rate low-density parity check codes with constant blocklength
US20060285852A1 (en) 2005-06-21 2006-12-21 Wenze Xi Integrated maximum a posteriori (MAP) and turbo product coding for optical communications systems
US7739558B1 (en) 2005-06-22 2010-06-15 Aquantia Corporation Method and apparatus for rectifying errors in the presence of known trapping sets in iterative decoders and expedited bit error rate testing
EP1897223A1 (en) 2005-06-27 2008-03-12 Thomson Licensing S.A. Stopping criteria in iterative decoders
US7725800B2 (en) 2005-08-05 2010-05-25 Hitachi Global Stroage Technologies Netherlands, B.V. Decoding techniques for correcting errors using soft information
US7770090B1 (en) 2005-09-14 2010-08-03 Trident Microsystems (Far East) Ltd. Efficient decoders for LDPC codes
US8867336B2 (en) * 2005-09-28 2014-10-21 Qualcomm Incorporated System for early detection of decoding errors
US20070089016A1 (en) 2005-10-18 2007-04-19 Nokia Corporation Block serial pipelined layered decoding architecture for structured low-density parity-check (LDPC) codes
US20070089019A1 (en) 2005-10-18 2007-04-19 Nokia Corporation Error correction decoder, method and computer program product for block serial pipelined layered decoding of structured low-density parity-check (LDPC) codes, including calculating check-to-variable messages
US7844877B2 (en) * 2005-11-15 2010-11-30 Ramot At Tel Aviv University Ltd. Method and device for multi phase error-correction
US7602838B2 (en) 2005-12-22 2009-10-13 Telefonaktiebolaget Lm Ericsson (Publ) Linear turbo equalization using despread values
FI20055715A0 (fi) 2005-12-30 2005-12-30 Nokia Corp Turboekvalisointimenettely
US7752523B1 (en) 2006-02-13 2010-07-06 Marvell International Ltd. Reduced-complexity decoding of parity check codes
US7805642B1 (en) 2006-02-17 2010-09-28 Aquantia Corporation Low power iterative decoder using input data pipelining and voltage scaling
CN101416399B (zh) 2006-03-31 2013-06-19 英特尔公司 用于执行分层解码的分层解码器和方法
US7941737B2 (en) 2006-04-19 2011-05-10 Tata Consultancy Services Limited Low density parity check code decoder
JP4341639B2 (ja) 2006-05-15 2009-10-07 住友電気工業株式会社 復号装置および復号プログラム
US7941726B2 (en) 2006-06-30 2011-05-10 Microsoft Corporation Low dimensional spectral concentration codes and direct list decoding
US7580469B2 (en) 2006-07-06 2009-08-25 Provigent Ltd Communication link control using iterative code metrics
US7895500B2 (en) 2006-07-28 2011-02-22 Via Telecom Co., Ltd. Systems and methods for reduced complexity LDPC decoding
FR2905209B1 (fr) 2006-08-24 2008-10-31 St Microelectronics Sa Procede et dispositif de decodage de blocs encodes avec un code ldpc
FR2905210B1 (fr) 2006-08-24 2008-10-31 St Microelectronics Sa Procede et dispositif de decodage par couches d'une succession de blocs encodes avec un code ldpc
US7644339B2 (en) 2006-10-02 2010-01-05 Broadcom Corporation Overlapping sub-matrix based LDPC (low density parity check) decoder
US7979775B2 (en) 2006-10-30 2011-07-12 Motorola Mobility, Inc. Turbo interference suppression in communication systems
JP4833173B2 (ja) * 2006-10-30 2011-12-07 富士通株式会社 復号化器、符号化・復号化装置及び記録再生装置
JP2008112516A (ja) * 2006-10-31 2008-05-15 Fujitsu Ltd 誤り訂正回路及び情報再生装置
US8255763B1 (en) 2006-11-08 2012-08-28 Marvell International Ltd. Error correction system using an iterative product code
US7949927B2 (en) 2006-11-14 2011-05-24 Samsung Electronics Co., Ltd. Error correction method and apparatus for predetermined error patterns
FR2909499B1 (fr) 2006-12-01 2009-01-16 Commissariat Energie Atomique Procede et dispositif de decodage pour codes ldpc, et appareil de communication comprenant un tel dispositif
US8108759B2 (en) 2006-12-14 2012-01-31 Regents Of The University Of Minnesota Error detection and correction using error pattern correcting codes
US7949931B2 (en) 2007-01-02 2011-05-24 International Business Machines Corporation Systems and methods for error detection in a memory system
US8051363B1 (en) 2007-01-16 2011-11-01 Marvell International Ltd. Absorb decode algorithm for 10GBase-T LDPC decoder
US8117515B2 (en) 2007-03-23 2012-02-14 Sizhen Yang Methodology and apparatus for soft-information detection and LDPC decoding on an ISI channel
US7904793B2 (en) 2007-03-29 2011-03-08 Sandisk Corporation Method for decoding data in non-volatile storage using reliability metrics based on multiple reads
US20080256419A1 (en) * 2007-04-13 2008-10-16 Microchip Technology Incorporated Configurable Split Storage of Error Detecting and Correcting Codes
US7495519B2 (en) * 2007-04-30 2009-02-24 International Business Machines Corporation System and method for monitoring reliability of a digital system
US8418023B2 (en) 2007-05-01 2013-04-09 The Texas A&M University System Low density parity check decoder for irregular LDPC codes
US8151171B2 (en) 2007-05-07 2012-04-03 Broadcom Corporation Operational parameter adaptable LDPC (low density parity check) decoder
US7930621B2 (en) 2007-06-01 2011-04-19 Agere Systems Inc. Systems and methods for LDPC decoding with post processing
US8032816B2 (en) * 2007-06-01 2011-10-04 International Business Machines Corporation Apparatus and method for distinguishing temporary and permanent errors in memory modules
US7765426B2 (en) * 2007-06-07 2010-07-27 Micron Technology, Inc. Emerging bad block detection
US8037394B2 (en) 2007-06-29 2011-10-11 Hitachi Global Storage Technologies Netherlands, B.V. Techniques for generating bit reliability information in a post-processor using an error correction constraint
US8214719B1 (en) * 2007-07-26 2012-07-03 Marvell International Ltd. Long latency protocol for hard disk controller interface
US8127209B1 (en) 2007-07-30 2012-02-28 Marvell International Ltd. QC-LDPC decoder with list-syndrome decoding
US8181083B2 (en) 2007-08-27 2012-05-15 Stmicroelectronics S.R.L. Methods and architectures for layered decoding of LDPC codes with minimum latency
US8140948B2 (en) 2007-09-24 2012-03-20 Nec Laboratories America, Inc. Efficient low complexity high throughput LDPC decoding method and optimization
GB2455496B (en) 2007-10-31 2012-05-30 Hewlett Packard Development Co Error detection method and apparatus
US8127216B2 (en) 2007-11-19 2012-02-28 Seagate Technology Llc Reduced state soft output processing
US8219878B1 (en) 2007-12-03 2012-07-10 Marvell International Ltd. Post-processing decoder of LDPC codes for improved error floors
US8020070B2 (en) 2007-12-05 2011-09-13 Aquantia Corporation Trapping set decoding for transmission frames
US8156409B2 (en) 2008-02-29 2012-04-10 Seagate Technology Llc Selectively applied hybrid min-sum approximation for constraint node updates of LDPC decoders
US8161357B2 (en) 2008-03-17 2012-04-17 Agere Systems Inc. Systems and methods for using intrinsic data for regenerating data from a defective medium
US8099645B2 (en) 2008-04-11 2012-01-17 Nec Laboratories America, Inc. LDPC codes and stochastic decoding for optical transmission
US8245104B2 (en) 2008-05-02 2012-08-14 Lsi Corporation Systems and methods for queue based data detection and decoding
KR20090126829A (ko) 2008-06-05 2009-12-09 삼성전자주식회사 반복 복호 방법과 반복 복호 장치
US20090319860A1 (en) 2008-06-23 2009-12-24 Ramot At Tel Aviv University Ltd. Overcoming ldpc trapping sets by decoder reset
US20100037121A1 (en) 2008-08-05 2010-02-11 The Hong Kong University Of Science And Technology Low power layered decoding for low density parity check decoders
US8464129B2 (en) * 2008-08-15 2013-06-11 Lsi Corporation ROM list-decoding of near codewords
US8392692B2 (en) 2008-08-15 2013-03-05 Lsi Corporation Determining index values for bits of binary vector by processing masked sub-vector index values
US8103931B2 (en) 2008-08-27 2012-01-24 Mitsubishi Electric Research Laboratories, Inc. Method for constructing large-girth quasi-cyclic low-density parity-check codes
JP2010062907A (ja) 2008-09-04 2010-03-18 Toshiba Corp 復号装置および方法
US8301979B2 (en) 2008-10-07 2012-10-30 Sandisk Il Ltd. Low density parity code (LDPC) decoding for memory with multiple log likelihood ratio (LLR) decoders
US8205144B1 (en) 2008-10-13 2012-06-19 Marvell International Ltd. Error event processing methods and systems
US8161345B2 (en) 2008-10-29 2012-04-17 Agere Systems Inc. LDPC decoders using fixed and adjustable permutators
JP4516625B1 (ja) 2009-08-11 2010-08-04 正幸 安部 電子装置
US8407550B2 (en) 2009-08-14 2013-03-26 Mitsubishi Electric Research Laboratories, Inc. Method and system for decoding graph-based codes using message-passing with difference-map dynamics
JP5527176B2 (ja) 2010-11-25 2014-06-18 ソニー株式会社 非水電解質電池

Patent Citations (5)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
US20070234184A1 (en) * 2003-12-22 2007-10-04 Qualcomm Incorporated Methods and apparatus for reducing error floors in message passing decoders
US20050204264A1 (en) * 2004-02-27 2005-09-15 Oki Electric Industry Co., Ltd. Error correction circuit
US20080104485A1 (en) * 2005-01-19 2008-05-01 Mikhail Yurievich Lyakh Data Communications Methods and Apparatus
CN101174839A (zh) * 2006-10-30 2008-05-07 富士通株式会社 编码装置、解码装置、编码/解码装置及记录/再现装置
CN101174838A (zh) * 2006-11-01 2008-05-07 富士通株式会社 最大似然检测器、错误校正电路和介质存储装置

Also Published As

Publication number Publication date
JP2012525062A (ja) 2012-10-18
JP5432367B2 (ja) 2014-03-05
TW201129901A (en) 2011-09-01
TWI411912B (zh) 2013-10-11
EP2307960B1 (en) 2018-01-10
US20120030539A1 (en) 2012-02-02
CN102077173A (zh) 2011-05-25
KR20120011310A (ko) 2012-02-07
KR101321487B1 (ko) 2013-10-23
EP2307960A1 (en) 2011-04-13
EP2307960A4 (en) 2013-01-16
US8484535B2 (en) 2013-07-09
WO2010123493A1 (en) 2010-10-28

Similar Documents

Publication Publication Date Title
CN102077173B (zh) 利用写入验证减轻代码的误码平层
CN111200440B (zh) Ldpc解码器、半导体存储器系统及其操作方法
US8448039B2 (en) Error-floor mitigation of LDPC codes using targeted bit adjustments
US8924815B2 (en) Systems, methods and devices for decoding codewords having multiple parity segments
US8954822B2 (en) Data encoder and decoder using memory-specific parity-check matrix
US9048876B2 (en) Systems, methods and devices for multi-tiered error correction
US8443271B1 (en) Systems and methods for dual process data decoding
US8156409B2 (en) Selectively applied hybrid min-sum approximation for constraint node updates of LDPC decoders
US11641213B2 (en) Log-likelihood ratio mapping tables in flash storage systems
WO2018142391A1 (en) Device, system and method of implementing product error correction codes for fast encoding and decoding
US20100169746A1 (en) Low-complexity soft-decision decoding of error-correction codes
US9337955B2 (en) Power-optimized decoding of linear codes
CN102024501A (zh) 存储器系统以及对存储器系统的控制方法
TW201939902A (zh) 用於多個字元線失敗的軟晶片消除恢復
US9407290B2 (en) Error-correction decoding with conditional limiting of check-node messages
JP5723975B2 (ja) Ldpcコードの復号のための方法、システム、およびプログラム
JP2019057752A (ja) メモリシステム
KR101484066B1 (ko) 엘디피시 부호의 디코딩 방법
CN114333964A (zh) 用于存储器的纠错方法、装置、电子设备及介质
US12470232B1 (en) Polar codes for error correction in non-volatile memory devices

Legal Events

Date Code Title Description
C06 Publication
PB01 Publication
C10 Entry into substantive examination
SE01 Entry into force of request for substantive examination
C14 Grant of patent or utility model
C53 Correction of patent of invention or patent application
CB02 Change of applicant information

Address after: Delaware

Applicant after: Agere Systems Inc.

Address before: American Pennsylvania

Applicant before: AGERE SYSTEMS Inc.

COR Change of bibliographic data

Free format text: CORRECT: APPLICANT; FROM: EGREE SYSTEM CO. LTD. TO: AGERE SYSTEMS GUARDIAN CORP.

Free format text: CORRECT: ADDRESS; FROM:

GR01 Patent grant
ASS Succession or assignment of patent right

Owner name: AVAGO TECHNOLOGIES GENERAL IP (SINGAPORE) CORPORAT

Free format text: FORMER OWNER: AGERE SYSTEMS GUARDIAN CORP.

Effective date: 20150820

C41 Transfer of patent application or patent right or utility model
TR01 Transfer of patent right

Effective date of registration: 20150820

Address after: Singapore Singapore

Patentee after: Avago Technologies General IP (Singapore) Pte. Ltd.

Address before: Delaware

Patentee before: Agere Systems Inc.

TR01 Transfer of patent right

Effective date of registration: 20181019

Address after: Singapore Singapore

Patentee after: Avago Technologies General IP (Singapore) Pte. Ltd.

Address before: Singapore Singapore

Patentee before: Avago Technologies General IP (Singapore) Pte. Ltd.

TR01 Transfer of patent right
TR01 Transfer of patent right

Effective date of registration: 20201027

Address after: Singapore City

Patentee after: Broadcom International Pte. Ltd.

Address before: Singapore City

Patentee before: Avago Technologies General IP (Singapore) Pte. Ltd.

TR01 Transfer of patent right
TR01 Transfer of patent right

Effective date of registration: 20230412

Address after: Singapore, Singapore

Patentee after: Avago Technologies General IP (Singapore) Pte. Ltd.

Address before: Singapore, Singapore

Patentee before: Broadcom International Pte. Ltd.

TR01 Transfer of patent right