CN102007553B - M相耦合的磁元件以及相关的电感结构 - Google Patents

M相耦合的磁元件以及相关的电感结构 Download PDF

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CN102007553B
CN102007553B CN2009801137831A CN200980113783A CN102007553B CN 102007553 B CN102007553 B CN 102007553B CN 2009801137831 A CN2009801137831 A CN 2009801137831A CN 200980113783 A CN200980113783 A CN 200980113783A CN 102007553 B CN102007553 B CN 102007553B
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亚历山德·伊克拉纳科夫
安东尼·斯特拉塔科夫
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    • HELECTRICITY
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    • H01FMAGNETS; INDUCTANCES; TRANSFORMERS; SELECTION OF MATERIALS FOR THEIR MAGNETIC PROPERTIES
    • H01F27/00Details of transformers or inductances, in general
    • H01F27/24Magnetic cores
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    • GPHYSICS
    • G05CONTROLLING; REGULATING
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    • G05F1/12Regulating voltage or current wherein the variable actually regulated by the final control device is ac
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    • G05F1/12Regulating voltage or current wherein the variable actually regulated by the final control device is ac
    • G05F1/32Regulating voltage or current wherein the variable actually regulated by the final control device is ac using magnetic devices having a controllable degree of saturation as final control devices
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    • GPHYSICS
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    • G05F1/10Regulating voltage or current
    • G05F1/12Regulating voltage or current wherein the variable actually regulated by the final control device is ac
    • G05F1/32Regulating voltage or current wherein the variable actually regulated by the final control device is ac using magnetic devices having a controllable degree of saturation as final control devices
    • G05F1/34Regulating voltage or current wherein the variable actually regulated by the final control device is ac using magnetic devices having a controllable degree of saturation as final control devices combined with discharge tubes or semiconductor devices
    • G05F1/38Regulating voltage or current wherein the variable actually regulated by the final control device is ac using magnetic devices having a controllable degree of saturation as final control devices combined with discharge tubes or semiconductor devices semiconductor devices only
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    • H02M3/00Conversion of dc power input into dc power output
    • H02M3/02Conversion of dc power input into dc power output without intermediate conversion into ac
    • H02M3/04Conversion of dc power input into dc power output without intermediate conversion into ac by static converters
    • H02M3/10Conversion of dc power input into dc power output without intermediate conversion into ac by static converters using discharge tubes with control electrode or semiconductor devices with control electrode
    • H02M3/145Conversion of dc power input into dc power output without intermediate conversion into ac by static converters using discharge tubes with control electrode or semiconductor devices with control electrode using devices of a triode or transistor type requiring continuous application of a control signal
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    • H02M3/158Conversion of dc power input into dc power output without intermediate conversion into ac by static converters using discharge tubes with control electrode or semiconductor devices with control electrode using devices of a triode or transistor type requiring continuous application of a control signal using semiconductor devices only with automatic control of output voltage or current, e.g. switching regulators including plural semiconductor devices as final control devices for a single load
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    • H02M3/00Conversion of dc power input into dc power output
    • H02M3/02Conversion of dc power input into dc power output without intermediate conversion into ac
    • H02M3/04Conversion of dc power input into dc power output without intermediate conversion into ac by static converters
    • H02M3/10Conversion of dc power input into dc power output without intermediate conversion into ac by static converters using discharge tubes with control electrode or semiconductor devices with control electrode
    • H02M3/145Conversion of dc power input into dc power output without intermediate conversion into ac by static converters using discharge tubes with control electrode or semiconductor devices with control electrode using devices of a triode or transistor type requiring continuous application of a control signal
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    • H02M3/156Conversion of dc power input into dc power output without intermediate conversion into ac by static converters using discharge tubes with control electrode or semiconductor devices with control electrode using devices of a triode or transistor type requiring continuous application of a control signal using semiconductor devices only with automatic control of output voltage or current, e.g. switching regulators
    • H02M3/158Conversion of dc power input into dc power output without intermediate conversion into ac by static converters using discharge tubes with control electrode or semiconductor devices with control electrode using devices of a triode or transistor type requiring continuous application of a control signal using semiconductor devices only with automatic control of output voltage or current, e.g. switching regulators including plural semiconductor devices as final control devices for a single load
    • H02M3/1584Conversion of dc power input into dc power output without intermediate conversion into ac by static converters using discharge tubes with control electrode or semiconductor devices with control electrode using devices of a triode or transistor type requiring continuous application of a control signal using semiconductor devices only with automatic control of output voltage or current, e.g. switching regulators including plural semiconductor devices as final control devices for a single load with a plurality of power processing stages connected in parallel
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    • H02M7/00Conversion of ac power input into dc power output; Conversion of dc power input into ac power output
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    • H01F38/023Adaptations of transformers or inductances for specific applications or functions for non-linear operation of inductances
    • H01F2038/026Adaptations of transformers or inductances for specific applications or functions for non-linear operation of inductances non-linear inductive arrangements for converters, e.g. with additional windings

Abstract

一种M相耦合电感器,包括磁芯和M个绕组,其中M为大于1的整数。所述磁芯由芯材形成,并包括第一外置腿,所述第一外置腿形成第一缝隙。所述第一缝隙包括第一缝隙材料,所述第一缝隙材料具有的导磁率低于所述芯材的导磁率。每个绕组至少部分地缠绕所述磁芯的至少一部分,每个绕组具有各自的漏电感。所述第一缝隙使得所述漏电感大于所述第一外置腿未形成所述第一缝隙时的漏电感。所述耦合电感器可用于电源中,且所述电源可用于计算设备中。

Description

M相耦合的磁元件以及相关的电感结构
相关申请的交叉引用 
本申请要求于2008年3月14日提交的第61/036,836号美国临时专利申请以及于2008年4月21日提交的第为61/046,736号美国临时专利申请的优先权,上述专利申请的内容均通过引用并入本文。 
背景技术
Schultz等人提出的第6,362,986号美国专利(Schultz’986)描述了具有多相耦合电感器拓扑的直流-直流变换器,其公开的内容通过引用并入本文。这种变换器具有的优点包括电感器和切换器中具有减小的波纹电流,这可以减少每相的电感系数,或者减少具有传统多相直流-直流变换器拓扑的变换器的切换频率。因此,与传统多相拓扑相比,具有磁耦合输出电感器的直流-直流变换器具有优异的瞬态响应,并且不损失效率。这使得输出电容显著下降,从而使解决方案的成本更低更小。 
如Schultz’986中所描述的,采用耦合电感器的直流-直流变换器的性能受到所耦合的电感器的漏电感的影响。因此,期望根据电感器的应用来定制或调节耦合电感器的漏电感。 
已经设计出了一些耦合电感器。例如,图1至3示出了由VolterraSemiconductor Corporation开发的一个耦合电感器100。具体地,图1示出了耦合电感器100的侧视平面图,图2示出了其截面图,以及图3示出了其端视平面图。具有高度106的耦合电感器100包括磁芯102和至少两个绕组104。图4示出了一个绕组104的侧视立体图。 
如另一示例,Dong等人在标题为“Twisted Core Coupled Inductorsfor Microprocessor Voltage Regulators”的论文中提出了双相“绞合芯(twisted core)”耦合电感器。然而,该耦合电感器具有容积利用率较低的复合芯。另外,漏电感是由垂直型芯结构之间的距离和这些结构 的高度限定的,因此很难控制漏电感。而且,该绞合芯耦合电感器的泄露通道使电感器的设计变得复杂。 
此外,Dong等人在标题为“The Short Winding Path CoupledInductor Voltage Regulators”的论文中提出了一种耦合电感器。图5示出了一个耦合电感器500的俯视平面图,示出了Dong的论文中的多相耦合电感器。图5没有示出绕组以更清晰地示出芯502。但是图6示出了包括绕组602的电感器500。 
芯502包括用于每相的相应的腿504。每个腿504都具有宽度508,且具有宽度510的窗口506将相邻的腿504分隔开。因此,绕组602具有节距604,如图6和图7所示。窗口的宽度510相对校大并与腿的宽度508相似。需要大的窗口宽度510来提供磁通泄露通道,从而使漏电感足够大。通过改变芯502的几何结构和/或通过改变窗口的宽度510来改变漏电感。窗口506还容纳有相应的绕组连接端(windingtab),如图6所示。 
图7示出了沿着图5中A-A线的电感器500的横截面图。每个区域702相应于对应的腿504,每个区域704相应于对应的窗口506。如图7所示,耦合电感器500的大部分容积未被磁性材料占据。 
发明内容
一种M相耦合电感器,包括磁芯和M个绕组,其中M为大于1的整数。所述磁芯由芯材形成,并包括第一外置腿,所述第一外置腿形成第一缝隙。所述第一缝隙包括第一缝隙材料,所述第一缝隙材料具有的导磁率低于所述芯材的导磁率。每个绕组至少部分地缠绕所述磁芯的至少一部分,每个绕组具有各自的漏电感。所述第一缝隙使得所述漏电感大于所述第一外置腿未形成所述第一缝隙时的漏电感。 
一种M相电源,包括耦合电感器和M个切换电路,其中M为大于1的整数。所述耦合电感器包括:由芯材形成的磁芯,所述磁芯包括第一外置腿。所述第一外置腿形成第一缝隙,所述第一缝隙包括第一缝隙材料,所述第一缝隙材料具有的导磁率低于所述芯材的导磁率。耦合电感器进一步包括:M个绕组,每个绕组至少部分地缠绕所述磁 芯的至少一部分。每个绕组具有各自的第一端、第二端,以及各自的漏电感。每个所述第一端与公共第一节点电耦合,且每个切换电路与相应的绕组的第二端电耦合。每个切换电路被构造和设置以使所述第二端在至少两个不同电压之间切换。所述第一缝隙使得所述漏电感大于所述第一外置腿未形成所述第一缝隙时的漏电感。 
一种计算设备,包括计算机处理器,以及M相电源。M相电源与所述处理器电耦合以至少部分地为所述处理器供电。M是大于1的整数。所述电源包括耦合电感器和M个切换电路。耦合电感器包括由芯材形成的磁芯,所述磁芯包括第一外置腿。所述第一外置腿形成第一缝隙,所述第一缝隙包括第一缝隙材料,所述第一缝隙材料具有的导磁率低于所述芯材的导磁率。耦合电感器进一步包括M个绕组,每个绕组至少部分地缠绕所述磁芯的至少一部分。每个绕组具有各自第一端、第二端,以及各自的漏电感。每个所述第一端与公共第一节点电耦合,并且每个切换电路与相应的绕组的第二端电耦合。且被构造和设置以使所述第二端在至少两个不同电压之间切换。所述第一缝隙使得所述漏电感大于所述第一外置腿未形成所述第一缝隙时的漏电感。 
附图说明
图1示出了一个多相耦合电感器的侧视平面图; 
图2示出了图1的耦合电感器的截面图; 
图3示出了图1的耦合电感器的端视平面图; 
图4示出了图1的耦合电感器的侧视立体图; 
图5示出了没有绕组的多相耦合电感器的俯视平面图; 
图6示出了图5的耦合电感器具有绕组时的俯视平面图; 
图7示出了图5和图6的耦合电感器的截面图; 
图8示出了根据一个实施方式的一个耦合电感器的俯视立体图; 
图9示出了图8的耦合电感器不具有绕组时的俯视平面图; 
图10示出了图8的耦合电感器具有绕组时的俯视平面图; 
图11示出了图8-10的耦合电感器的截面图; 
图12示出了根据一个实施方式的一个耦合电感器的俯视平面图; 
图13示出了根据一个实施方式的一个耦合电感器的俯视平面图; 
图14和图15示出了根据一个实施方式的一个绕组的侧视立体图; 
图16示出了根据一个实施方式的一个绕组的侧视立体图; 
图17示出了根据一个实施方式的一个绕组的侧视立体图; 
图18示出了根据一个实施方式的一个绕组的侧视立体图; 
图19示出了根据一个实施方式的一个耦合电感器的俯视立体图; 
图20示出了图19的耦合电感器的俯视平面图; 
图21示出了根据一个实施方式的耦合电感器的俯视平面图; 
图22示出了绕组电阻与耦合电感器的高度的关系的图表; 
图23示出了绕组电阻与耦合电感器的高度的关系的图表; 
图24示出了根据一个实施方式的一个电源; 
图25示出了根据一个实施方式的一个计算设备。 
具体实施方式
应当注意,为使视图清楚,附图中某些元件没有按照比例示出。通过使用带有括号的标记来表示组件的具体示例(例如绕组861(1)),不带括号中的标记则表示任意该组件(例如,绕组816)。 
图8示出了一个M相耦合电感器800的俯视立体图,图9示出了该M相耦合电感器800的俯视平面图。图9中没有示出绕组816以更清楚地示出磁芯802。但是,图10示出了包括绕组816的耦合电感器800的俯视平面图。在图10中用虚线示出了在俯视平面图中无法看到的绕组816的边缘。图11示出了耦合电感器800沿图10的线B-B的截面图。如图11所示,耦合电感器800具有高度1108。虽然图8至11示出的耦合电感器800的示例中M等于3,然而M可以为大于1的任意整数。 
如图10至11所示,绕组816具有节距1002。图8至11示出的节距1002与电感器500的节距604(图6)相等,便于将耦合电感器800与耦合电感器500进行比较。但是,可根据设计选择而改变节距1002。例如,节距1002可等于在其中设置有耦合电感器800的直流-直流变换器的电源级的节距,从而使电路板迹线长度最小化以及使直流-直流变换器的功率密度最大化。 
磁芯802由铁氧体材料、铁粉材料或其他磁性芯材形成。磁芯802包括一对外置腿812。至少一个外置腿812形成具有厚度816的缝隙814。每个缝隙814的厚度816不必相同。缝隙814包括(例如至少部分地填充有)导磁率低于形成芯802的一个或多个材料的材料。例如,缝隙802科包括非磁材料,例如空气、绝缘带、塑料、胶和/或纸。如另一示例,缝隙802可以选择性地包括可饱和磁性材料,其在耦合电感器800的预期的正常运行期间饱和,从而使绕组816具有非线性的漏电感值。每个缝隙814不必填充相同的缝隙材料。缝隙814产生漏磁通道,并且缝隙814是每个绕组816各自的漏电感的最主要来源。因此,通过改变一个或多个缝隙814的厚度816可以改变漏电感。 
可以改变外置腿812中的缝隙814的位置。例如,图12和图13分别示出了为耦合电感器800具体实施方式的耦合电感器1200和1300,其中外置腿1212、1312形成的缝隙1214、1314的位置与图8至10中的位置不同。 
芯802进一步包括设置在一对外置腿812之间的M个内置腿804。每个内置腿具有各自的宽度808。相应的绕组816至少部分地缠绕每个内置腿804,每个内置腿816因此设置在一对外置腿812之间。虽然所示出的内置腿804和外置腿823是矩形的,但是其形状可以改变(例如为圆形)。又如图9所示,示出了第一和第二端部磁性元件902、904。 
例如,绕组816是具有基本为矩形的截面的箔式绕组。在一些实施方式中,绕组816是具有基本矩形横截面的单匝、单层绕组。图14是侧面立体图,图15是图8、10、12和13的绕组816的实施方式的部分透明的侧视立体图。但是,绕组816可以具有与图8、10、12和13不同的构造。例如,图16-18示出了绕组816的其他可能的构造。 
如另一个示例,图19示出了耦合电感器1900的俯视透视图,图20示出耦合电感器1900的俯视平面图,具有绕组1916的耦合电感器1900是耦合电感器800的一个实施方式。例如,绕组1916由矩形导电板材(例如铜)形成。用虚线画出了在俯视图中无法看到的绕组1916的边缘。另外,在图20的俯视平面图中无法看到的内置腿1904的边缘也用虚线画出。 
如又一个实施方式,图21示出一个包括绕组2116的耦合电感器2100的俯视平面图。耦合电感器2100与耦合电感器800的区别在于,绕组2116为绕组816的镜像。镜像绕组的一个可能的原因是为了最佳地容纳电源级的尺寸和/或几何结构。另外,可以改变绕组816使得每对绕组的节距1002都是不同的,从而容纳电源级的几何结构。而且,可以将绕组816改为包括通孔销或耦合于通孔销。 
而且,虽然每个绕组816都示为具有从每侧1004和1006延伸出的端部(参照图10),但是绕组816可按照不同的方式从电感器800延伸,或者不延伸出。例如,一个或多个绕组816的每个端部可从电感器800的公共侧伸出,以符合电源级的布局要求。 
通过具有宽度810的窗口806,每个内置腿804都与相邻的内置腿804或外置腿812分隔开。每个窗口806的窗口宽度810不必相同。因为内置腿804不必通过空气隙分隔来增加漏电感,因此窗口宽度806可以很小。相反地,如上所述,漏电感主要由缝隙814产生。实际上,窗口810可以尽可能的小,例如仅需要防止绕组816短路。例如,在一些实施方式中,窗口宽度810小于内置腿宽度808的50%、25%或10%。因此,在一些实施方式中,相邻内置腿804分开的距离(即窗口宽度810)小于任意相邻内置腿的宽度808的50%、25%或10%。构造耦合电感器800使得窗口宽度810相对较小,这样有利于增加耦合电感器800中被磁性芯材占据的容积部分,如下文所述。 
相比其他耦合电感器,耦合电感器800具有大量优点。例如,如上所述,仅通过改变一个或多个缝隙814的厚度就可调节漏电感。因此,可容易地调节漏电感,例如对一个或多个外置腿812进行磨压。相反地,必须改变磁芯几何结构和/或窗口宽度来调节耦合电感器100(图1-3)或耦合电感器500(图5-7)的漏电感。 
如另一个示例,虽然按照设计需求可改变内置腿804、窗口806和外置腿812的相对比例,但是耦合电感器800的容积的大部分可以由磁性芯材占据。例如,在图11的截面图中,区域1102表示内置腿804;区域1104表示外置腿812;区域1106表示窗口806。因此,在图11的示例中,耦合电感器800的容积的大部分被磁性材料占据。这增加了磁化电感, 从而增加了绕组之间的磁耦合,增加了漏电感的均匀性以及绕组之间的磁化电感,增加了对由于绕组电流不匹配而引起饱和的抗性,和/或减少了磁芯损耗。另外,耦合电感器800的一些实施方式提供的大量磁耦合可采用导磁率较低的芯材,从而减少磁芯损耗。 
相反地,在一些其他耦合电感器中,例如耦合电感器100(图1-3)或耦合电感器500(图5-7),电感器容积的大部分必须没有磁性材料,以在腿之间维持期望的空间。通过对比图7和图11可以理解这样的事实,与相同节距的耦合电感器500相比,耦合电感器800包括明显更多的磁性磁性芯材。 
另外,耦合电感器800允许绕组816具有较短的长度和较宽的宽度,从而减小绕组的电阻以及相应的电能损耗。相反地,一些其他耦合电感器需要长得多的绕组,例如耦合电感器100的绕组104的长度(参照图4)。图22示出了DC绕组电阻与电感器高度的关系图表2200。曲线2202对应于耦合电感器800的实施方式,曲线2204对应于耦合电感器100的实施方式。图22的两个电感器都具有相同的磁芯横截面和相同的绕组厚度。但是,与耦合电感器100的实施方式相比,耦合电感器800的实施方式的优点在于具有较小的最小DC电阻,并在较低的电感器高度处达到了最小电阻。 
而且,通常期望通过增加磁芯横截面来减少磁芯损耗。但是与其他耦合电感器相反,耦合电感器800的一些实施方式允许磁芯面积显著增加而不会显著增加DC绕组电阻。例如,图23示出了DC绕组电阻与电感器高度的关系图表2300。曲线2302对应于耦合电感器800的实施方式,而曲线2304对应于耦合电感器100的实施方式。图23的电感器具有两倍于图22的电感器的磁芯横截面。通过比较图22和图23可以看出,两倍磁芯横截面显著增加了耦合电感器100的绕组电阻。但是,虽然耦合电感器800的绕组电阻在电感器高度较小处稍微地增加,但是其绕组电阻在电感器高度较大处却减少。因此,耦合电感器800的一些实施方式有利地通过增加磁芯横截面而使绕组传导损耗和磁芯损耗均显著减少。 
而且,耦合电感器800的一些实施方式不需要薄的磁芯片,从而利于机械强度、制造、运输、处理和/或组装。相反地,一些其他的耦合电 感器需要薄的磁芯片,这些薄的磁芯片易碎且难于制造、运输、处理和/或组装。例如,耦合电感器100(图1)的磁芯102包括薄的顶片和薄的底片。 
耦合电感器800可以应用于电源中,例如图24的电源2400。虽然所示的电源2400具有三相,但是电源2400具有的相数可以是大于1的任意数量。 
电源2400包括耦合电感器2402,其为耦合电感器800的一个实施方式。耦合电感器2402包括磁芯2404和绕组2406。每个绕组2406的第一端2410与公共第一节点2412电耦合。每个第一端2410可选地从电感器2400的一个公共侧伸出。每个绕组2406的第二端2408与相应切换电路2414电耦合。每个第二端2408可选地从电感器2400的另一公共侧伸出。切换电路2414被构造和设置以使相应绕组2406的第二端2408在至少两个不同电压之间进行切换。控制器2418控制切换电路2414,并且控制器2418可选地包括反馈连接器2420,例如反馈连接器2420连接至第一节点2412。第一节点2412可选地包括滤波器2416。 
可使电源2400被构造和设置为具有不同的构造。例如,切换电路2414可使其相应的绕组2406的第二端2408在输入电压节点(图中未示出)和接地之间切换,从而使电源2400构造为降压型变换器,第一节点2412为输出电压节点,且滤波器2416是输出滤波器。在该示例中,每个切换电路2414包括至少一个高端切换装置和至少一个钳位二极管(catchdiode),或者包括至少一个高端切换装置和至少一个低端切换装置。在本文中,切换装置包括但不限于双极型结型晶体管、场效应晶体管(例如N沟道或P沟道金属氧化物半导体场效应晶体管、结型场效应晶体管或金属半导体场效应晶体管)、绝缘栅极双极型结型晶体管、晶体闸流管或者可控硅整流器。 
如另一个示例,电源2400可被构造为升压变换器,以使节点2412为输入电源节点,且切换电路2414使其相应的绕组2406的第二端2408在输出电压节点(图中未示出)和接地之间切换。另外,电源2400例如可被构造为降压-升压变换器,使得节点2412为公共节点,且切换电路2414使其相应绕组2406的第二端2408在输出电压节点(图中未示出) 和输入电压节点(图中未示出)之间切换。 
而且,如又一个示例,电源2400可形成独立的拓扑。例如,每个切换电路2414可包括变压器、至少一个切换装置以及整流电路,其中所述至少一个切换装置与变压器的主绕组电耦合,以及整流电路耦合在变压器的次级绕组和相应绕组2406的第二端2408之间。该整流电路可选地包括至少一个切换装置以提高效率。 
电源2400可以是计算设备,例如图25所示的计算设备2500。例如,计算设备2500例如是个人计算机或服务器主板、服务器处理板、具有计算能力的移动电话,或者个人数字助理。电源2502是电源2400的一个实施方式,其至少部分地为处理器2504供电。 
可以对上述方法和系统进行修改而不脱离本发明范围。因此应注意,上述描述和附图中的示例应理解为示例性的,对本发明不进行限制。所附的权利要求书将覆盖以上描述的一般的和具体的特征,以及本方法和系统的全部保护范围。 

Claims (34)

1.一种M相耦合电感器,其中M为大于1的整数,所述耦合电感器包括:
磁芯,由芯材形成,所述磁芯包括:
相对的第一和第二端部磁性元件;
M个相邻的内置腿,其中每个相邻的内置腿均设置在所述第一和第二端部磁性元件之间,并与所述第一和第二端部磁性元件连接;以及
第一外置腿,在所述第一和第二端部磁性元件的第一端处与所述第一和第二端部磁性元件连接,所述第一端在所述M个相邻的内置腿的外部,所述第一外置腿包括沿所述第一外置腿纵向的第一缝隙,所述第一缝隙的厚度小于所述第一和第二端部磁性元件在第一端处的间隔距离,所述第一缝隙包括第一缝隙材料,所述第一缝隙材料具有的导磁率低于所述芯材的导磁率;以及
M个绕组,每个绕组分别至少部分地缠绕一个相应的内置腿的至少一部分,每个绕组具有各自的漏电感,
其中,所述第一外置腿提供漏磁通道以增加所述M个绕组中各绕组的漏电感;以及
其中,每个内置腿具有各自的宽度,相邻的内置腿之间的分隔距离小于相邻内置腿中的任意一个的宽度的25%。
2.如权利要求1所述的耦合电感器,M是大于2的整数。
3.如权利要求2所述的耦合电感器,所述磁芯进一步包括第二外置腿,所述第二外置腿在所述第一和第二端部磁性元件的第二端处与所述第一和第二端部磁性元件连接,所述第二端在所述M个相邻的内置腿的外部,所述第二外置腿包括沿所述第二外置腿纵向的第二缝隙,所述第二缝隙的厚度小于所述第一和第二端部磁性元件在第二端处的间隔距离,所述第二缝隙包括第二缝隙材料,所述第二缝隙材料具有的导磁率低于所述芯材的导磁率,所述M个相邻内置腿设置在所述第一和第二外置腿之间,所述第二外置腿提供附加的漏磁通道,以进一步增加所述M个绕组中各绕组的漏电感。
4.如权利要求3所述的耦合电感器,每个内置腿具有各自的宽度,相邻的内置腿之间的分隔距离小于相邻内置腿中的任意一个的宽度的10%。
5.如权利要求3所述的耦合电感器,每个绕组均为单层、单匝且具有基本矩形横截面的绕组。
6.如权利要求3所述的耦合电感器,所述第二缝隙材料与所述第一缝隙材料不同。
7.如权利要求3所述的耦合电感器,所述第二缝隙材料与所述第一缝隙材料相同。
8.如权利要求3所述的耦合电感器,所述第一缝隙材料和所述第二缝隙材料中的至少之一包括选自空气、绝缘带、塑料、胶或纸的非导磁材料。
9.如权利要求1所述的耦合电感器,所述磁芯进一步包括第二外置腿,所述第二外置腿在所述第一和第二端部磁性元件的第二端处与所述第一和第二端部磁性元件连接,所述第二外置腿包括沿所述第二外置腿纵向的第二缝隙,所述第二缝隙的厚度小于所述第一和第二端部磁性元件在第二端处的间隔距离,所述第二缝隙包括第二缝隙材料,所述第二缝隙材料的导磁率低于所述芯材的导磁率,所述M个相邻内置腿设置在所述第一和第二外置腿之间,所述第二外置腿提供附加的漏磁通道,以进一步增加所述M个绕组的各自的漏电感。
10.如权利要求1所述的耦合电感器,M个相邻的内置腿都平行排列。
11.一种M相电源,其中M为大于1的整数,所述电源包括:
耦合电感器,包括:
磁芯,由芯材形成,所述磁芯包括:
相对的第一和第二端部磁性元件;
M个相邻的内置腿,其中每个相邻内置腿均设置在所述第一和第二端部磁性元件之间,并与所述第一和第二端部磁性元件连接;以及
第一外置腿,在所述第一和第二端部磁性元件的第一端处与所述第一和第二端部磁性元件连接,所述第一端在所述M个相邻的内置腿的外部,所述第一外置腿包括沿所述第一外置腿纵向的第一缝隙,所述第一缝隙的厚度小于所述第一和第二端部磁性元件在第一端处的间隔距离,所述第一缝隙包括第一缝隙材料,所述第一缝隙材料具有的导磁率低于所述芯材的导磁率;以及
M个绕组,每个绕组分别至少部分地缠绕一个相应的内置腿的至少一部分,每个绕组具有各自的第一端、第二端、以及各自的漏电感,每个绕组的第一端与公共第一节点电耦合,
其中,所述第一外置腿提供漏磁通道以增加所述M个绕组中各绕组的漏电感;以及
M个切换电路,每个切换电路与相应的绕组的第二端电耦合,且被构造和设置为使所述相应的绕组的第二端在至少两个不同电压之间切换。
12.如权利要求11所述的电源,M是大于2的整数。
13.如权利要求12所述的电源,所述磁芯进一步包括第二外置腿,所述第二外置腿在所述第一和第二端部磁性元件的第二端处与所述第一和第二端部磁性元件连接,所述第一和第二端部磁性元件的第二端在所述M个相邻的内置腿的外部,所述第二外置腿包括沿所述第二外置腿纵向的第二缝隙,所述第二缝隙的厚度小于所述第一和第二端部磁性元件在第二端处的间隔距离,所述第二缝隙包括第二缝隙材料,所述第二缝隙材料的导磁率低于所述芯材的导磁率,所述第一缝隙材料和第二缝隙材料中的至少之一包括选自空气、绝缘带、塑料、胶或纸的非导磁材料,所述第二外置腿提供附加的漏磁通道,以进一步增加所述M个绕组中各绕组的漏电感。
14.如权利要求13所述的电源,每个内置腿具有各自的宽度,相邻的内置腿之间的分隔距离小于相邻的内置腿中的任意一个的宽度的25%。
15.如权利要求14所述的电源,每个绕组为单层、单匝且具有基本矩形横截面的绕组。
16.如权利要求13所述的电源,所述绕组的每个第一端从所述耦合电感器的第一侧伸出,且每个所述绕组的第二端从所述耦合电感器的第二侧伸出。
17.如权利要求13所述的电源,所述绕组的至少两个第一端从所述耦合电感器的不同侧伸出。
18.如权利要求13所述的电源,所述绕组的至少两个第二端从所述耦合电感器的不同侧伸出。
19.如权利要求13所述的电源,每个绕组为单层、单匝且具有基本矩形横截面的绕组。
20.如权利要求19所述的电源,每个切换电路包括:
至少一个切换装置;
变压器,包括主绕组和次级绕组,所述主绕组与所述至少一个切换装置电耦合;以及
整流电路,电耦合在所述次级绕组和所述切换电路的相应绕组的第二端之间。
21.如权利要求18所述的电源,所述整流电路包括至少一个切换装置。
22.如权利要求19所述的电源,所述第一节点是输入电压节点。
23.如权利要求19所述的电源,所述第一节点是输出电压节点。
24.如权利要求19所述的电源,所述第一节点是接地节点。
25.一种计算设备,包括:
计算机处理器;以及
M相电源,与所述处理器电耦合,以至少部分地为所述处理器供电,M是大于1的整数,所述电源包括:
耦合电感器,包括:
磁芯,由芯材形成,所述磁芯包括:
相对的第一和第二端部磁性元件;
M个相邻的内置腿,其中每个相邻内置腿均设置在所述第一和第二端部磁性元件之间,并与所述第一和第二端部磁性元件连接;以及
第一外置腿,在所述第一和第二端部磁性元件的第一端处与所述第一和第二端部磁性元件连接,所述第一端在所述M个相邻的内置腿的外部,所述第一外置腿包括沿所述第一外置腿纵向的第一缝隙,所述第一缝隙的厚度小于所述第一和第二端部磁性元件在第一端处的间隔距离,所述第一缝隙包括第一缝隙材料,所述第一缝隙材料具有的导磁率低于所述芯材的导磁率;以及
M个绕组,每个绕组分别至少部分地缠绕一个相应的内置腿的至少一部分,每个绕组具有各自的第一端、第二端、以及各自的漏电感,每个绕组的第一端与公共第一节点电耦合,
其中,所述第一外置腿提供漏磁通道以增加所述M个绕组中各绕组的漏电感;以及
M个切换电路,每个切换电路与相应的绕组的第二端电耦合,且被构造和设置为使所述相应的绕组的第二端在至少两个不同电压之间切换。
26.如权利要求25所述的计算设备,M是大于2的整数。
27.如权利要求26所述的计算设备,所述磁芯进一步包括第二外置腿,所述第二外置腿在所述第一和第二端部磁性元件的第二端处与所述第一和第二端部磁性元件连接,所述第一和第二端部磁性元件的第二端在所述M个相邻的内置腿的外部,所述第二外置腿包括沿所述第二外置腿纵向的第二缝隙,所述第二缝隙的厚度小于所述第一和第二端部磁性元件在第二端处的间隔距离,所述第二缝隙包括第二缝隙材料,所述第二缝隙材料的导磁率低于所述芯材的导磁率,所述第一缝隙材料和第二缝隙材料中的至少之一包括选自空气、绝缘带、塑料、胶或纸的非导磁材料,所述第二外置腿提供附加的漏磁通道,以进一步增加所述M个绕组中各绕组的漏电感。
28.如权利要求27所述的计算设备,每个绕组均为单层、单匝且具有基本矩形横截面的绕组。
29.如权利要求27所述的计算设备,每个内置腿具有各自的宽度,相邻的内置腿之间的分隔距离小于相邻的内置腿中的任意一个的宽度的25%。
30.如权利要求29所述的计算设备,每个绕组均为单层、单匝且具有基本矩形横截面的绕组。
31.一种M相耦合电感器,其中M为大于1的整数,所述耦合电感器包括:
磁芯,由为铁氧体材料或铁粉材料的芯材构成,所述磁芯包括:
相对的第一和第二端部磁性元件;
M个相邻的内置腿,其中每个相邻内置腿均设置在所述第一和第二端部磁性元件之间,并与所述第一和第二端部磁性元件连接;以及
第一外置腿,在所述第一和第二端部磁性元件的第一端处与所述第一和第二端部磁性元件连接,所述第一端在所述M个相邻的内置腿的外部,所述第一外置腿包括沿所述第一外置腿纵向的第一缝隙,所述第一缝隙的厚度小于所述第一和第二端部磁性元件在第一端处的间隔距离,所述第一缝隙包括第一缝隙材料,所述第一缝隙材料具有的导磁率低于所述芯材的导磁率;以及
M个绕组,每个绕组分别至少部分地缠绕一个相应的内置腿的至少一部分,每个绕组具有各自的漏电感,
其中,所述第一外置腿提供漏磁通道以增加所述M个绕组中各绕组的漏电感。
32.如权利要求31所述的耦合电感器,M是大于2的整数。
33.如权利要求32所述的耦合电感器,所述磁芯进一步包括第二外置腿,所述第二外置腿在所述第一和第二端部磁性元件的第二端处与所述第一和第二端部磁性元件连接,所述第二端在所述M个相邻的内置腿的外部,所述第二外置腿包括沿所述第二外置腿纵向的第二缝隙,所述第二缝隙的厚度小于所述第一和第二端部磁性元件在第二端处的间隔距离,所述第二缝隙包括第二缝隙材料,所述第二缝隙材料的导磁率低于所述芯材的导磁率,所述M个相邻的内置腿位于所述第一和第二外置腿之间,所述第二外置腿提供附加的漏磁通道,以进一步增加所述M个绕组中各绕组的漏电感。
34.如权利要求33所述的耦合电感器,每个内置腿具有各自的宽度,相邻的内置腿之间的分隔距离小于相邻内置腿中的任意一个的宽度的25%。
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US8836463B2 (en) 2014-09-16
US8294544B2 (en) 2012-10-23
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