CN101999116B - 通过交叉页面扇区、多页面编码以及每一页面编码将数据存储在多级单元闪速存储器装置中的方法和设备 - Google Patents

通过交叉页面扇区、多页面编码以及每一页面编码将数据存储在多级单元闪速存储器装置中的方法和设备 Download PDF

Info

Publication number
CN101999116B
CN101999116B CN200980112686.0A CN200980112686A CN101999116B CN 101999116 B CN101999116 B CN 101999116B CN 200980112686 A CN200980112686 A CN 200980112686A CN 101999116 B CN101999116 B CN 101999116B
Authority
CN
China
Prior art keywords
pages
page
flash memory
memory device
word line
Prior art date
Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
Expired - Fee Related
Application number
CN200980112686.0A
Other languages
English (en)
Chinese (zh)
Other versions
CN101999116A (zh
Inventor
小H·F·博格
E·F·哈拉特施
M·伊威科维克
V·克拉琦科夫斯基
A·维特雅一夫
C·威廉姆森
J·延
Current Assignee (The listed assignees may be inaccurate. Google has not performed a legal analysis and makes no representation or warranty as to the accuracy of the list.)
Edgar Ray Systems Co Ltd
Original Assignee
Edgar Ray Systems Co Ltd
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed by Edgar Ray Systems Co Ltd filed Critical Edgar Ray Systems Co Ltd
Publication of CN101999116A publication Critical patent/CN101999116A/zh
Application granted granted Critical
Publication of CN101999116B publication Critical patent/CN101999116B/zh
Expired - Fee Related legal-status Critical Current
Anticipated expiration legal-status Critical

Links

Classifications

    • G—PHYSICS
    • G11—INFORMATION STORAGE
    • G11C—STATIC STORES
    • G11C16/00—Erasable programmable read-only memories
    • G11C16/02—Erasable programmable read-only memories electrically programmable
    • G11C16/06—Auxiliary circuits, e.g. for writing into memory
    • G11C16/08—Address circuits; Decoders; Word-line control circuits
    • G—PHYSICS
    • G06—COMPUTING OR CALCULATING; COUNTING
    • G06F—ELECTRIC DIGITAL DATA PROCESSING
    • G06F11/00—Error detection; Error correction; Monitoring
    • G06F11/07—Responding to the occurrence of a fault, e.g. fault tolerance
    • G06F11/08—Error detection or correction by redundancy in data representation, e.g. by using checking codes
    • G06F11/10—Adding special bits or symbols to the coded information, e.g. parity check, casting out 9's or 11's
    • G06F11/1008—Adding special bits or symbols to the coded information, e.g. parity check, casting out 9's or 11's in individual solid state devices
    • G06F11/1072—Adding special bits or symbols to the coded information, e.g. parity check, casting out 9's or 11's in individual solid state devices in multilevel memories
    • G—PHYSICS
    • G11—INFORMATION STORAGE
    • G11C—STATIC STORES
    • G11C16/00—Erasable programmable read-only memories
    • G11C16/02—Erasable programmable read-only memories electrically programmable
    • G11C16/06—Auxiliary circuits, e.g. for writing into memory
    • G—PHYSICS
    • G11—INFORMATION STORAGE
    • G11C—STATIC STORES
    • G11C16/00—Erasable programmable read-only memories
    • G11C16/02—Erasable programmable read-only memories electrically programmable
    • G11C16/06—Auxiliary circuits, e.g. for writing into memory
    • G11C16/10—Programming or data input circuits
    • G—PHYSICS
    • G11—INFORMATION STORAGE
    • G11C—STATIC STORES
    • G11C11/00—Digital stores characterised by the use of particular electric or magnetic storage elements; Storage elements therefor
    • G11C11/56—Digital stores characterised by the use of particular electric or magnetic storage elements; Storage elements therefor using storage elements with more than two stable states represented by steps, e.g. of voltage, current, phase, frequency
    • G11C11/5621—Digital stores characterised by the use of particular electric or magnetic storage elements; Storage elements therefor using storage elements with more than two stable states represented by steps, e.g. of voltage, current, phase, frequency using charge storage in a floating gate
    • G11C11/5628—Programming or writing circuits; Data input circuits
    • G—PHYSICS
    • G11—INFORMATION STORAGE
    • G11C—STATIC STORES
    • G11C11/00—Digital stores characterised by the use of particular electric or magnetic storage elements; Storage elements therefor
    • G11C11/56—Digital stores characterised by the use of particular electric or magnetic storage elements; Storage elements therefor using storage elements with more than two stable states represented by steps, e.g. of voltage, current, phase, frequency
    • G11C11/5621—Digital stores characterised by the use of particular electric or magnetic storage elements; Storage elements therefor using storage elements with more than two stable states represented by steps, e.g. of voltage, current, phase, frequency using charge storage in a floating gate
    • G11C11/5642—Sensing or reading circuits; Data output circuits

Landscapes

  • Engineering & Computer Science (AREA)
  • Theoretical Computer Science (AREA)
  • Quality & Reliability (AREA)
  • Physics & Mathematics (AREA)
  • General Engineering & Computer Science (AREA)
  • General Physics & Mathematics (AREA)
  • Read Only Memory (AREA)
  • Techniques For Improving Reliability Of Storages (AREA)
  • Error Detection And Correction (AREA)
CN200980112686.0A 2008-03-11 2009-03-11 通过交叉页面扇区、多页面编码以及每一页面编码将数据存储在多级单元闪速存储器装置中的方法和设备 Expired - Fee Related CN101999116B (zh)

Applications Claiming Priority (3)

Application Number Priority Date Filing Date Title
US6893408P 2008-03-11 2008-03-11
US61/068,934 2008-03-11
PCT/US2009/036810 WO2009114618A2 (en) 2008-03-11 2009-03-11 Methods and apparatus for storing data in a multi-level cell flash memory device with cross-page sectors, multi-page coding and per-page coding

Publications (2)

Publication Number Publication Date
CN101999116A CN101999116A (zh) 2011-03-30
CN101999116B true CN101999116B (zh) 2015-05-13

Family

ID=40749883

Family Applications (1)

Application Number Title Priority Date Filing Date
CN200980112686.0A Expired - Fee Related CN101999116B (zh) 2008-03-11 2009-03-11 通过交叉页面扇区、多页面编码以及每一页面编码将数据存储在多级单元闪速存储器装置中的方法和设备

Country Status (8)

Country Link
US (4) US8724381B2 (enExample)
EP (4) EP2592553B1 (enExample)
JP (3) JP2011522301A (enExample)
KR (1) KR20100139010A (enExample)
CN (1) CN101999116B (enExample)
IL (1) IL208028A0 (enExample)
TW (1) TWI533304B (enExample)
WO (1) WO2009114618A2 (enExample)

Families Citing this family (72)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
KR20100104623A (ko) * 2009-03-18 2010-09-29 삼성전자주식회사 데이터 처리 시스템 및 그것의 부호율 제어 스킴
KR101616100B1 (ko) * 2009-09-25 2016-04-28 삼성전자주식회사 메모리 시스템 및 그것의 동작 방법
WO2011113034A2 (en) 2010-03-12 2011-09-15 Sandforce, Inc. Ldpc erasure decoding for flash memories
US8429500B2 (en) 2010-03-31 2013-04-23 Lsi Corporation Methods and apparatus for computing a probability value of a received value in communication or storage systems
US8775913B2 (en) 2010-03-31 2014-07-08 Lsi Corporation Methods and apparatus for computing soft data or log likelihood ratios for received values in communication or storage systems
US8504885B2 (en) 2010-03-31 2013-08-06 Lsi Corporation Methods and apparatus for approximating a probability density function or distribution for a received value in communication or storage systems
US8254167B2 (en) 2010-05-17 2012-08-28 Seagate Technologies Llc Joint encoding of logical pages in multi-page memory architecture
US8406051B2 (en) 2010-05-17 2013-03-26 Seagate Technology Llc Iterative demodulation and decoding for multi-page memory architecture
US9251873B1 (en) 2010-05-20 2016-02-02 Kandou Labs, S.A. Methods and systems for pin-efficient memory controller interface using vector signaling codes for chip-to-chip communications
US8417877B2 (en) * 2010-08-31 2013-04-09 Micron Technology, Inc Stripe-based non-volatile multilevel memory operation
KR101686590B1 (ko) * 2010-09-20 2016-12-14 삼성전자주식회사 플래시 메모리 시스템 및 그것의 워드 라인 인터리빙 방법
US9727414B2 (en) 2010-12-01 2017-08-08 Seagate Technology Llc Fractional redundant array of silicon independent elements
EP2646922A4 (en) 2010-12-01 2015-11-25 Lsi Corp DYNAMIC MANAGEMENT OF HIGHER LEVEL REDUNDANCY MODE WITH INDEPENDENT SILICON ELEMENTS
US8719663B2 (en) 2010-12-12 2014-05-06 Lsi Corporation Cross-decoding for non-volatile storage
US9275720B2 (en) * 2010-12-30 2016-03-01 Kandou Labs, S.A. Differential vector storage for dynamic random access memory
EP2666091A2 (en) 2011-01-18 2013-11-27 LSI Corporation Higher-level redundancy information computation
US8825945B2 (en) 2011-01-31 2014-09-02 Marvell World Trade Ltd. Mapping different portions of data to different pages of multi-level non-volatile memory
JP2012174088A (ja) * 2011-02-23 2012-09-10 Hitachi Ltd メモリ制御装置
US10063262B2 (en) 2011-02-28 2018-08-28 Inphi Corporation Non-concatenated FEC codes for ultra-high speed optical transport networks
US9086999B2 (en) * 2011-07-05 2015-07-21 International Business Machines Corporation Data encryption management
US8880977B2 (en) 2011-07-22 2014-11-04 Sandisk Technologies Inc. Systems and methods of storing data
US8995196B2 (en) * 2011-08-15 2015-03-31 Skymedi Corporation Method of sorting a multi-bit per cell non-volatile memory and a multi-mode configuration method
WO2013051062A1 (en) * 2011-10-05 2013-04-11 Hitachi, Ltd. Storage system and storage method
KR20130070927A (ko) * 2011-12-20 2013-06-28 에스케이하이닉스 주식회사 불휘발성 메모리 장치 및 그 동작 방법
US8954825B2 (en) * 2012-03-06 2015-02-10 Micron Technology, Inc. Apparatuses and methods including error correction code organization
US9026887B2 (en) 2012-03-15 2015-05-05 Micron Technology, Inc. Physical page, logical page, and codeword correspondence
US8856611B2 (en) 2012-08-04 2014-10-07 Lsi Corporation Soft-decision compensation for flash channel variation
US9135106B2 (en) * 2012-05-22 2015-09-15 Hgst Technologies Santa Ana, Inc. Read level adjustment using soft information
US8924820B2 (en) * 2012-07-27 2014-12-30 Kabushiki Kaisha Toshiba Memory controller, semiconductor memory system, and memory control method
US8856431B2 (en) 2012-08-02 2014-10-07 Lsi Corporation Mixed granularity higher-level redundancy for non-volatile memory
US9239754B2 (en) 2012-08-04 2016-01-19 Seagate Technology Llc Single read based soft-decision decoding of non-volatile memory
CN102867046B (zh) * 2012-09-06 2016-08-03 记忆科技(深圳)有限公司 基于固态硬盘的数据库优化方法及系统
US8984369B2 (en) * 2012-11-21 2015-03-17 Micron Technology, Inc. Shaping codes for memory
US8656255B1 (en) * 2013-03-15 2014-02-18 Avalanche Technology, Inc. Method for reducing effective raw bit error rate in multi-level cell NAND flash memory
US9047882B2 (en) * 2013-08-30 2015-06-02 Lsi Corporation Systems and methods for multi-level encoding and decoding
KR102204394B1 (ko) 2013-10-14 2021-01-19 삼성전자주식회사 메모리 시스템에서의 코딩 방법 및 디코딩 방법
GB201322075D0 (en) 2013-12-13 2014-01-29 Ibm Device for selecting a level for at least one read voltage
WO2015131203A1 (en) 2014-02-28 2015-09-03 Kandou Lab, S.A. Clock-embedded vector signaling codes
JP6262063B2 (ja) * 2014-03-18 2018-01-17 東芝メモリ株式会社 不揮発性メモリおよび書き込み方法
KR102247087B1 (ko) * 2014-07-08 2021-05-03 삼성전자주식회사 스토리지 장치 및 스토리지 장치의 동작 방법
TWI550615B (zh) * 2014-08-28 2016-09-21 群聯電子股份有限公司 資料存取方法、記憶體儲存裝置及記憶體控制電路單元
CN105468292B (zh) * 2014-09-05 2019-04-23 群联电子股份有限公司 数据存取方法、存储器储存装置及存储器控制电路单元
US9563373B2 (en) 2014-10-21 2017-02-07 International Business Machines Corporation Detecting error count deviations for non-volatile memory blocks for advanced non-volatile memory block management
US10365859B2 (en) 2014-10-21 2019-07-30 International Business Machines Corporation Storage array management employing a merged background management process
US9536600B2 (en) 2014-10-22 2017-01-03 International Business Machines Corporation Simultaneous multi-page commands for non-volatile memories
US9830087B2 (en) * 2014-11-13 2017-11-28 Micron Technology, Inc. Memory wear leveling
US10339048B2 (en) 2014-12-23 2019-07-02 International Business Machines Corporation Endurance enhancement scheme using memory re-evaluation
US9990279B2 (en) 2014-12-23 2018-06-05 International Business Machines Corporation Page-level health equalization
US9613664B2 (en) * 2015-01-20 2017-04-04 Samsung Electronics Co., Ltd. Method of operating memory device including multi-level memory cells
CN104810056A (zh) * 2015-03-05 2015-07-29 华南理工大学 一种基于自适应ldpc码的nand闪存差错控制器
US9727416B2 (en) * 2015-07-01 2017-08-08 Xilinx, Inc. Variable code rate solid-state drive
KR20170004693A (ko) * 2015-07-03 2017-01-11 에스케이하이닉스 주식회사 메모리 장치의 컨트롤러 및 그 동작 방법
US9577854B1 (en) 2015-08-20 2017-02-21 Micron Technology, Inc. Apparatuses and methods for asymmetric bi-directional signaling incorporating multi-level encoding
US10347343B2 (en) 2015-10-30 2019-07-09 Seagate Technology Llc Adaptive read threshold voltage tracking with separate characterization on each side of voltage distribution about distribution mean
US10192614B2 (en) 2015-10-30 2019-01-29 Seagate Technology Llc Adaptive read threshold voltage tracking with gap estimation between default read threshold voltages
US9940034B2 (en) 2016-01-25 2018-04-10 International Business Machines Corporation Reducing read access latency by straddling pages across non-volatile memory channels
US10198313B2 (en) * 2016-03-11 2019-02-05 Western Digital Technologies, Inc. Redundancy of error correction encoded data in a storage system
JP6538741B2 (ja) * 2017-03-09 2019-07-03 株式会社東芝 管理装置、情報処理装置および管理方法
US10164817B2 (en) 2017-03-21 2018-12-25 Micron Technology, Inc. Methods and apparatuses for signal translation in a buffered memory
TWI634556B (zh) * 2017-10-12 2018-09-01 群聯電子股份有限公司 解碼方法、記憶體儲存裝置及記憶體控制電路單元
CN109697134B (zh) * 2017-10-20 2022-10-21 群联电子股份有限公司 解码方法、存储器存储装置及存储器控制电路单元
US10558522B2 (en) 2017-10-20 2020-02-11 Western Digital Technologies, Inc. Dynamic multi-stage decoding
US10467177B2 (en) 2017-12-08 2019-11-05 Kandou Labs, S.A. High speed memory interface
US10460814B2 (en) * 2017-12-12 2019-10-29 Western Digital Technologies, Inc. Non-volatile memory and method for power efficient read or verify using lockout control
US10637511B2 (en) 2017-12-18 2020-04-28 Western Digital Technologies, Inc Dynamic multi-stage decoding
CN108564983A (zh) * 2018-04-10 2018-09-21 南京扬贺扬微电子科技有限公司 一种用于nand flash的ldpc测试平台
CN111176582A (zh) * 2019-12-31 2020-05-19 北京百度网讯科技有限公司 矩阵存储方法、矩阵访问方法、装置和电子设备
US11424766B1 (en) * 2020-01-31 2022-08-23 Marvell Asia Pte Ltd. Method and device for energy-efficient decoders
DE112022000073T5 (de) * 2021-07-04 2023-04-20 Maxlinear, Inc. Pmd-zu-tc-mac-schnittstelle mit 2-stufigem fec-schutz
US12411634B2 (en) 2022-03-03 2025-09-09 Samsung Electronics Co., Ltd. Parallel processing in computational storage
US12218683B1 (en) 2023-08-10 2025-02-04 SK Hynix Inc. Log likelihood ratios adjustment based on error tracker
US20250370638A1 (en) * 2024-05-28 2025-12-04 Samsung Electronics Co., Ltd. Dynamic online code-rate allocation according to wordline noise for adapative ecc in ssd/ufs

Citations (4)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
CN1832039A (zh) * 2005-03-10 2006-09-13 海力士半导体有限公司 多面型闪存以及控制其程序和读取操作的方法
US20070089034A1 (en) * 2005-10-13 2007-04-19 M-Systems Flash Disk Pioneers, Ltd. Method of error correction in MBC flash memory
CN101030167A (zh) * 2007-01-17 2007-09-05 忆正存储技术(深圳)有限公司 闪存的区块管理方法
US20070300130A1 (en) * 2006-05-17 2007-12-27 Sandisk Corporation Method of Error Correction Coding for Multiple-Sector Pages in Flash Memory Devices

Family Cites Families (36)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
US6335878B1 (en) * 1998-07-28 2002-01-01 Hitachi, Ltd. Non-volatile multi-level semiconductor flash memory device and method of driving same
JPH11283396A (ja) 1998-03-27 1999-10-15 Sony Corp メモリ装置
JPH11283398A (ja) 1998-03-30 1999-10-15 Matsushita Electric Ind Co Ltd 半導体回路装置
JP3308915B2 (ja) * 1998-11-11 2002-07-29 エヌイーシーマイクロシステム株式会社 不良救済用メモリセル及びそれを用いた記憶装置
US6134141A (en) 1998-12-31 2000-10-17 Sandisk Corporation Dynamic write process for high bandwidth multi-bit-per-cell and analog/multi-level non-volatile memories
US6684289B1 (en) * 2000-11-22 2004-01-27 Sandisk Corporation Techniques for operating non-volatile memory systems with data sectors having different sizes than the sizes of the pages and/or blocks of the memory
US6522580B2 (en) 2001-06-27 2003-02-18 Sandisk Corporation Operating techniques for reducing effects of coupling between storage elements of a non-volatile memory operated in multiple data states
US6866909B2 (en) 2002-09-04 2005-03-15 General Electric Company Limited play data storage media and method for limiting access to data thereon
US6781877B2 (en) * 2002-09-06 2004-08-24 Sandisk Corporation Techniques for reducing effects of coupling between storage elements of adjacent rows of memory cells
US7073100B2 (en) 2002-11-11 2006-07-04 International Business Machines Corporation Method for testing embedded DRAM arrays
JP2005078721A (ja) * 2003-09-01 2005-03-24 Nippon Telegr & Teleph Corp <Ntt> 誤り訂正方法およびメモリ回路
EP1776699A1 (en) * 2004-08-02 2007-04-25 Koninklijke Philips Electronics N.V. Data storage and replay apparatus
US7386655B2 (en) 2004-12-16 2008-06-10 Sandisk Corporation Non-volatile memory and method with improved indexing for scratch pad and update blocks
US7315916B2 (en) 2004-12-16 2008-01-01 Sandisk Corporation Scratch pad block
US7349264B2 (en) * 2005-12-28 2008-03-25 Sandisk Corporation Alternate sensing techniques for non-volatile memories
US7388781B2 (en) 2006-03-06 2008-06-17 Sandisk Il Ltd. Multi-bit-per-cell flash memory device with non-bijective mapping
TWM304711U (en) * 2006-04-26 2007-01-11 Genesys Logic Inc Flash memory data access reliability enhancing device
CN103280239B (zh) * 2006-05-12 2016-04-06 苹果公司 存储设备中的失真估计和消除
US8239735B2 (en) * 2006-05-12 2012-08-07 Apple Inc. Memory Device with adaptive capacity
JP2007334413A (ja) * 2006-06-12 2007-12-27 Sony Corp 記憶装置
US7304893B1 (en) * 2006-06-30 2007-12-04 Sandisk Corporation Method of partial page fail bit detection in flash memory devices
US7355892B2 (en) * 2006-06-30 2008-04-08 Sandisk Corporation Partial page fail bit detection in flash memory devices
KR100758301B1 (ko) * 2006-08-04 2007-09-12 삼성전자주식회사 메모리 카드 및 그것의 데이터 저장 방법
US7460398B1 (en) * 2007-06-19 2008-12-02 Micron Technology, Inc. Programming a memory with varying bits per cell
US8259497B2 (en) 2007-08-06 2012-09-04 Apple Inc. Programming schemes for multi-level analog memory cells
US8335977B2 (en) * 2007-12-05 2012-12-18 Densbits Technologies Ltd. Flash memory apparatus and methods using a plurality of decoding stages including optional use of concatenated BCH codes and/or designation of “first below” cells
US8179719B1 (en) * 2008-03-10 2012-05-15 Marvell International Ltd. Systems and methods for improving error distributions in multi-level cell memory systems
US8054684B2 (en) * 2009-12-18 2011-11-08 Sandisk Technologies Inc. Non-volatile memory and method with atomic program sequence and write abort detection
US8369156B2 (en) * 2010-07-13 2013-02-05 Sandisk Technologies Inc. Fast random access to non-volatile storage
US8472280B2 (en) * 2010-12-21 2013-06-25 Sandisk Technologies Inc. Alternate page by page programming scheme
US8750042B2 (en) * 2011-07-28 2014-06-10 Sandisk Technologies Inc. Combined simultaneous sensing of multiple wordlines in a post-write read (PWR) and detection of NAND failures
US9171627B2 (en) * 2012-04-11 2015-10-27 Aplus Flash Technology, Inc. Non-boosting program inhibit scheme in NAND design
US8793556B1 (en) * 2012-05-22 2014-07-29 Pmc-Sierra, Inc. Systems and methods for reclaiming flash blocks of a flash drive
KR102048765B1 (ko) * 2013-01-15 2020-01-22 삼성전자주식회사 메모리 시스템의 동작 방법 및 메모리 시스템
US9013920B2 (en) * 2013-04-03 2015-04-21 Western Digital Technologies, Inc. Systems and methods of write precompensation to extend life of a solid-state memory
US8996838B1 (en) * 2014-05-08 2015-03-31 Sandisk Technologies Inc. Structure variation detection for a memory having a three-dimensional memory configuration

Patent Citations (4)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
CN1832039A (zh) * 2005-03-10 2006-09-13 海力士半导体有限公司 多面型闪存以及控制其程序和读取操作的方法
US20070089034A1 (en) * 2005-10-13 2007-04-19 M-Systems Flash Disk Pioneers, Ltd. Method of error correction in MBC flash memory
US20070300130A1 (en) * 2006-05-17 2007-12-27 Sandisk Corporation Method of Error Correction Coding for Multiple-Sector Pages in Flash Memory Devices
CN101030167A (zh) * 2007-01-17 2007-09-05 忆正存储技术(深圳)有限公司 闪存的区块管理方法

Also Published As

Publication number Publication date
EP2592551A3 (en) 2013-08-28
EP2592552A2 (en) 2013-05-15
EP2592551A2 (en) 2013-05-15
TWI533304B (zh) 2016-05-11
EP2592552B1 (en) 2015-11-25
US20140126289A1 (en) 2014-05-08
TW200951961A (en) 2009-12-16
EP2592553B1 (en) 2015-11-18
US20110090734A1 (en) 2011-04-21
US20140126288A1 (en) 2014-05-08
JP2014135097A (ja) 2014-07-24
JP5944941B2 (ja) 2016-07-05
WO2009114618A2 (en) 2009-09-17
US9135999B2 (en) 2015-09-15
EP2592553A2 (en) 2013-05-15
JP2011522301A (ja) 2011-07-28
CN101999116A (zh) 2011-03-30
JP2016042380A (ja) 2016-03-31
EP2266036A2 (en) 2010-12-29
US20140126287A1 (en) 2014-05-08
EP2592552A3 (en) 2013-08-28
EP2592553A3 (en) 2013-08-28
EP2266036B1 (en) 2015-11-25
US8724381B2 (en) 2014-05-13
US9058879B2 (en) 2015-06-16
KR20100139010A (ko) 2010-12-31
WO2009114618A3 (en) 2009-11-26
EP2266036B9 (en) 2016-05-18
US9007828B2 (en) 2015-04-14
IL208028A0 (en) 2010-12-30

Similar Documents

Publication Publication Date Title
CN101999116B (zh) 通过交叉页面扇区、多页面编码以及每一页面编码将数据存储在多级单元闪速存储器装置中的方法和设备
US10896123B2 (en) Enhancing the effectiveness of read scan performance and reliability for non-volatile memory
TWI501238B (zh) 藉由調變編碼用於單元間干擾抑制的方法及裝置
CN104205225B (zh) 使用多次读取和/或仓来生成软读取值
US9106264B2 (en) Encoding and decoding in flash memories using convolutional-type low-density parity check codes
US9270296B1 (en) Method and system for soft decoding through single read
WO2008078866A1 (en) Multi-level cell memory devices and methods of storing data in and reading data from the memory devices
US9559725B1 (en) Multi-strength reed-solomon outer code protection
CN118511223A (zh) 3d nand存储器的最佳读取参考电压搜索
US20150317203A1 (en) Code-Based Read Control for Data Storage Devices
JP2010165426A (ja) メモリコントローラおよび半導体メモリ装置
CN112562772B (zh) 自适应低密度奇偶校验硬解码器
CN116954984A (zh) Crc终止时的准确ber报告
KR101419335B1 (ko) 멀티 레벨 셀 플래시 메모리의 페이지 단위 클러스터링 장치 및 방법
US20040141389A1 (en) Solid state storage device and data storage method
US11145372B2 (en) Decoding method, memory controlling circuit unit, and memory storage device
CN121050930A (zh) 联合ldpc和raid解码方案中的优化解码调度
CN119479757A (zh) 解码方法与存储装置

Legal Events

Date Code Title Description
C06 Publication
PB01 Publication
C10 Entry into substantive examination
SE01 Entry into force of request for substantive examination
C53 Correction of patent of invention or patent application
CB02 Change of applicant information

Address after: Delaware

Applicant after: EDGAR RAY SYSTEMS CO., LTD.

Address before: American Pennsylvania

Applicant before: Egree System Co., Ltd.

COR Change of bibliographic data

Free format text: CORRECT: APPLICANT; FROM: EGREE SYSTEM CO. LTD. TO: AGERE SYSTEMS GUARDIAN CORP.

C14 Grant of patent or utility model
GR01 Patent grant
CF01 Termination of patent right due to non-payment of annual fee

Granted publication date: 20150513

Termination date: 20210311

CF01 Termination of patent right due to non-payment of annual fee