CN101996910A - Method for detecting testing structure of semiconductor device - Google Patents
Method for detecting testing structure of semiconductor device Download PDFInfo
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- CN101996910A CN101996910A CN2009101945750A CN200910194575A CN101996910A CN 101996910 A CN101996910 A CN 101996910A CN 2009101945750 A CN2009101945750 A CN 2009101945750A CN 200910194575 A CN200910194575 A CN 200910194575A CN 101996910 A CN101996910 A CN 101996910A
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Abstract
The invention discloses a method for detecting a testing structure of a semiconductor device, and the method is suitable for the semiconductor devices with a locating slot with orientation (100); the method comprises: a testing structure is grown on the semiconductor device with the locating slot with orientation (100), the grown testing structure and the wiring direction of the semiconductor device form an included angle of 45 degrees; the semiconductor device is split mechanically to obtain splitting surfaces; the splitting surface is detected by adopting SEM, so as to obtain detecting data. The method provided by the invention can accurately detect the testing structure of the semiconductor device with the locating slot with orientation (100).
Description
Technical field
The present invention relates to semiconductor fabrication, particularly a kind of method that detects the test structure of semiconductor device.
Background technology
In the processing procedure of semiconductor device, usually need on semiconductor device, make test structure, the wiring direction of this test structure is identical with wiring direction on this semiconductor device, so that electrical characteristics, critical size (CD) and the thickness etc. of semiconductor device are tested.When the test structure of semiconductor device is detected, at first, semiconductor device is carried out sliver, just, obtain splitting surface along the wiring direction of the semiconductor device device semiconductor device that dissociates; Adopt scanning electron microscopy (SEM) to detect to splitting surface then, obtain test result.
When semiconductor device is carried out sliver, adopt mechanical system to damage the edge of the wiring direction on this semiconductor device after, obtain splitting surface along the damage direction semiconductor device that dissociates.
At present, usually adopting crystrallographic plane is the semiconductor device of Miller symbol (100), being oriented to of location notch＜110〉direction, the crystal orientation of Miller symbolic representation semiconductor device.When adopting mechanical system to carry out sliver to this semiconductor device, then splitting surface is perpendicular or parallel test structure in semiconductor device, just perpendicular to or be parallel to location notch orientation＜110.But, for crystrallographic plane is the semiconductor device of Miller symbol (100), except being oriented to of location notch＜110〉direction, the semiconductor device that also has being oriented to of location notch＜100〉direction, carry out sliver if adopt same mechanical system, splitting surface and the location notch that then obtains be oriented to＜test structure of 100〉direction semiconductor device (angle between the location notch orientation of the semiconductor device of these two different location notchs orientations is 45 degree) in angle of 45 degrees, because this splitting surface is failed the reaction test structure, so when adopting SEM to detect to this splitting surface, the test result that obtains lost efficacy.
Therefore, at present to location notch be oriented to＜100〉direction semiconductor device detected two kinds of methods, below introduce respectively:
First kind of mode, to location notch be oriented to＜the test structure sliver of 100〉direction semiconductor device after, carry out the manual sample grinding mode, because this mode need be carried out manual sample grinding, so be not suitable for the little test structure of sample area, be applicable to that generally test structure multiply by the structure of 20 nanometers more than or equal to 20 nanometers.Concrete grammar is:
Behind the test structure sliver, carry out manual sample grinding, obtain print, print is observed under transmission electron microscope (TEM).Wherein, when manual sample grinding, can adjust print, make the test structure of its perpendicular or parallel semiconductor device.
Adopt this method to detect, big to the influence of sample material, the insulating barrier that can cause having advanced low-k materials in the print produces distortion.Owing to need manual sample grinding, so the test structure area that detects is limited, multiply by the test structure of 20 nanometers less than 20 nanometers, can't adopt this method to detect and finish.
Second method, to location notch be oriented to＜the test structure sliver of 100〉direction semiconductor device after, carry out the FIB mode
This mode adopts the FIB perparation of specimen, is applicable to the test structure that sample area is little, is applicable to that generally sample multiply by the test structure of 20 nanometers less than 20 nanometers.Concrete grammar is:
Adopt ion beam that the sliver that is placed on the test structure on the FIB board is cut, obtain sample after, on TEM, observe.Wherein, can adjust print during cutting, make the test structure of its perpendicular or parallel semiconductor device.
This mode is because the energy of ion beam, and the phenomenon of impaired distortion takes place in the process of cutting the test structure that need observe the test structure top, is difficult to carry out CD or the isostructural test of thickness.
No matter be any mode in the above-mentioned dual mode, all can cause the inaccurate problem of test.Particularly be oriented to＜during the photoresistance test structure of 100〉direction semiconductor device,, can lose efficacy so detect because photoresistance test structure quality is softer at the detection and location groove.
To sum up, at present exactly the detection and location groove be oriented to＜test structure of 100〉direction semiconductor device.
Summary of the invention
In view of this, the invention provides a kind of method that detects the test structure of semiconductor device, this method detection and location groove exactly is oriented to＜test structure of 100〉direction semiconductor device.
For achieving the above object, the technical scheme of the embodiment of the invention specifically is achieved in that
A kind of method that detects the test structure of semiconductor device is applicable to that location notch is oriented to＜100〉direction semiconductor device, comprising:
Be oriented at location notch＜test structure of growing on 100〉direction the semiconductor device, the angle of the test structure of growth and the wiring direction of this semiconductor device becomes 45 degree;
Adopt mechanical system to carry out sliver to this semiconductor device, obtain splitting surface;
Adopt SEM to detect to splitting surface, obtain detecting data.
The angle of the test structure of described growth and the wiring direction of this semiconductor device becomes 45 degree to be:
Along turn clockwise 45 degree or be rotated counterclockwise 45 degree, the growth test structure of the wiring direction of this semiconductor device.
As seen from the above technical solution, the present invention is oriented at location notch＜100〉direction semiconductor device on during the growth test structure, make test structure and this semiconductor device wire laying mode in angle of 45 degrees, thereby make when this semiconductor device carried out sliver mechanically that splitting surface is perpendicular or parallel test structure in semiconductor device.Like this, splitting surface just can be complete the test structure of this semiconductor device of reaction, thereby make to the test of splitting surface just can the accurate response test structure characteristic, and do not need splitting surface is handled again, directly adopting SEM to detect gets final product, therefore, method provided by the invention exactly the detection and location groove be oriented to＜test structure of 100〉direction semiconductor device.
Description of drawings
Fig. 1 is oriented to＜schematic flow sheet of the test structure of 100〉direction semiconductor device for the groove of detection and location exactly that the present invention adopts;
Fig. 2 becomes the structural representation of 45 degree with test structure for the sliver direction;
Fig. 3 is the sliver direction structural representation vertical with test structure.
Embodiment
For making purpose of the present invention, technical scheme and advantage clearer, below with reference to the accompanying drawing embodiment that develops simultaneously, the present invention is described in further detail.
Because when the existing mechanical mode is carried out sliver to semiconductor device, just be suitable for location notch to be oriented to＜100〉direction semiconductor device, when promptly adopting mechanical system to carry out sliver to this semiconductor device, splitting surface is perpendicular or parallel test structure in this semiconductor device.And adopt this mechanical system to location notch be oriented to＜when 100〉direction semiconductor device carries out sliver, then can make the test structure of splitting surface and this semiconductor device become 45 degree, make the pattern that splitting surface can't the actual response test structure.
Therefore, in background technology, adopted FIB or manual sample grinding mode that splitting surface is handled, make the pattern that it can the actual response test structure still, to have problems like this: 1) these two kinds of methods all can make the splitting surface damage, are unfavorable for follow-up detection; 2) this dual mode all is that to adopt manual type that splitting surface is adjusted into parallel with test structure or vertical, and this deviation can occur, can't make the pattern that splitting surface can't the actual response test structure; 3) this dual mode can't be applicable to that all the test structure that contains photoresistance detects.
Therefore, Fig. 1 is oriented to＜schematic flow sheet of the test structure of 100〉direction semiconductor device for the groove of detection and location exactly that the present invention adopts, and its concrete steps are:
Step 101, be oriented at location notch＜test structure of growing on 100〉direction the semiconductor device, the angle of the test structure of growth and the wiring direction of this semiconductor device becomes 45 degree;
In this step, the angle of the test structure of growth and the wiring direction of this semiconductor device becomes 45 degree to be: along turn clockwise 45 degree or be rotated counterclockwise 45 degree, the growth test structure of the wiring direction of this semiconductor device;
In this step, the splitting surface that obtains perpendicular to or be parallel to test structure, the pattern of actual response test structure;
Except the effective structure of reality, a plurality of test structures that also need to grow are used for carrying out the processing procedure monitoring on semiconductor device.In the background technology in growth during test structure, all be parallel or vertical with the wiring direction of semiconductor device, carry out sliver if at this moment adopt the existing mechanical mode, be oriented to＜100〉direction semiconductor device for location notch, its sliver direction and test structure in angle of 45 degrees, as shown in Figure 2.Therefore, the present invention has adjusted the angle of growth test structure, make and the wiring direction of semiconductor device in angle of 45 degrees, like this, when carrying out sliver, its sliver direction and test structure are perpendicular or parallel, as shown in Figure 3 (shown in Figure 3 is vertical).Like this, directly adopt artificial or accurate splitting machine to obtain splitting surface, just can adopt SEM to observe the characteristics such as CD, electrical characteristics or thickness of test structure accurately along sliver direction cutting.
Further, owing to need not carry out manual sample grinding or FIB mode as background technology to splitting surface, thus can not cause damage to splitting surface, and directly detect, so be applicable to test photoresistance test structure.
To sum up, when on semiconductor device, generating test structure, need to consider the crystal orientation of semiconductor device, have angle between feasible test structure that is generated and the semiconductor device, thereby assurance sliver direction and test structure direction are perpendicular or parallel.
More than lift preferred embodiment; the purpose, technical solutions and advantages of the present invention are further described; institute is understood that; the above only is preferred embodiment of the present invention; not in order to restriction the present invention; within the spirit and principles in the present invention all, any modification of being done, be equal to and replace and improvement etc., all should be included within protection scope of the present invention.
Claims (2)
1. method that detects the test structure of semiconductor device is applicable to that location notch is oriented to＜100〉direction semiconductor device, comprising:
Be oriented at location notch＜test structure of growing on 100〉direction the semiconductor device, the angle of the test structure of growth and the wiring direction of this semiconductor device becomes 45 degree;
Adopt mechanical system to carry out sliver to this semiconductor device, obtain splitting surface;
Adopt SEM to detect to splitting surface, obtain detecting data.
2. the method for claim 1 is characterized in that, the angle of the test structure of described growth and the wiring direction of this semiconductor device becomes 45 degree to be:
Along turn clockwise 45 degree or be rotated counterclockwise 45 degree, the growth test structure of the wiring direction of this semiconductor device.
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| Application Number | Priority Date | Filing Date | Title |
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| CN2009101945750A CN101996910B (en) | 2009-08-25 | 2009-08-25 | Method for detecting testing structure of semiconductor device |
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| CN2009101945750A CN101996910B (en) | 2009-08-25 | 2009-08-25 | Method for detecting testing structure of semiconductor device |
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| CN101996910A true CN101996910A (en) | 2011-03-30 |
| CN101996910B CN101996910B (en) | 2012-05-30 |
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| CN102867760A (en) * | 2011-07-08 | 2013-01-09 | 索尼公司 | Test circuit, integrated circuit, and test circuit layout method |
| CN103871917A (en) * | 2012-12-07 | 2014-06-18 | 中芯国际集成电路制造(上海)有限公司 | Method for preparing semiconductor failure analysis sample |
| CN103900868A (en) * | 2014-02-21 | 2014-07-02 | 上海华力微电子有限公司 | Preparation method of plane transmission electron microscope (TEM) sample |
| CN105674921A (en) * | 2016-01-27 | 2016-06-15 | 武汉新芯集成电路制造有限公司 | Channel hole measurement method |
| CN109425315A (en) * | 2017-08-31 | 2019-03-05 | 长鑫存储技术有限公司 | The test loaded tool and test method of semiconductor structure |
| CN111521464A (en) * | 2020-05-08 | 2020-08-11 | 上海华力集成电路制造有限公司 | Preparation method of inspection sample of semiconductor device |
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| JP3882588B2 (en) * | 2001-11-12 | 2007-02-21 | 株式会社ニコン | Mark position detection device |
| CN1249801C (en) * | 2002-12-12 | 2006-04-05 | 中芯国际集成电路制造(上海)有限公司 | Method of measuring zero-inclination angle of water |
| CN100360998C (en) * | 2004-11-03 | 2008-01-09 | 均豪精密工业股份有限公司 | Defect detection apparatus and method after panel breaking |
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Cited By (9)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| CN102867760A (en) * | 2011-07-08 | 2013-01-09 | 索尼公司 | Test circuit, integrated circuit, and test circuit layout method |
| CN103871917A (en) * | 2012-12-07 | 2014-06-18 | 中芯国际集成电路制造(上海)有限公司 | Method for preparing semiconductor failure analysis sample |
| CN103871917B (en) * | 2012-12-07 | 2016-12-28 | 中芯国际集成电路制造(上海)有限公司 | The method preparing semiconductor failure analysis sample |
| CN103900868A (en) * | 2014-02-21 | 2014-07-02 | 上海华力微电子有限公司 | Preparation method of plane transmission electron microscope (TEM) sample |
| CN105674921A (en) * | 2016-01-27 | 2016-06-15 | 武汉新芯集成电路制造有限公司 | Channel hole measurement method |
| CN105674921B (en) * | 2016-01-27 | 2019-04-30 | 武汉新芯集成电路制造有限公司 | A kind of measurement method in channel hole |
| CN109425315A (en) * | 2017-08-31 | 2019-03-05 | 长鑫存储技术有限公司 | The test loaded tool and test method of semiconductor structure |
| CN109425315B (en) * | 2017-08-31 | 2021-01-15 | 长鑫存储技术有限公司 | Test carrier and test method of semiconductor structure |
| CN111521464A (en) * | 2020-05-08 | 2020-08-11 | 上海华力集成电路制造有限公司 | Preparation method of inspection sample of semiconductor device |
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| CN101996910B (en) | 2012-05-30 |
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