CN101950781A - Silicon chip carrier and making process for selective emitter solar cell - Google Patents
Silicon chip carrier and making process for selective emitter solar cell Download PDFInfo
- Publication number
- CN101950781A CN101950781A CN2010102771180A CN201010277118A CN101950781A CN 101950781 A CN101950781 A CN 101950781A CN 2010102771180 A CN2010102771180 A CN 2010102771180A CN 201010277118 A CN201010277118 A CN 201010277118A CN 101950781 A CN101950781 A CN 101950781A
- Authority
- CN
- China
- Prior art keywords
- silicon chip
- electrode
- diffusion
- mask
- selective emitter
- Prior art date
- Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
- Pending
Links
Images
Classifications
-
- Y—GENERAL TAGGING OF NEW TECHNOLOGICAL DEVELOPMENTS; GENERAL TAGGING OF CROSS-SECTIONAL TECHNOLOGIES SPANNING OVER SEVERAL SECTIONS OF THE IPC; TECHNICAL SUBJECTS COVERED BY FORMER USPC CROSS-REFERENCE ART COLLECTIONS [XRACs] AND DIGESTS
- Y02—TECHNOLOGIES OR APPLICATIONS FOR MITIGATION OR ADAPTATION AGAINST CLIMATE CHANGE
- Y02P—CLIMATE CHANGE MITIGATION TECHNOLOGIES IN THE PRODUCTION OR PROCESSING OF GOODS
- Y02P70/00—Climate change mitigation technologies in the production process for final industrial or consumer products
- Y02P70/50—Manufacturing or production processes characterised by the final manufactured product
Abstract
The invention provides a process and equipment for realizing selective masking, which are characterized in that: a silicon chip carrier is designed for a set of vapor deposition equipment or a diffusion system; a structuralized solar cell is arranged on the carrier; the substructure of the carrier is designed to be grid-like and just cover the front electrode area or non-electrode light-receiving area of the silicon chip; the entire carrier is transmitted to a vapor deposition system or oxidation system or diffusion system; after the process is carried out, a deposited film or oxide film or diffusion layer is not formed in the area, which is covered by the substructure in the carrier, of the front of the silicon chip, but in the uncovered area; and thus, a selective mask layer or diffusion layer is formed. The invention has the advantages of providing the masking process and equipment, which can realize the large-scale production method of SE batteries simply, greatly shortening a laboratory SE battery preparation process flow, and reducing cost.
Description
Technical field
The present invention relates to a kind of technology that realizes mask equipment and this equipment of use of the selective emitter solar battery that large-scale industrialization is produced.
Background technology
The technological process of present conventional silicon solar cell production is: surperficial prerinse, making herbs into wool are removed affected layer and are formed antireflecting suede structure, chemical cleaning and dry; Method by the liquid source diffusion forms even doped P N knot at the silicon chip surface each point; Remove the periphery P N knot and the surperficial phosphorosilicate glass that form in the diffusion process; Surface deposition passivation and antireflective coating; Make backplate, back surface field and the front electrode of solar cell; Sintering forms ohmic contact, thereby finishes the manufacturing process of entire cell sheet.
In the manufacturing process of silicon solar cell, PN junction is as the making step of a core, and the photoelectric conversion efficiency of battery is had decisive influence.Need change the structure of at present the silicon chip surface each point being carried out uniformity doped P N knot in order to obtain higher conversion efficiency, need realize the localization diffusion, promptly make optionally emitter, claim SE battery again silicon chip surface.
It is to form highly doped dark interface at front electrode Gate line lower area that the making of SE battery requires, thereby can form better ohmic contact; In other zones, also be that active light area forms low-doped shallow junction region, thereby reduced the compound of few son, can obtain higher short circuit current.So two aspects, the SE battery can obtain higher conversion efficiency.
Being lifted in the traditional structure battery of the realization of ohmic contact and electric current is a pair of contradiction.Therefore the making one that how to realize the SE battery in large-scale production is to being the focus of discussion and the difficult point of making.The manufacture method of at present existing multiple SE battery, such as photoetching, lbg etc., but the most cost of these technologies is too high, complex process.CSUN-US Co., Ltd in Nanjing has announced a kind of method of small-scale production SE battery in addition, adopting this method to produce the SE battery cost reduces greatly, but this method has adopted multiple high temp heat treatment process such as diffusion and oxidation, processing step is more complicated still, and all bigger to the internal injury and the energy consumption of silicon chip.
Summary of the invention
A kind of masking process and the equipment that can simply realize the large scale production method of selective emitter battery overcomes the defective that prior art exists, and minimizing SE battery preparation technique flow process also reduces production costs.
In order to achieve the above object, a technical scheme of the present invention has provided a kind of carrier that carries silicon chip, it is characterized in that: comprise the minor structure that at least one is arranged in order, each minor structure periphery is the silicon chip bearing frame of silicon chip shape size, and the inside pattern of each minor structure is grid line shape and consistent or anti-consistent with the electrode printed patterns in silk screen front.
Another technical scheme of the present invention has provided a kind of masking process of selective emitter solar battery, it is characterized in that: step is:
The surface-texturing of step 1, silicon chip is handled: monocrystalline silicon after prerinse is finished or polysilicon chip are put into chemical corrosion liquid and are carried out the texturing processing and remove affected layer;
Step 3, be deposit or oxidation technology if step 2 carries out, the silicon chip that then will make mask is put into high temperature dispersing furnace and is carried out the liquid source diffusion, be subjected to light to have the zone of mask to form light dope at silicon chip, in the no masked areas formation heavy doping of silicon chip electrode to be printed; If what step 2 was carried out is diffusion technology, after then the minor structure of mask being removed, the front surface of silicon chip is carried out the light diffusing, doping of low concentration;
Step 4, the silicon chip after the selectivity diffusion is carried out etching remove periphery P N knot, and clean and remove surperficial phosphorosilicate glass;
Step 5, with positive one deck passivation and the antireflection film made of dried silicon chip;
Step 6, the method by silk screen printing are made back electrode, back of the body electric field and positive electrode, and carry out sintering, finish.
The invention has the beneficial effects as follows: adopt silicon nitride or silica or silicon oxynitride to do mask, anti-highly basic and general acid solution, its chemical stability is good, and can be easy to come along with phosphorosilicate glass in the road, back cleans and remove.And this programme adopts the single step diffusion method to make the processing step relative simple possible that becomes, and has saved process time and cost.This programme is equally applicable to have the crystal-silicon solar cell of N type substrate.Another scheme of invention adopts the carrier minor structure directly to do the mask diffusion, do not need to get involved other new technology and media, once just can form heavy doping, and then carry out light dope one time, just finished selective diffusion process, step is also very simple, has saved process time and cost equally.
Description of drawings
Fig. 1 is a kind of carrier schematic diagram that carries silicon chip provided by the invention;
Fig. 2 is the minor structure schematic diagram;
Fig. 3 is the minor structure schematic diagram of another kind of form.
Embodiment
Embodiment 1
As shown in Figure 1, be a kind of carrier that carries silicon chip provided by the invention, carrier inside can be made up of many minor structures as shown in Figure 1.
As shown in Figures 2 and 3, each minor structure periphery is the silicon chip bearing frame 1 of silicon chip shape size, and its indoor design pattern 2 is with electrode printed patterns unanimity (as shown in Figure 2) or anti-consistent (as shown in Figure 3) in silk screen front.Minor structure can make the accurately fine registration of location to guarantee that subsequent electrode is printed of silicon chip.Install whereby monocrystalline after the texturing or polysilicon chip are placed each minor structure, the grid line shape design of minor structure is just in time covered the front electrode zone or the non-electrode light area of silicon chip, whole carrier is entered this vapor deposition or diffusible oxydation system by transmission, behind the operation process, the zone that the silicon chip front is covered by minor structure in the carrier does not form deposited film or oxide-film or diffusion layer, and do not having concealed zone to form deposited film or oxide-film or diffusion layer, so just formed optionally mask layer or diffusion layer.
In the masking process of the selective emitter solar battery that present embodiment provides, used the carrier of carrying silicon chip as shown in Figures 1 and 2, minor structure indoor design pattern 2 is with the electrode printed patterns unanimity in silk screen front, silicon chip after the texturing is placed each minor structure by last chip system, and transmission enters a kind of vapor deposition apparatus.The design of the grid line shape of minor structure is just in time covered the zone of the positive electrode to be printed of silicon chip.After carrying out depositing operation, the non-electrode light area in silicon chip front forms one deck barrier film, and do not form barrier film at electrode zone, suitably control the thickness and the compactness of this layer barrier film, make it have certain diffusion permeability, once finish by just making the weight doping under silicon chip light area and the electrode Gate line after the diffusion technology.Its concrete steps are as follows:
A. surface-texturing
Silicon chip to supplied materials carries out prerinse, and ultrasonic wave is adopted in prerinse, and adds certain washing detergent.Afterwards silicon chip being placed temperature is 75 ℃, and mass percent concentration is to carry out surface-texturing technology in 1% the sodium hydroxide solution, forms the surface of class " pyramid " shape at the silicon chip surface in 100 crystal orientation, makes the surface have good sunken light effect.
B. mask
This mask main equipment adopts Roth﹠amp; A kind of board-like PECVD plasma gas phase deposition system of plated film down of Rau company, carry out masking process by this mask carrier deposited silicon nitride, because the existence of the inner grid line shape of the carrier graphite support plate minor structure of carrying silicon chip, make the place of silicon chip surface electrode to be printed not plate barrier film, and plate the silicon nitride barrier film of a layer thickness at 5nm in other zones.Also can select to enter oxidative system, not have concealed zone to form oxide-film thereby carry out oxidation technology.
C. weight mixes
With liquid phosphorus oxychloride (POCl3) is raw material, the silicon chip of getting behind the mask carries out diffusion technology, in the place that does not have mask is that electrode zone to be printed forms heavy diffusion region, square resistance is controlled at 10ohm/, in the place that mask is arranged is the zone that silicon chip is subjected to light, the very thin PN junction of diffusion last layer forms gently and expands, and square resistance is controlled at 60ohm/.
D. etching
The PN junction of the silicon chips periphery after the method for employing plasma etching is mixed weight is got rid of.
E. wash film and dephosphorization silex glass
It is 8% hydrofluoric acid solution that silicon chip after weight mixed places percent by volume, cleans the phosphorosilicate glass that formed during with the barrier film of silicon chip surface and diffusion in 3 minutes and removes totally.
F. make antireflective coating
Adopt the selectivity diffusingsurface deposition one deck silicon nitride film of common process plasma-reinforced chemical deposition (PECVD) method at silicon chip, the THICKNESS CONTROL of film is at 78nm, and refractive index is controlled at 2.05, to guarantee to have good antireflective and passivation effect.
G. silk screen printing and sintering
With the method for silk screen printing, print the back electrode slurry overleaf earlier, republish back of the body electric field slurry, and under 200 ℃ temperature, dry respectively.Aligning has formed the high-dopant concentration diffusion layer in the front, prints thin gate electrode and main grid electrode thereon.Be sent to silicon chip surface temperature sintering under 500 ℃ atmosphere then, the front electrode slurry will pass passivation and antireflection layer contacts with the high-dopant concentration diffusion layer, forms the front electrode of the solar cell with good ohmic contact.Backplate and electric field then by this sintering, form the back electrode and the aluminium back of the body field of rear surface of solar cell with slurry.Thereby finish the making of mask method selective emitter battery.
The carrier of the carrying silicon chip that present embodiment is used is with embodiment 1, and the concrete steps of the masking process of a kind of selective emitter solar battery that present embodiment provides are:
A. surface-texturing
Silicon chip to supplied materials carries out prerinse, and ultrasonic wave is adopted in prerinse, and adds certain washing detergent.Afterwards silicon chip being placed temperature is 80 ℃, and mass percent concentration is to carry out surface-texturing technology in 2% the sodium hydroxide solution, forms the surface of class " pyramid " shape at the silicon chip surface in 100 crystal orientation, makes the surface have good sunken light effect.
B. mask
This mask main equipment adopts Roth﹠amp; A kind of board-like PECVD plasma gas phase deposition system of plated film down of Rau company, carry out masking process by this mask carrier deposited silicon nitride, because the existence of the inner grid line shape of the carrier graphite support plate minor structure of carrying silicon chip, make the place of silicon chip surface electrode to be printed not plate barrier film, and plate the silicon nitride barrier film of a layer thickness at 10nm in other zones.
C. weight mixes
With liquid phosphorus oxychloride (POCl3) is raw material, the silicon chip of getting behind the mask carries out diffusion technology, in the place that does not have mask is that electrode zone to be printed forms heavy diffusion region, square resistance is controlled at 20ohm/, in the place that mask is arranged is the zone that silicon chip is subjected to light, the very thin PN junction of diffusion last layer forms gently and expands, and square resistance is controlled at 80 ohm/.
D. etching
The PN junction of the silicon chips periphery after the method for employing plasma etching is mixed weight is got rid of.
E. wash film and dephosphorization silex glass
It is 12% hydrofluoric acid solution that silicon chip after weight mixed places percent by volume, cleans the phosphorosilicate glass that formed during with the barrier film of silicon chip surface and diffusion in 5 minutes and removes totally.
F. make antireflective coating
Adopt the selectivity diffusingsurface deposition one deck silicon nitride film of common process plasma-reinforced chemical deposition (PECVD) method at silicon chip, the THICKNESS CONTROL of film is at 82nm, and refractive index is controlled at 2.1, to guarantee to have good antireflective and passivation effect.
G. silk screen printing and sintering
With the method for silk screen printing, print the back electrode slurry overleaf earlier, republish back of the body electric field slurry, and under 300 ℃ temperature, dry respectively.Aligning has formed the high-dopant concentration diffusion layer in the front, prints thin gate electrode and main grid electrode thereon.Be sent to silicon chip surface temperature sintering under 800 ℃ atmosphere then, the front electrode slurry will pass passivation and antireflection layer contacts with the high-dopant concentration diffusion layer, forms the front electrode of the solar cell with good ohmic contact.Backplate and electric field then by this sintering, form the back electrode and the aluminium back of the body field of rear surface of solar cell with slurry.Thereby finish the making of mask method selective emitter battery.
Embodiment 3
The carrier of the carrying silicon chip of using in the present embodiment such as Fig. 1 and shown in Figure 3, minor structure indoor design pattern 2 is anti-unanimity with the electrode printed patterns in silk screen front, silicon chip after the texturing is placed each minor structure by last chip system, and transmission enters a kind of diffusion system.The grid line shape design of minor structure is just in time covered the non-electrode light area of silicon chip.After carrying out diffusion technology, the positive electrode zone to be printed of silicon chip forms heavy diffusion layer, and does not form diffusion layer in non-electrode light area, removes mask carrier minor structure, silicon chip is carried out the diffusion light dope of low concentration again.Concrete steps are:
A. surface-texturing
Silicon chip to supplied materials carries out prerinse, and ultrasonic wave is adopted in prerinse, and adds certain washing detergent.Afterwards silicon chip being placed temperature is 75 ℃, and mass percent concentration is to carry out surface-texturing technology in 1% the sodium hydroxide solution, forms the surface of class " pyramid " shape at the silicon chip surface in 100 crystal orientation, makes the surface have good sunken light effect.
B. heavy doping
Silicon chip after the texturing is packed in the silicon chip mask carrier by last chip system, enter a kind of chain type diffusion furnace by transmission and carry out diffusion technology, the zone that makes silicon chip surface not have the electrode to be printed of mask forms the heavily diffusion of 20ohm/ and mixes the phosphorus layer, and does not form diffusion layer in the non-electrode light area that has mask layer to cover
C. light dope
Behind the silicon chip removal mask carrier after heavily spreading, carry out the diffusion second time, adjust suitable diffusion conditions, make silicon chip in non-electrode light area, the very thin PN junction of diffusion last layer forms gently expansion, and square resistance is controlled at 70ohm/.
D. etching and remove phosphorosilicate glass
The PN junction of the silicon chips periphery after the method for employing plasma etching is mixed weight is got rid of.
Then silicon chip being placed percent by volume is 8% hydrofluoric acid solution, cleans the phosphorosilicate glass that forms when silicon chip surface being spread in 2 minutes and removes clean.
E. make antireflective coating
Adopt the selectivity diffusingsurface deposition one deck silicon nitride film of common process plasma-reinforced chemical deposition (PECVD) method at silicon chip, the THICKNESS CONTROL of film is at 78nm, and refractive index is controlled at 2.05, to guarantee to have good antireflective and passivation effect.
F. silk screen printing and sintering
With the method for silk screen printing, print the back electrode slurry overleaf earlier, republish back of the body electric field slurry, and under 200 ℃ temperature, dry respectively.Aim at the diffusion layer that has formed high-dopant concentration in the front, print thin gate electrode and main grid electrode thereon.Be sent to silicon chip surface temperature sintering under 500 ℃ atmosphere then, the front electrode slurry will pass passivation and antireflection layer contacts with the high-dopant concentration diffusion layer, forms the front electrode of the solar cell with good ohmic contact.Backplate and electric field then by this sintering, form the back electrode and the aluminium back of the body field of rear surface of solar cell with slurry.Thereby finish the making of mask method selective emitter battery.
Embodiment 4
The carrier of the carrying silicon chip that present embodiment uses is with embodiment 3, and the concrete steps of the masking process of a kind of selective emitter solar battery that present embodiment provides are:
A. surface-texturing
Silicon chip to supplied materials carries out prerinse, and ultrasonic wave is adopted in prerinse, and adds certain washing detergent.Afterwards silicon chip being placed temperature is 80 ℃, and mass percent concentration is to carry out surface-texturing technology in 2% the sodium hydroxide solution, forms the surface of class " pyramid " shape at the silicon chip surface in 100 crystal orientation, makes the surface have good sunken light effect.
B. heavy doping
Silicon chip after the texturing is packed in the silicon chip mask carrier by last chip system, enter a kind of chain type diffusion furnace by transmission and carry out diffusion technology, the zone that makes silicon chip surface not have the electrode to be printed of mask forms the heavily diffusion of 30ohm/ and mixes the phosphorus layer, and does not form diffusion layer in the non-electrode light area that has mask layer to cover
C. light dope
Behind the silicon chip removal mask carrier after heavily spreading, carry out the diffusion second time, adjust suitable diffusion conditions, make silicon chip in non-electrode light area, the very thin PN junction of diffusion last layer forms gently expansion, and square resistance is controlled at 100ohm/.
D. etching and remove phosphorosilicate glass
The PN junction of the silicon chips periphery after the method for employing plasma etching is mixed weight is got rid of.
Then silicon chip being placed percent by volume is about 12 hydrofluoric acid solution, cleans the phosphorosilicate glass that forms when silicon chip surface being spread in 4 minutes and removes clean.
E. make antireflective coating
Adopt the selectivity diffusingsurface deposition one deck silicon nitride film of common process plasma-reinforced chemical deposition (PECVD) method at silicon chip, the THICKNESS CONTROL of film is at 82nm, and refractive index is controlled at 2.1, to guarantee to have good antireflective and passivation effect.
F. silk screen printing and sintering
With the method for silk screen printing, print the back electrode slurry overleaf earlier, republish back of the body electric field slurry, and under 300 ℃ temperature, dry respectively.Aim at the diffusion layer that has formed high-dopant concentration in the front, print thin gate electrode and main grid electrode thereon.Be sent to silicon chip surface temperature sintering under 800 ℃ atmosphere then, the front electrode slurry will pass passivation and antireflection layer contacts with the high-dopant concentration diffusion layer, forms the front electrode of the solar cell with good ohmic contact.Backplate and electric field then by this sintering, form the back electrode and the aluminium back of the body field of rear surface of solar cell with slurry.Thereby finish the making of mask method selective emitter battery.
Claims (8)
1. carrier that carries silicon chip, it is characterized in that: comprise the minor structure that at least one is arranged in order, each minor structure periphery is the silicon chip bearing frame (1) of silicon chip shape size, and the inside pattern (2) of each minor structure is grid line shape and consistent or anti-consistent with the electrode printed patterns in silk screen front.
2. the masking process of a selective emitter solar battery, it is characterized in that: step is:
The surface-texturing of step 1, silicon chip is handled: monocrystalline silicon after prerinse is finished or polysilicon chip are put into chemical corrosion liquid and are carried out the texturing processing and remove affected layer;
Step 2, the silicon chip after the texturing placed each minor structure of carrier of carrying silicon chip by last chip system, if the inside pattern (2) of minor structure is with the electrode printed patterns unanimity in silk screen front, then transmission enters vapor deposition apparatus or oxidative system is carried out depositing technics or oxidation technology, forms the needed barrier film with certain thickness and compactness of selectivity diffusion in non-electrode light area; If the inside pattern (2) of minor structure is anti-consistent with the electrode printed patterns in silk screen front, then transmission enters diffusion system and carries out diffusion technology, the zone that makes silicon chip surface not have the electrode to be printed of mask forms heavy diffusing, doping layer, and does not form diffusion layer in the non-electrode light area that has mask layer to cover;
Step 3, be depositing technics or oxidation technology if step 2 carries out, the silicon chip that then will make mask is put into high temperature dispersing furnace and is carried out the liquid source diffusion, be subjected to light to have the zone of mask to form light dope at silicon chip, in the no masked areas formation heavy doping of silicon chip electrode to be printed; If what step 2 was carried out is diffusion technology, after then the minor structure of mask being removed, the front surface of silicon chip is carried out the light diffusing, doping of low concentration;
Step 4, the silicon chip after the selectivity diffusion is carried out etching remove periphery P N knot, and clean and remove surperficial phosphorosilicate glass;
Step 5, with positive one deck passivation and the antireflection film made of dried silicon chip;
Step 6, the method by silk screen printing are made back electrode, back of the body electric field and positive electrode, and carry out sintering, finish.
3. the masking process of selective emitter solar battery as claimed in claim 2, it is characterized in that: the described chemical corrosion liquid of step 1 is that temperature is 75-80 ℃, and mass percent concentration is the sodium hydroxide solution of 1%-2%.
4. the masking process of selective emitter solar battery as claimed in claim 2, it is characterized in that: the described barrier film of step 2 is the silicon nitride barrier film, its thickness is 1-10nm, is 20-30ohm/ at the square resistance of the described heavy diffusing, doping layer of step 2.
5. the masking process of selective emitter solar battery as claimed in claim 2, it is characterized in that: the described lightly doped square resistance of step 3 is controlled at 60-80ohm/, described heavily doped square resistance is controlled at 10-20ohm/, and the square resistance of the described light diffusing, doping of step 3 is controlled at 70-100ohm/.
6. the masking process of selective emitter solar battery as claimed in claim 2, it is characterized in that: the step of the described cleaning of step 4 is: it is the hydrofluoric acid solution of 8%-12% that silicon chip is placed percent by volume, cleans the phosphorosilicate glass that forms when silicon chip surface being spread in 2-4 minute and removes clean.
7. the masking process of selective emitter solar battery as claimed in claim 2, it is characterized in that: the concrete grammar of step 5 is: adopt the selectivity diffusingsurface deposition one deck silicon nitride film of common process plasma-reinforced chemical sedimentation at silicon chip, the THICKNESS CONTROL of film is at 78-82nm, and refractive index is controlled at 2-2.2.
8. the masking process of selective emitter solar battery as claimed in claim 2, it is characterized in that: the concrete grammar of step 6 is: with the method for silk screen printing, print the back electrode slurry overleaf earlier, republish back of the body electric field slurry, and under 200 ℃～300 ℃ temperature, dry respectively, aim at the diffusion layer that has formed high-dopant concentration in the front, print thin gate electrode and main grid electrode thereon, be sent to silicon chip surface temperature sintering under 500 ℃～800 ℃ atmosphere then, the front electrode slurry will pass passivation and antireflection layer contacts with the high-dopant concentration diffusion layer, formation has the front electrode of the solar cell of good ohmic contact, backplate and electric field then pass through this sintering with slurry, form the back electrode and the aluminium back of the body field of rear surface of solar cell, thereby finish the making of mask method selective emitter battery.
Priority Applications (1)
| Application Number | Priority Date | Filing Date | Title |
|---|---|---|---|
| CN2010102771180A CN101950781A (en) | 2010-09-09 | 2010-09-09 | Silicon chip carrier and making process for selective emitter solar cell |
Applications Claiming Priority (1)
| Application Number | Priority Date | Filing Date | Title |
|---|---|---|---|
| CN2010102771180A CN101950781A (en) | 2010-09-09 | 2010-09-09 | Silicon chip carrier and making process for selective emitter solar cell |
Publications (1)
| Publication Number | Publication Date |
|---|---|
| CN101950781A true CN101950781A (en) | 2011-01-19 |
Family
ID=43454206
Family Applications (1)
| Application Number | Title | Priority Date | Filing Date |
|---|---|---|---|
| CN2010102771180A Pending CN101950781A (en) | 2010-09-09 | 2010-09-09 | Silicon chip carrier and making process for selective emitter solar cell |
Country Status (1)
| Country | Link |
|---|---|
| CN (1) | CN101950781A (en) |
Cited By (12)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| CN102394260A (en) * | 2011-11-29 | 2012-03-28 | 天威新能源控股有限公司 | Preparing method of passivation layer on back of solar cell |
| CN102709378A (en) * | 2012-01-09 | 2012-10-03 | 南安市三晶阳光电力有限公司 | Preparation method of selective emitting electrode crystalline silicon solar battery |
| CN102738300A (en) * | 2012-06-07 | 2012-10-17 | 北京大学 | Method for producing solar cell gate electrode |
| CN102779897A (en) * | 2012-05-22 | 2012-11-14 | 浙江正泰太阳能科技有限公司 | Method for preparing selective emitter through manner of one-time diffusion |
| CN102810600A (en) * | 2012-08-16 | 2012-12-05 | 英利能源（中国）有限公司 | Preparation method of crystalline silicon solar cell |
| CN102969398A (en) * | 2012-11-20 | 2013-03-13 | 宁波尤利卡太阳能科技发展有限公司 | Preparation method of back passivated crystalline silicon solar cell |
| CN107516683A (en) * | 2017-08-04 | 2017-12-26 | 张家港协鑫集成科技有限公司 | Rear surface of solar cell partial metallic contact method and cell manufacturing method |
| CN110061066A (en) * | 2019-04-30 | 2019-07-26 | 苏州固锝电子股份有限公司 | A kind of manufacturing process of the ipsilateral diode chip for backlight unit of the electrode of shallow trench |
| CN110416368A (en) * | 2019-08-21 | 2019-11-05 | 常州时创能源科技有限公司 | A kind of production line of laser SE battery |
| WO2020258683A1 (en) * | 2019-06-24 | 2020-12-30 | 泰州隆基乐叶光伏科技有限公司 | Solar cell and manufacturing method therefor |
| CN112813382A (en) * | 2020-12-25 | 2021-05-18 | 泰州隆基乐叶光伏科技有限公司 | Mask plate |
| CN113561635A (en) * | 2021-07-23 | 2021-10-29 | 陕西众森电能科技有限公司 | High accuracy pattern rendition thick liquids support plate structure |
Citations (2)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| CN2179636Y (en) * | 1993-10-14 | 1994-10-12 | 上海德佳科技综合公司 | Mould for making solar cell electrode |
| CN201576695U (en) * | 2009-11-06 | 2010-09-08 | 浙江百力达太阳能有限公司 | Masking film device of SE battery |
-
2010
- 2010-09-09 CN CN2010102771180A patent/CN101950781A/en active Pending
Patent Citations (2)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| CN2179636Y (en) * | 1993-10-14 | 1994-10-12 | 上海德佳科技综合公司 | Mould for making solar cell electrode |
| CN201576695U (en) * | 2009-11-06 | 2010-09-08 | 浙江百力达太阳能有限公司 | Masking film device of SE battery |
Cited By (18)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| CN102394260A (en) * | 2011-11-29 | 2012-03-28 | 天威新能源控股有限公司 | Preparing method of passivation layer on back of solar cell |
| CN102709378A (en) * | 2012-01-09 | 2012-10-03 | 南安市三晶阳光电力有限公司 | Preparation method of selective emitting electrode crystalline silicon solar battery |
| CN102779897A (en) * | 2012-05-22 | 2012-11-14 | 浙江正泰太阳能科技有限公司 | Method for preparing selective emitter through manner of one-time diffusion |
| CN102779897B (en) * | 2012-05-22 | 2014-11-12 | 浙江正泰太阳能科技有限公司 | Method for preparing selective emitter through manner of one-time diffusion |
| CN102738300A (en) * | 2012-06-07 | 2012-10-17 | 北京大学 | Method for producing solar cell gate electrode |
| CN102738300B (en) * | 2012-06-07 | 2015-01-07 | 北京大学 | Method for producing solar cell gate electrode |
| CN102810600A (en) * | 2012-08-16 | 2012-12-05 | 英利能源（中国）有限公司 | Preparation method of crystalline silicon solar cell |
| CN102969398A (en) * | 2012-11-20 | 2013-03-13 | 宁波尤利卡太阳能科技发展有限公司 | Preparation method of back passivated crystalline silicon solar cell |
| CN107516683A (en) * | 2017-08-04 | 2017-12-26 | 张家港协鑫集成科技有限公司 | Rear surface of solar cell partial metallic contact method and cell manufacturing method |
| CN110061066A (en) * | 2019-04-30 | 2019-07-26 | 苏州固锝电子股份有限公司 | A kind of manufacturing process of the ipsilateral diode chip for backlight unit of the electrode of shallow trench |
| CN110061066B (en) * | 2019-04-30 | 2024-02-09 | 苏州固锝电子股份有限公司 | Manufacturing process of diode chip on same side of electrode of shallow trench |
| WO2020258683A1 (en) * | 2019-06-24 | 2020-12-30 | 泰州隆基乐叶光伏科技有限公司 | Solar cell and manufacturing method therefor |
| EP3979332A4 (en) * | 2019-06-24 | 2023-07-05 | Longi Solar Technology (Taizhou) Co., Ltd. | Solar cell and manufacturing method therefor |
| AU2019453945B2 (en) * | 2019-06-24 | 2023-07-13 | Longi Solar Technology (Taizhou) Co., Ltd. | Solar cell and manufacturing method therefor |
| CN110416368A (en) * | 2019-08-21 | 2019-11-05 | 常州时创能源科技有限公司 | A kind of production line of laser SE battery |
| CN112813382A (en) * | 2020-12-25 | 2021-05-18 | 泰州隆基乐叶光伏科技有限公司 | Mask plate |
| CN113561635A (en) * | 2021-07-23 | 2021-10-29 | 陕西众森电能科技有限公司 | High accuracy pattern rendition thick liquids support plate structure |
| CN113561635B (en) * | 2021-07-23 | 2022-06-21 | 陕西众森电能科技有限公司 | High accuracy pattern rendition thick liquids support plate structure |
Similar Documents
| Publication | Publication Date | Title |
|---|---|---|
| CN101950781A (en) | Silicon chip carrier and making process for selective emitter solar cell | |
| WO2017020689A1 (en) | Back contact type solar cell based on p-type silicon substrate and preparation method therefor | |
| CN101937940B (en) | Technology for manufacturing selective emitter junction solar cell by printed phosphorous source one-step diffusion method | |
| CN101950780B (en) | Preparation method of selective emitter solar cell | |
| CN102623517B (en) | Back contact type crystalline silicon solar cell and production method thereof | |
| CN108922938B (en) | Back contact heterojunction solar cell and preparation method thereof | |
| TWI536597B (en) | A low cost, suitable for mass production of back contact with the battery production methods | |
| WO2017020690A1 (en) | Back-contact solar cell based on p-type silicon substrate | |
| CN110265497A (en) | A kind of N-shaped crystal-silicon solar cell of selective emitter and preparation method thereof | |
| CN102332495A (en) | Fabrication method for crystalline silicon solar cell | |
| CN101866984A (en) | Method for selectively doping emitting stage on surface of crystalline silicon cell film | |
| CN102683493A (en) | Preparation method of N-type crystalline silicon double-sided back contact solar cell | |
| CN105826409B (en) | A kind of preparation method of local back field N-type solar cell | |
| CN110112230A (en) | A kind of preparation method of MWT solar battery | |
| CN102916087A (en) | Solar cell and manufacturing method thereof | |
| CN102157585B (en) | Method for manufacturing uniform shallow emitter solar cell | |
| KR20090028883A (en) | Solar cell and method for manufacturing the same | |
| CN108682699B (en) | Preparation method of MWT solar cell positive electrode with low cost | |
| CN102969371B (en) | Structure of two-surface solar cell and manufacturing method of structure | |
| CN116130558B (en) | Preparation method of novel all-back electrode passivation contact battery and product thereof | |
| CN106328736A (en) | Anti-LID black silicon solar high-efficiency cell and production method thereof | |
| CN104966766A (en) | Selective doping method for solar cell | |
| CN102176491A (en) | Process for manufacturing buried solar cell by plasma etching and slotting | |
| CN102709391B (en) | A kind of preparation method of selective emitter solar battery | |
| CN102522453B (en) | Manufacturing method of field effect crystalline silicon solar cell |
Legal Events
| Date | Code | Title | Description |
|---|---|---|---|
| C06 | Publication | ||
| PB01 | Publication | ||
| C10 | Entry into substantive examination | ||
| SE01 | Entry into force of request for substantive examination | ||
| C41 | Transfer of patent application or patent right or utility model | ||
| TA01 | Transfer of patent application right |
Effective date of registration: 20110530 Address after: Jiaxing City, Zhejiang province 314512 Tongxiang Heshan Town Industrial Park Applicant after: Bright Solar Energy Co., Ltd. Address before: Jiaxing City, Zhejiang province 314512 Tongxiang Heshan Town Industrial Park Applicant before: Bright Solar Energy Co., Ltd. |
|
| C12 | Rejection of a patent application after its publication | ||
| RJ01 | Rejection of invention patent application after publication |
Application publication date: 20110119 |