CN101924013B - Method for increasing photo-etching alignment precision after extension - Google Patents

Method for increasing photo-etching alignment precision after extension Download PDF

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Publication number
CN101924013B
CN101924013B CN200910057423A CN200910057423A CN101924013B CN 101924013 B CN101924013 B CN 101924013B CN 200910057423 A CN200910057423 A CN 200910057423A CN 200910057423 A CN200910057423 A CN 200910057423A CN 101924013 B CN101924013 B CN 101924013B
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etching
photo
substrate
increasing
alignment according
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CN101924013A (en
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王雷
吴鹏
阚欢
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Shanghai Huahong Grace Semiconductor Manufacturing Corp
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Shanghai Hua Hong NEC Electronics Co Ltd
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Abstract

The invention discloses a method for increasing photo-etching alignment precision after extension, comprising the following steps of: (1) generating a specific test pattern by photo-etching before an extension layer grows, wherein the test pattern comprises a rectangle and an outline pattern of the rectangle; (2) etching a substrate of the extension layer by a dry method; (3) growing the extension layer; (4) carrying out a subsequent process, wherein various devices are manufactured by adopting the substrate with a photo-etching mark, and the substrate is formed after the extension layer grows in the step (3). On the basis of the method, a more precise and exact model compensation value can be obtained, and the photo-etching alignment precision is greatly increased after extension.

Description

A kind of method of increasing photo-etching alignment
Technical field
The present invention relates to a kind of technology integrating method of semiconductor device, relate in particular to a kind of method of increasing photo-etching alignment.
Background technology
In the semiconductor device, on single crystalline substrate, form the different epitaxial loayers that mix of identical mono-crystalline structures,, can improve the puncture voltage and reduction resistance substrate of device greatly as the substrate layer of device or the insulating barrier of vertical direction through epitaxy technology.For high voltage and high current or high speed device right and wrong a kind of technological means of usefulness usually.
And for some with the device of EPI (extension) as substrate; Usually can before extension, form buried regions as insulating barrier or connecting line layer in the device vertical lower; Require this moment subsequent device to form all in this zone; And require the outer photoetching level of delaying that higher alignment precision is arranged, simultaneously for undersized more device, alignment precision requires high more.
Now general technical method is through forming the anterior layer standard of measuring as the photoetching alignment like the represented figure of Figure 1A before epitaxial growth; The method is the thin or not serious technology of pattern distortion for the EPI layer thickness, can delay the more satisfactory alignment figure of formation outside and carry out follow-up photoetching process.But for the very thick technology of EPI layer; Because the restriction of EPI technology itself, the film spreadability of growth is fine, adds some thermal processs; Cause the vertical cross section smoothing at resolution chart edge; Cause the degree of depth of extension backward step not enough, and the shape after the growth can constantly change with epitaxy technique and section configuration, make alignment figure degradation in contrast and instability.
Summary of the invention
The technical problem that the present invention will solve provides a kind of method of increasing photo-etching alignment.
For solving the problems of the technologies described above, the present invention provides a kind of method of increasing photo-etching alignment, comprises the steps:
(1) before outer layer growth, carry out photoetching and produce specific resolution chart, this resolution chart is made up of the outline pattern of a rectangle and this rectangle;
(2) substrate to epitaxial loayer carries out dry etching;
(3) outer layer growth;
(4) subsequent technique adopts the substrate that has photo-etching mark that forms behind step (3) outer layer growth to make various devices.
Outline pattern described in the step (1) is made up of with the identical little figure of size a plurality of shapes.Described little figure is of a size of 0.1~10 micron, and the shape of this little figure can be square, rectangle or other shapes.
The described outline pattern of step (1) is a row or plural number row.
The patterned surface crystal orientation that dry etching described in the step (2) forms is all different with original substrate monocrystal crystal orientation.
Increase following steps before in step (1): deposition one deck oxide is as the etching barrier layer in the step (2) on substrate; And between step (2) and step (3), increase following steps: adopt the soup that contains HF to carry out wet method and remove described etching barrier layer.
Described epitaxial loayer of step (3) and substrate crystal orientation are identical.
Compare with prior art; The present invention has following beneficial effect: adopt the inventive method, the contrast of the fault defective of generation is very high, and the envelope that forms through the fault defective has very strong contrast; Can carry out accurately with accurately measuring, guarantee photoetching alignment precision.
Description of drawings
Fig. 1 is that existing resolution chart and resolution chart of the present invention compare sketch map, and Figure 1A is existing resolution chart, and Figure 1B is a resolution chart of the present invention;
Fig. 2 exists the on-monocrystalline fault of construction to form the schematic diagram of fault when being the EPI growth;
Fig. 3 is the shape sketch map of the fault defective that produces of the substrate of different crystal orientations.
Embodiment
Below in conjunction with accompanying drawing and embodiment the present invention is done further detailed explanation.
The method of a kind of increasing photo-etching alignment of the present invention the steps include:
(1) before outer layer growth, carries out photoetching and produce specific resolution chart; Fc-specific test FC figure such as Figure 1B in the step (1) are represented, are made up of the outline pattern of a rectangle and this rectangle, and this outline pattern is made up of with the identical little figure of size a plurality of shapes.Its little figure is of a size of 0.1~10um (micron), and shape can be square, rectangle or other shapes.The outline pattern that is made up of little figure can be a row or plural number row.
(2) substrate to epitaxial loayer carries out dry etching;
(3) outer layer growth produces and the identical epitaxial film materials in substrate crystal orientation, mixes according to arts demand simultaneously.For example substrate is a monocrystalline silicon, and EPI can grow the identical monocrystalline silicon in crystal orientation.The purpose of EPI technology is exactly in order to obtain substrate identical with the substrate crystal orientation and that doping content is different, and can mix as required N or p type impurity can be regulated doping, obtain the epitaxial loayer of different resistivity.This step adopts conventional outer layer growth process and process conditions.
(4) subsequent technique has been equivalent to provide a substrate that has photo-etching mark behind the epitaxial loayer of having grown, can be used for making various devices.
Dry etching is the etching to the epitaxial loayer substrate in the step (2).Simultaneously for fear of damage to other substrates, can step (1) preceding on substrate deposition one deck oxide as step (2) in the barrier layer of etching, avoid non-graphics field to sustain damage and in follow-up EPI technology, form defective.Simultaneously; The patterned surface crystal orientation that step (2) dry etching forms is all different with original substrate monocrystal crystal orientation, and (substrate of general EPI technology itself is exactly a monocrystalline; Figure after being etched is owing to sustain damage; Its surface orientation structure is different with substrate), produce the crystal orientation different when guaranteeing follow-up EPI growth with substrate in the graphics field, thus formation fault defective.
If adopt oxide simultaneously, can before follow-up EPI grows up, adopt the soup that contains HF to carry out wet method and remove as etching barrier layer.
The method of a kind of increasing photo-etching alignment of the present invention is utilized to be epitaxially deposited as in strict accordance with lattice to produce monocrystalline, can produce the principle of fault defective for lattice defect, and its schematic diagram and shape such as Fig. 2 and Fig. 3 are represented.Through the lithography alignment graphic designs that produces before the extension is a series of little figures; Then substrate is carried out etching and artificially produce lattice defect; In follow-up growth, these defectives can produce the fault defective along with epitaxial growth, finally form envelope by these defective patterns; Produce the lithography alignment mark of high-contrast; Improved the alignment precision certainty of measurement of follow-up photoetching level, can obtain more accurately and model compensation value accurately, improved the outer lithography registration precision of delaying greatly based on this kind method.

Claims (7)

1. the method for an increasing photo-etching alignment is characterized in that, comprises the steps:
(1) before outer layer growth, carry out photoetching and produce specific resolution chart, this resolution chart is made up of the outline pattern of a rectangle and this rectangle;
(2) substrate to epitaxial loayer carries out dry etching, and the patterned surface crystal orientation that dry etching forms is all different with original substrate monocrystal crystal orientation, produces lattice defect;
(3) lattice defect that outer layer growth, step (2) produce is along with outer layer growth produces the fault defective, and forms envelope by these defective patterns, the generation photo-etching mark;
(4) subsequent technique adopts the substrate that has photo-etching mark that forms behind step (3) outer layer growth to make various devices.
2. the method for a kind of increasing photo-etching alignment according to claim 1 is characterized in that, the outline pattern described in the step (1) is made up of with the identical little figure of size a plurality of shapes.
3. the method for increasing photo-etching alignment according to claim 2 is characterized in that, described little figure is of a size of 0.1~10 micron, and the shape of this little figure is a rectangle.
4. the method for increasing photo-etching alignment according to claim 3 is characterized in that, the shape of described little figure is a square.
5. the method for increasing photo-etching alignment according to claim 1 and 2 is characterized in that, the described outline pattern of step (1) is a row or plural number row.
6. the method for increasing photo-etching alignment according to claim 1 is characterized in that, increases following steps before in step (1): deposition one deck oxide is as the etching barrier layer in the step (2) on substrate; And between step (2) and step (3), increase following steps: adopt the soup wet method that contains HF to remove described etching barrier layer.
7. the method for increasing photo-etching alignment according to claim 1 is characterized in that, described epitaxial loayer of step (3) and substrate crystal orientation are identical.
CN200910057423A 2009-06-17 2009-06-17 Method for increasing photo-etching alignment precision after extension Active CN101924013B (en)

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* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
CN103533756A (en) * 2013-09-29 2014-01-22 胜宏科技(惠州)股份有限公司 Method for etching printed circuit board

Citations (6)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
US5917205A (en) * 1995-06-01 1999-06-29 Kabushiki Kaisha Toshiba Photolithographic alignment marks based on circuit pattern feature
CN1280314A (en) * 1999-07-09 2001-01-17 日本电气株式会社 Method for producing semiconductor device
CN1329357A (en) * 2000-06-08 2002-01-02 株式会社东芝 Aligning method, alignment checking method and photomask
CN1480985A (en) * 2002-09-04 2004-03-10 旺宏电子股份有限公司 Method of peripheral auxiliary graphics for determining algnment mark of wafer and photoresist mask utilized
CN101320206A (en) * 2007-06-08 2008-12-10 旺宏电子股份有限公司 Overlapping mark and uses thereof
CN101452211A (en) * 2007-11-28 2009-06-10 上海华虹Nec电子有限公司 Method for producing photolithography alignment mark

Patent Citations (6)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
US5917205A (en) * 1995-06-01 1999-06-29 Kabushiki Kaisha Toshiba Photolithographic alignment marks based on circuit pattern feature
CN1280314A (en) * 1999-07-09 2001-01-17 日本电气株式会社 Method for producing semiconductor device
CN1329357A (en) * 2000-06-08 2002-01-02 株式会社东芝 Aligning method, alignment checking method and photomask
CN1480985A (en) * 2002-09-04 2004-03-10 旺宏电子股份有限公司 Method of peripheral auxiliary graphics for determining algnment mark of wafer and photoresist mask utilized
CN101320206A (en) * 2007-06-08 2008-12-10 旺宏电子股份有限公司 Overlapping mark and uses thereof
CN101452211A (en) * 2007-11-28 2009-06-10 上海华虹Nec电子有限公司 Method for producing photolithography alignment mark

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