CN103533756A - Method for etching printed circuit board - Google Patents
Method for etching printed circuit board Download PDFInfo
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- CN103533756A CN103533756A CN201310450753.8A CN201310450753A CN103533756A CN 103533756 A CN103533756 A CN 103533756A CN 201310450753 A CN201310450753 A CN 201310450753A CN 103533756 A CN103533756 A CN 103533756A
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- copper
- clad plate
- image
- printed substrate
- engraving method
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Abstract
The invention discloses a method for etching a printed circuit board. The method is characterized in that in an exposing process, a lead image adjacent to an image of a chip mounting position in a circuit image on a film is provided with a compensation segment; the compensation segment is provided with a recess which corresponds to the image of the chip mounting position. In the method, the depressed compensation segment is arranged in an area which corresponds to the chip mounting position in the lead image in the circuit image on the film, and the shape, bevel edge angle and depth of the compensation segment recess are designed on the premise of not changing the size and the position of the image of the chip mounting position, so that the area of the image of the chip mounting position is kept while the distance between the compensation segment and the image of the chip mounting position is increased; on one aspect, the phenomenon that a dry film between the chip mounting position and an adjacent circuit is not removed fully in exposing and developing processes is avoided; meanwhile, the contact area between etching liquid and a copper surface at the same position can be increased, so that the copper surface at the same position is etched fully, and the short circuit of the circuit board caused by incomplete etching is avoided.
Description
Technical field
The present invention relates to printed substrate production technical field, be specifically related to a kind of printed substrate engraving method.
Background technology
Existing printed substrate engraving method generally comprises following operation:
A. copper-clad plate is carried out to pre-treatment, comprise pickling, washing, oven dry;
B. on the copper face of copper-clad plate, paste dry film;
C. circuit image is fixed on the film, then the film is positioned over to copper-clad plate surface exposes, the circuit image on the film is transferred in copper-clad plate;
D. the copper-clad plate after exposure is put into developer solution and develop, the dry film at logicalnot circuit position, copper-clad plate surface is peelled off;
E. copper-clad plate is placed in to etching solution, the copper face at logicalnot circuit position is removed, obtain complete line.
Use said method designing for manufacturing to have IC installation position, BGA installation position etc. for the printed wire of the chip installation position of packaged chip pin, in exposure and developing procedure, the dry film of dry film on corresponding region, chip installation position easily and on adjacent wires is adhered, make the dry film that is arranged in the two logicalnot circuit district be difficult to be washed away by liquid medicine in development step, the copper face that finally causes this position is ablation thoroughly, and the wiring board finally making is scrapped.
Now conventionally with widening on the film circuit image and chip installation position image distance or dwindling chip installation position image, obtain larger chip installation position image, wire image pitch, prevent from exposing and thoroughly do not removed with the two corresponding dry film in developing procedure.But aforesaid operations dwindles the area of prepared circuit chip on board installation position the most at last, affect the normal performance of its performance.
Summary of the invention
In view of this, the present invention discloses in the thorough ablation copper-clad plate of a kind of energy the method for copper face between chip installation position and jingle bell circuit.
Object of the present invention is achieved through the following technical solutions:
An engraving method, comprises following operation:
A. copper-clad plate is carried out to pre-treatment, comprise pickling, washing, oven dry;
B. on the copper face of copper-clad plate, paste dry film;
C. circuit image is fixed on the film, then the film is positioned over to copper-clad plate surface exposes, the circuit image on the film is transferred in copper-clad plate;
D. the copper-clad plate after exposure is put into developer solution and develop, the dry film at logicalnot circuit position, copper-clad plate surface is peelled off;
E. copper-clad plate is placed in to etching solution, the copper face at logicalnot circuit position is removed, obtain complete line.
In described exposure process, wire image adjacent with chip installation position image in the circuit image on the film is provided with compensator section; Described compensator section is provided with the depression corresponding with chip installation position image.
The present invention's wire image setting compensator section adjacent with chip installation position image in circuit image, by the method for depression is set at compensator section, do not changing under the prerequisite of chip installation position picture size and position, when having increased the spacing of compensator section and chip installation position image, maintained the area of chip installation position image, can prevent that on the one hand the dry film that exposure and developing procedure chips installation position are adjacent between circuit from thoroughly not removed, can also increase the contact area of etching solution and this position copper face simultaneously, copper face with this position of thorough ablation, prevent the wiring board short circuit only not causing because of etching.Meanwhile, increase by the way the distance between chip installation position image and adjacent wires, can also guarantee that chip installation position that the printed substrate finally making has enough areas is to maintain the normal performance of its performance.
Concave bottom on described compensator section is apart from chip installation position image border 2.9～3.2MIL.
Through inventor's checking, when the image border, step pitch chip installation position, ground of caving in is 2.9～3.2MIL, can guarantee etch effect on compensator section, can prevent that again the compensator section corresponding region of wire from causing etched opening circuit because dry film covers deficiency.
The isosceles trapezoid of depression on described compensator section for standing upside down, the angle of its hypotenuse and concave bottom is 150 °～200 °.
Although the shape of chip installation position is varied, the dry film shape of the compensator section of the handstand isosceles trapezoid depression moulding that exposes is more stable, contributes to prevent that the dry film on compensator section from breaking, coming off.In addition, when compensator section depression for isosceles trapezoid is, the shape of its two hypotenuse is more conducive to impel the dry film in the logicalnot circuit region adjacent with compensator section thoroughly to come off in developing procedure, and it is not thorough that the dry film that further prevents this region is adhered the copper face etching causing.
The depression one hypotenuse of described compensator section and the angle of concave bottom are 150～170 °, and the angle of another hypotenuse and concave bottom is 180～200 °.
When the depression one hypotenuse of compensator section and the angle of concave bottom are 150～170 °, when the angle of another hypotenuse and concave bottom is 180～200 °, between compensator section and chip installation position, the dry film in logicalnot circuit region is more easily removed in developing procedure.Through inventor checking, in developing procedure of the present invention, between compensator section and chip installation position, the dry film clearance in logicalnot circuit region can be up to 100%, effective guarantee the thorough ablation of this region copper face in subsequent etch operation.
Described exposure process exposes in vacuum tank for the film is just positioned over copper-clad plate surface, and the circuit image on the film is transferred in copper-clad plate; Described exposure, for after copper-clad plate being exposed for the first time with 5～7 grades of energy levels, exposes the cooling 1～3min of copper-clad plate to copper-clad plate with 7～9 grades of energy levels more for the second time; Described 5～7 grades of energy levels, 7～9 grades of 5～7 grades of energy levels, 7～9 grades of energy levels that energy level is calculated for pressing 21 grades of energy gages.
The dry film in Wei Shi compensator section district can be fixed on copper face more firmly, thereby promotes the separation of the dry film that Qi Yu logicalnot circuit district is corresponding, and the present invention has selected the technical scheme that copper-clad plate is double exposed.Dry film and copper face that re-expose can be deepened compensator section attach intensity, strengthen the acutance of the wire image developing, and further prevent that the dry film of compensator section and chip installation position is adhered when developing.In addition, because making dry film, re-expose can be fixed on copper face more firmly, thus the intensity of current while being able to wash by water in forcing operation, thus thoroughly remove the dry film in logicalnot circuit district, make the circuit that etches in subsequent etch operation neat, clear.The present invention limits exposure for the first time and the energy level of exposure for the second time simultaneously, prevent because of increase exposure frequency enabled stage too high cause exposing can also strengthen the attaching intensity of dry film and the copper face of exposure area failed time.
In described exposure for the first time, the pressure in vacuum tank is gauge pressure-60～-70KPa; In described exposure for the second time, the pressure in vacuum tank is gauge pressure-70～-90KPa.
Through inventor's checking, under above-mentioned pressure, expose, the image of the final formation of developing is the most clear, and etch effect is last, can impel the etched circuit of institute smooth, clear.
Described the cooling 1～3min of copper-clad plate is referred to copper-clad plate is placed in to 8～13 ℃ of cooling 1～3min.
Because if exposure for the first time and exposure are for the second time carried out continuously, the light reaction of dry film too acutely easily excites the reaction in territory, non-exposed area, the figure that causes the most at last developing is unintelligible, is that the etched circuit of institute is uneven, even has rupture of line, the logicalnot circuit district copper face quality problems such as etching is not clean.Therefore the present invention is provided with the cooling step of 1-3min between exposing for the first time and exposing for the second time, and will be set as 8～13 ℃ cooling time, can effectively relax the light activated dry film light reaction of exposing to the sun for the first time, the light reaction of dry film is too violent when preventing from exposing for the second time.
Its developing procedure develops for the copper-clad plate after exposure is put into developer solution, and the dry film at logicalnot circuit position, copper-clad plate surface is peelled off; In described developer solution, be added with 1～2.4% NaH by weight
2pO
4; The pH of described developer solution is 7.5～9.9.
Described developer solution can be selected any commercially available developer solution.The present invention has added 1～2.4% NaH by weight in developer solution
2pO
4, pH is 7.5～9.9 o'clock, it can promote the carrying out reacting of developer solution and dry film, impels dry film on logicalnot circuit district copper face thoroughly to come off, the dry film that especially can prevent region between compensator section and chip installation position comes off unclean, further realizes object of the present invention.
The described dry film by logicalnot circuit position, copper-clad plate surface is peelled off and is referred to that using current that pressure is 30-50KPa, 30-40 ℃ to rinse peels off the dry film at logicalnot circuit position, copper-clad plate surface.
Because above-mentioned processing can make the dry film of compensator section and copper face, closely attach, not easily separated, turn round and look at the present invention and increased the intensity that current rinse simultaneously.When current pressure is 30-50KPa, can by the square the dry film in logicalnot circuit district be washed away and not affect the coverage effect of line areas dry film.
In its etching work procedure, the pH of etching solution is 0.1～1.3, and the temperature of etching solution is 50～80 ℃.
When etching solution pH is 0.1～1.3, the temperature of etching solution is 50～80 ℃, can be up hill and dale by the thorough ablation of copper face in the logicalnot circuit district not covered by dry film.Obtain neat, smooth circuit.
The present invention, with respect to prior art, has following beneficial effect:
1. the compensator section that in the wire image in the circuit image of the present invention on the film, the region division corresponding with chip installation position caves in, shape to compensator section depression, hypotenuse angle, the degree of depth has been carried out design and has not been changed under the prerequisite of chip installation position picture size and position, when having increased the spacing of compensator section and chip installation position image, maintained the area of chip installation position image, can prevent that on the one hand the dry film that exposure and developing procedure chips installation position are adjacent between circuit from thoroughly not removed, can also increase the contact area of etching solution and this position copper face simultaneously, copper face with this position of thorough ablation, prevent the wiring board short circuit only not causing because of etching.
2. the present invention has also designed the Exposure mode of re-expose, and at double exposure interval shooting class cooling step, energy level and pressure while limiting exposure simultaneously, further promote the dry film of compensator section and the attaching intensity of copper face, make the figure acutance of develop formation higher, more clear, thereby promote the smooth degree of the circuit of etching formation.
Accompanying drawing explanation
Fig. 1 is the schematic diagram of compensator section of the present invention.
Fig. 2 is the schematic diagram of another embodiment of the present invention compensator section.
embodiment
For the ease of it will be appreciated by those skilled in the art that below in conjunction with accompanying drawing and embodiment, the present invention is described in further detail:
The present embodiment provides a kind of printed substrate engraving method, comprises following operation:
A. copper-clad plate is carried out to pre-treatment, comprise pickling, washing, oven dry;
B. on the copper face of copper-clad plate, paste dry film;
C. circuit image is fixed on the film, then the film is positioned over to copper-clad plate surface exposes, the circuit image on the film is transferred in copper-clad plate;
D. the copper-clad plate after exposure is put into developer solution and develop, the dry film at logicalnot circuit position, copper-clad plate surface is peelled off;
E. copper-clad plate is placed in to etching solution, the copper face at logicalnot circuit position is removed, obtain complete line.
On the present embodiment wiring board to be prepared, there is one group of BGA installation position.
In described exposure process, in the circuit image on the film, the wire image adjacent with BGA installation position 1 image is provided with compensator section 2 as shown in Figure 1; Described compensator section is provided with the depression corresponding with BGA installation position 1 image.
Above-mentioned pretreatment procedure, subsides dry film operation, etching work procedure etc. all can adopt conventional means to realize.
In the present embodiment, the isosceles trapezoid of the depression on above-mentioned compensator section 2 for standing upside down, on it low apart from BGA installation position 1 image border 3MIL.One side and the upper low angle of above-mentioned compensator section depression are 170 °, and opposite side and upper low angle are 180 °.
In the present embodiment, described exposure process exposes in vacuum tank for the film is just positioned over copper-clad plate surface, and the circuit image on the film is transferred in copper-clad plate; Described exposure, for after copper-clad plate being exposed for the first time with 6 grades of energy levels, exposes the cooling 3min of copper-clad plate to copper-clad plate with 7 grades of energy levels more for the second time; Described 6 grades of energy levels, 7 grades of energy levels are all calculated with 21 grades of energy gages.
Preferably, described in the present embodiment, in exposure for the first time, the pressure in vacuum tank is gauge pressure-65KPa; In described exposure for the second time, the pressure in vacuum tank is gauge pressure-76KPa.
Described the cooling 3min of copper-clad plate is referred to copper-clad plate is placed in to 13 ℃ of cooling 3min.
Its developing procedure develops for the copper-clad plate after exposure is put into developer solution, and the dry film at logicalnot circuit position, copper-clad plate surface is peelled off; In described developer solution, be added with 1.8% NaH by weight
2pO
4; The pH of described developer solution is 7.5.
In its etching work procedure, the pH of etching solution is 0.1, and the temperature of etching solution is 77 ℃.
The described dry film by logicalnot circuit position, copper-clad plate surface is peelled off and is referred to and use pressure from a side blow at 170 ° of angle hypotenuse places of compensator section depression, to wash the dry film at logicalnot circuit position, copper-clad plate surface is peelled off for 38KPa, the current of 32 ℃.
All the other operations all can adopt current techique means to realize.
Use the disclosed printed substrate engraving method of the present embodiment to process copper-clad plate, BGA installation position can be adjacent to the thorough ablation of logicalnot circuit district copper face between wire, guarantee that the circuit that etching obtains is neat, smooth, stable performance.
The present embodiment provides a kind of printed substrate engraving method, comprises following operation:
A. copper-clad plate is carried out to pre-treatment, comprise pickling, washing, oven dry;
B. on the copper face of copper-clad plate, paste dry film;
C. circuit image is fixed on the film, then the film is positioned over to copper-clad plate surface exposes, the circuit image on the film is transferred in copper-clad plate;
D. the copper-clad plate after exposure is put into developer solution and develop, the dry film at logicalnot circuit position, copper-clad plate surface is peelled off;
E. copper-clad plate is placed in to etching solution, the copper face at logicalnot circuit position is removed, obtain complete line.
On the present embodiment wiring board to be prepared, there is one group of IC installation position.
In described exposure process, in the circuit image on the film, the wire image adjacent with IC installation position 1 image is provided with compensator section 2 as shown in Figure 2; Described compensator section is provided with the depression corresponding with IC installation position image.
Above-mentioned pretreatment procedure, subsides dry film operation, etching work procedure etc. all can adopt conventional means to realize.
In the present embodiment, the isosceles trapezoid of the depression on above-mentioned compensator section 2 for standing upside down, on it low apart from IC installation position 1 image border 2.9MIL.One side and the upper low angle of above-mentioned compensator section depression are 150 °, and opposite side and upper low angle are 190 °.
In the present embodiment, described exposure process exposes in vacuum tank for the film is just positioned over copper-clad plate surface, and the circuit image on the film is transferred in copper-clad plate; Described exposure, for after copper-clad plate being exposed for the first time with 7 grades of energy levels, exposes the cooling 2min of copper-clad plate to copper-clad plate with 8 grades of energy levels more for the second time; Described 7 grades of energy levels, 8 grades of energy levels are all calculated with 21 grades of energy gages.
Preferably, described in the present embodiment, in exposure for the first time, the pressure in vacuum tank is gauge pressure-60KPa; In described exposure for the second time, the pressure in vacuum tank is gauge pressure-80KPa.
Described the cooling 3min of copper-clad plate is referred to copper-clad plate is placed in to 11 ℃ of cooling 2min.
Its developing procedure develops for the copper-clad plate after exposure is put into developer solution, and the dry film at logicalnot circuit position, copper-clad plate surface is peelled off; In described developer solution, be added with 2.1% NaH by weight
2pO
4; The pH of described developer solution is 7.
In its etching work procedure, the pH of etching solution is 0.1, and the temperature of etching solution is 77 ℃.
The described dry film by logicalnot circuit position, copper-clad plate surface is peelled off and is referred to and use pressure from a side blow at 150 ° of angle hypotenuse places of compensator section depression, to wash the dry film at logicalnot circuit position, copper-clad plate surface is peelled off for 42KPa, the current of 30 ℃.
All the other operations all can adopt current techique means to realize.
Use the disclosed printed substrate engraving method of the present embodiment to process copper-clad plate, IC installation position can be adjacent to the thorough ablation of logicalnot circuit district copper face between wire, guarantee that the circuit that etching obtains is neat, smooth, stable performance.
Be more than wherein specific implementation of the present invention, it describes comparatively concrete and detailed, but can not therefore be interpreted as the restriction to the scope of the claims of the present invention.It should be pointed out that for the person of ordinary skill of the art, without departing from the inventive concept of the premise, can also make some distortion and improvement, these apparent replacement forms all belong to protection scope of the present invention.
Claims (10)
1. a printed substrate engraving method, is characterized in that: in exposure process, wire image adjacent with chip installation position image in the circuit image on the film is provided with compensator section; Described compensator section is provided with the depression corresponding with chip installation position image.
2. printed substrate engraving method according to claim 1, is characterized in that: the concave bottom on described compensator section is apart from chip installation position image border 2.9～3.2MIL.
3. printed substrate engraving method according to claim 2, is characterized in that: the isosceles trapezoid of the depression on described compensator section for standing upside down, the angle of its hypotenuse and concave bottom is 150 °～100 °.
4. printed substrate engraving method according to claim 3, is characterized in that: the depression one hypotenuse of described compensator section and the angle of concave bottom are 150～170 °, and the angle of another hypotenuse and concave bottom is 180～200 °.
5. according to the printed substrate engraving method described in claim 1-4 any one, it is characterized in that: described exposure process exposes in vacuum tank for the film is just positioned over copper-clad plate surface, and the circuit image on the film is transferred in copper-clad plate; Described exposure, for after copper-clad plate being exposed for the first time with 5～7 grades of energy levels, exposes the cooling 1～3min of copper-clad plate to copper-clad plate with 7～9 grades of energy levels more for the second time; Described 5～7 grades of energy levels, 7～9 grades of 5～7 grades of energy levels, 7～9 grades of energy levels that energy level is calculated for pressing 21 grades of energy gages.
6. printed substrate engraving method according to claim 5, is characterized in that: in described exposure for the first time, the pressure in vacuum tank is gauge pressure-60～-70KPa; In described exposure for the second time, the pressure in vacuum tank is gauge pressure-70～-90KPa.
7. printed substrate engraving method according to claim 6, is characterized in that: described the cooling 1～3min of copper-clad plate is referred to copper-clad plate is placed in to 8～13 ℃ of cooling 1～3min.
8. printed substrate engraving method according to claim 7, is characterized in that: its developing procedure develops for the copper-clad plate after exposure is put into developer solution, and the dry film at logicalnot circuit position, copper-clad plate surface is peelled off; In described developer solution, be added with 1～2.4% NaH by weight
2pO
4; The pH of described developer solution is 7.5～9.9.
9. printed substrate engraving method according to claim 8, is characterized in that: in its etching work procedure, the pH of etching solution is 0.1～1.3, and the temperature of etching solution is 50～80 ℃.
10. printed substrate engraving method according to claim 9, is characterized in that: the described dry film by logicalnot circuit position, copper-clad plate surface is peelled off and referred to that using current that pressure is 30-50KPa, 30-40 ℃ to rinse peels off the dry film at logicalnot circuit position, copper-clad plate surface.
Priority Applications (1)
| Application Number | Priority Date | Filing Date | Title |
|---|---|---|---|
| CN201310450753.8A CN103533756A (en) | 2013-09-29 | 2013-09-29 | Method for etching printed circuit board |
Applications Claiming Priority (1)
| Application Number | Priority Date | Filing Date | Title |
|---|---|---|---|
| CN201310450753.8A CN103533756A (en) | 2013-09-29 | 2013-09-29 | Method for etching printed circuit board |
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|---|---|
| CN103533756A true CN103533756A (en) | 2014-01-22 |
Family
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| CN201310450753.8A Pending CN103533756A (en) | 2013-09-29 | 2013-09-29 | Method for etching printed circuit board |
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Cited By (2)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| CN106961800A (en) * | 2017-03-21 | 2017-07-18 | 奥士康精密电路（惠州）有限公司 | Double IC clamps preparation method on a kind of PCB |
| CN111800954A (en) * | 2020-06-16 | 2020-10-20 | 珠海杰赛科技有限公司 | Reworking method for manufacturing abnormal product of copper-clad plate line and printed circuit board |
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| CN101841972A (en) * | 2010-04-23 | 2010-09-22 | 汕头超声印制板公司 | Method for manufacturing high-AR and fine-line PCB |
| CN101861056A (en) * | 2010-06-03 | 2010-10-13 | 深南电路有限公司 | Method for processing high-density integrated circuit |
| CN101924013A (en) * | 2009-06-17 | 2010-12-22 | 上海华虹Nec电子有限公司 | Method for increasing photo-etching alignment precision after extension |
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2013
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Patent Citations (4)
| Publication number | Priority date | Publication date | Assignee | Title |
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| CN101150103A (en) * | 2007-10-18 | 2008-03-26 | 晶方半导体科技（苏州）有限公司 | A crystal wafer chip dimension encapsulation line and its making method |
| CN101924013A (en) * | 2009-06-17 | 2010-12-22 | 上海华虹Nec电子有限公司 | Method for increasing photo-etching alignment precision after extension |
| CN101841972A (en) * | 2010-04-23 | 2010-09-22 | 汕头超声印制板公司 | Method for manufacturing high-AR and fine-line PCB |
| CN101861056A (en) * | 2010-06-03 | 2010-10-13 | 深南电路有限公司 | Method for processing high-density integrated circuit |
Cited By (3)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| CN106961800A (en) * | 2017-03-21 | 2017-07-18 | 奥士康精密电路（惠州）有限公司 | Double IC clamps preparation method on a kind of PCB |
| CN106961800B (en) * | 2017-03-21 | 2019-03-29 | 奥士康精密电路（惠州）有限公司 | Double IC clamp production method on a kind of PCB |
| CN111800954A (en) * | 2020-06-16 | 2020-10-20 | 珠海杰赛科技有限公司 | Reworking method for manufacturing abnormal product of copper-clad plate line and printed circuit board |
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Application publication date: 20140122 |
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