CN101877350A - Integrated chip unit - Google Patents
Integrated chip unit Download PDFInfo
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- CN101877350A CN101877350A CN 201010157015 CN201010157015A CN101877350A CN 101877350 A CN101877350 A CN 101877350A CN 201010157015 CN201010157015 CN 201010157015 CN 201010157015 A CN201010157015 A CN 201010157015A CN 101877350 A CN101877350 A CN 101877350A
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Abstract
The invention discloses an integrated chip unit, which comprises a circuit board. The circuit board comprises a top circuit layer and a bottom circuit layer which are attached to each other, wherein the top circuit layer is provided with a peripheral element, and is also provided with an anode and a cathode of a power supply, a signal input pole and a signal output pole which are electrically connected with the bottom circuit layer, an LED chip which is electrically connected with the anode of the power supply, a driving chip which is electrically connected with the cathode of the power supply, the signal input pole, the signal output pole and the LED chip respectively, and a transparent packaging rubber brick which is arranged on the circuit board and covers the driving chip and the LED chip or the top layer of the whole circuit board. The integrated chip unit has the advantages of miniaturization, integration, unitization, the size equivalent to that of an element and easier mass production by integrally packaging the driving chip, the LED chip and the peripheral element.
Description
Technical field
The present invention relates to the encapsulation technology field, especially a kind of chip for driving, led chip, the integrated encapsulation chip unit of peripheral cell.
Background technology
Existing three all-colour LED luminescence units are by LED, drive integrated circult, and peripheral cell is formed.The general element that adopts has plug-in type and SMD two kinds, the volume of any form luminescence unit all can't be done very for a short time, such as may not accomplishing 5mm * 5mm, 5mm * 7mm size, because general one three look adopting surface mounted LED just has 5mm * 5mm size, add peripheral cell and drive integrated circult considerably beyond 5mm * 5mm, if three plug-in type LED will be bigger, cost also can be higher relatively, and producing also can be loaded down with trivial details relatively.For no other reason than that these elements and circuit board manufacturing process all are ready-made, element can conveniently be purchased on the market, circuit design can have a large amount of circuit board producer processing again, so generally all adopt this form with the design of PCB design softwares such as Protel 99SE.
Yet existing circuit structure particularly just can't have been realized in several situations below running into:
1, at the surface structure after the encapsulation specific (special) requirements is arranged, requirement can only be seen luminous point, does not wish to see peripheral cell and integrated circuit;
2, on some special base material, luminescence unit is installed, between unit and the base material, can only be pasted, can not adopt scolding tin to weld by conducting resinl;
3, unit and unit require to be connected simple, and the conductive layer above the base material can only connect up by individual layer, can not multilayer wiring, cross-line;
4 and luminous point have various shapes to require.
Summary of the invention
It is compact inadequately to the objective of the invention is to overcome in the prior art peripheral cell and each LED chip for driving, complex structure, can't mount the problem in the motherboard circuit as a whole, provide a kind of microminiaturization, integration, peripheral cell and chip and LED highly to gather, whole unit can be used as a surface mount elements, than the large-scale mass production of the easier realization of available circuit structure, and after mass production, can be as the integrated chip unit of a relatively inexpensive surface mount elements use.
For realizing above purpose, the present invention has taked following technical scheme: a kind of integrated chip unit, include circuit substrate, described circuit substrate comprises the top layer circuit layer and the bottom circuit layer of fitting at least mutually, on the top layer circuit layer, be provided with peripheral cell, on the top layer circuit layer, also be provided with the positive source, power cathode, the signal input utmost point and the signal output stage that are electrically connected with the bottom circuit layer, and the led chip that is electrically connected with positive source, the chip for driving that is electrically connected with power cathode, the signal input utmost point, signal output stage and led chip respectively; Also include transparent encapsulation blob of viscose, this encapsulation blob of viscose is located on the circuit substrate, and is covered on chip for driving and led chip or the entire circuit plate top layer.
Adopt transparent packaging plastic (generally adopting the reasonable silica gel of heat conductivility), packaging plastic is initially thick liquid state, can be modulated into different viscosityes according to actual conditions, can be by the configuration of two components, perhaps apply with external conditions such as high temperature, ultraviolet rays, adopt the mode of some glue (or reverse mould encapsulating) to be located on the circuit substrate, after after a while, get final product solidification forming, thereby can effectively protect chip for driving and led chip; Two electrodes are the positive-negative power utmost point up and down, help power supply power supply design like this, and particularly those can not be on the electric conducting material that applies the convenient like that design power supply of copper circuit board, the possibility of the reasonable power supply that provides.
Except above-mentioned some glue or the encapsulation of reverse mould encapsulating, can also adopt the form of box dam in conjunction with encapsulating.This form is, at least one box dam is set on the top layer circuit layer to be useful on peripheral cell and chip for driving, led chip is kept apart, in box dam, on the top layer circuit layer, be formed with the encapsulation groove, be perfused with transparent encapsulation blob of viscose in this encapsulation groove, this box dam also can also be sealed peripheral cell.Adopt this box dam to form encapsulation groove structural design, can be more convenient for die sinking and batch process, can make the cell density in the jigsaw that is composed of multiple units when producing in batches higher, it is sightless to make whole unit become a peripheral cell, the integral body of elementization, microminiaturization.
Described box dam comprises four first dividing plates that connect one, dividing plate binds on circuit substrate, wherein a pair of dividing plate is close to that peripheral cell is inboard to be provided with, and described encapsulation groove is formed between four first dividing plates on the circuit substrate, and chip for driving and led chip are in the encapsulation groove.
Four jiaos of ends at described circuit substrate vertically are provided with groove surface; Described box dam comprises and is arranged on the up and down second partition of both sides of circuit substrate surface, be connected with the top cover that hides on peripheral cell between the second partition, along the top cover inner side edge along to having flanging, this flanging is resisted against on the circuit substrate, described encapsulation groove is formed between the flanging and second partition on the circuit substrate, and chip for driving and led chip are in the encapsulation groove; Two ends at two second partitions are extended with backstay respectively downwards, and this backstay one side inwardly is provided with the arc convex surface corresponding with described groove surface, and backstay is against the groove surface setting.Be close to by backstay on four jiaos of end faces of circuit substrate, can effectively guarantee can not be offset after box dam is arranged on the circuit substrate, made things convenient for combining of box dam and circuit substrate, realized the accurate location fast and easily of box dam, guaranteed that packaging plastic can evenly be poured in the encapsulation groove smoothly.
Four jiaos of ends at described circuit substrate vertically are provided with groove surface; Described box dam comprise connect one, be arranged at surrounding, circuit substrate surface along four the 3rd last dividing plates, be connected with on relative therein a pair of the 3rd dividing plate and be close to the peripheral cell inboard and be arranged on the 4th dividing plate, above-mentioned peripheral cell is arranged between the 3rd dividing plate that the 4th dividing plate is adjacent, described encapsulation groove is formed between the 3rd dividing plate on the circuit substrate, that the 4th dividing plate is adjacent, and chip for driving and led chip are in the encapsulation groove; Be extended with backstay respectively downwards at four jiaos of ends of described box dam, this backstay one side inwardly is provided with the arc convex surface corresponding with described groove surface, and backstay is against the groove surface setting.
(conductive hole can be a through hole also to be provided with the conductive hole that top layer circuit layer and bottom circuit layer are communicated with on the circuit substrate, it also can be filler opening, also can adopt the mode of making conductive layer at the circuit board outward flange to realize the electrical connection of levels), these conductive holes have respectively, are arranged on the positive source conductive hole on the positive source and are arranged on power cathode conductive hole on the power cathode, are arranged on the signal input conductive hole that the signal input extremely goes up and are arranged on signal output conductive hole on the signal output stage.The outer connection connection function of top layer circuit layer is to be connected to the bottom circuit layer by conductive hole, and the bottom circuit layer is actually the effect of playing element paster pin, thus below also cite approvingly the pin layer.Being connected between unit and the unit, the pin layer by the bottom circuit is connected with motherboard circuit just, thereby realize being connected between unit and the unit, and then forms the entire circuit system.
Described circuit substrate is the single line structure, and last layer device connects by conductive hole guides to bottom pin layer to upper strata power positive cathode, inputoutput data line (also planting holding wire).Singal input electrode (or citing approvingly pin) and signal output electrode (or citing approvingly pin) are respectively one, as the pin of data-signal input and data-signal output.
Described circuit substrate is a double structure, and last layer device connects by conductive hole guides to bottom pin layer to upper strata power positive cathode, inputoutput data line (also planting holding wire).Singal input electrode (or citing approvingly pin) and signal output electrode (or citing approvingly pin) are respectively two, wherein a pair ofly be respectively data-signal input and data-signal output, another is exported being respectively clock signal or control signal input and clock signal or control signal.
Described circuit substrate is a three wire configuration, and last layer device connects by conductive hole guides to bottom pin layer to upper strata power positive cathode, inputoutput data line (also planting holding wire).Singal input electrode (or citing approvingly pin) and signal output electrode (or citing approvingly pin) are respectively three, first pair is respectively data-signal input and data-signal output, second pair is respectively clock signal input and clock signal output, and the 3rd pair is respectively control signal input and control signal output
The structure of the connecting line number between different chip units can adopt structure of the present invention; The outer port that draws between chip unit and the chip unit has several: 1, single line structure, and have only holding wire to realize being connected between unit and the unit, promptly claim data signal line (Data line).2, double structure has two holding wires to realize being connected between unit and the unit, and these two lines are respectively data signal line (Data lines), clock cable (Clock line) or control signal wire (Control line).3, three wire configuration has three holding wires to realize being connected between unit and the unit, and these three holding wires are respectively data signal line (Data lines), clock cable (Clock line), control signal wire (Control line).More than several unit port can to adopt the present invention to realize integrated.Particularly existing three LED drive IC also do not add the brightness correcting function, and control signal wire (Control line) just can be corrected control line as the brightness point by point of three drive IC in future and use.
The circuit substrate of described unit can be selected by wide region, can be pottery, metal, epoxy glass fiber plate etc.Can select different materials for use according to the different performance requirement.And the circuit substrate of chip unit part just can substitute and finish base portion by five metals die stamping and injection mold injection moulding in the LED production technology, LED consolidated brilliant routing and chip for driving is finished together because of brilliant routing.So just simplify manufacturing process, reduced cost.
Described led chip is solid brilliant on the positive source of circuit substrate top layer circuit layer, and chip for driving is solid brilliant on the power cathode of circuit substrate top layer circuit layer.Led chip and chip for driving are separately positioned on positive source and the power cathode, if avoided being arranged on the drawback that the insulated part of top layer circuit layer needs again routing to be electrically connected, if a plurality of led chips are arranged, then a plurality of led chips just in time can the common source positive pole, reduced the quantity of routing, realized the requirement of chip for driving base ground connection on the one hand, helped chip for driving on the other hand and heat is transmitted to whole base plate by the metal level that conducts electricity; Simultaneously, with the electric circuit metal conducting shell of positive-negative power, the occupancy mode that is designed to maximum area takies big as far as possible area, like this, help chip heat, reduce resistance to the bottom heat loss through conduction, increase supply current, again can shared dexterously both positive and negative polarity, reduced routing quantity; Ensured reliable connection and heat conduction, comprehensive heat conduction is considered, heat is distributed in the whole unit base plate equably, is transmitted on the substrate that connects below by the unit bottom connection electrode and finishes heat radiation.
The present invention compared with prior art, have following advantage: the present invention is by chip for driving, led chip, the integrated encapsulation of peripheral cell, can accomplish microminiaturization, integration, blocking, only be equivalent to the size of an element, and easier realization is produced in enormous quantities.
Description of drawings
Fig. 1 is integrated chip unit point glue of the present invention or reverse mould embedding schematic diagram ();
Fig. 2 is an integrated chip unit reverse mould embedding schematic diagram of the present invention (two);
Fig. 3 is integrated chip unit encapsulating structure of the present invention () decomposing schematic representation;
Fig. 4 is integrated chip unit encapsulating structure of the present invention () combination schematic diagram;
Fig. 5 is integrated chip unit encapsulating structure of the present invention (a two) decomposing schematic representation;
Fig. 6 is integrated chip unit encapsulating structure of the present invention (two) combination schematic diagram;
Fig. 7 is integrated chip unit encapsulating structure of the present invention (a three) decomposing schematic representation;
Fig. 8 is integrated chip unit encapsulating structure of the present invention (three) combination schematic diagram;
Fig. 9 is an integrated chip unit front view of the present invention;
Figure 10 is integrated chip unit rearview of the present invention (this is a single line structure pin);
Figure 11 is the integrated chip unit schematic diagram of double structure pin of the present invention;
Figure 12 is the integrated chip unit schematic diagram of three wire configuration pin of the present invention;
Description of reference numerals: 1-circuit substrate, 11-positive source, 12-power cathode, the 13-signal input utmost point, 14-signal output stage, 15-encapsulates groove, the 16-groove surface, 17-top layer circuit layer, 18-bottom circuit layer, the 2-peripheral cell, 3-chip for driving, 4-LED chip, the 5-box dam, 51-first dividing plate, 52-second partition, 53-top cover, the 54-flanging, the 55-backstay, the 551-arc convex surface, 6-encapsulates blob of viscose, 71-signal input conductive hole, 72-signal output conductive hole, 81-positive source conductive hole, 82-power cathode conductive hole.
Embodiment
Below in conjunction with the drawings and specific embodiments content of the present invention is described in further details.
Embodiment one:
See also illustrated in figures 1 and 2ly, a kind of integrated chip unit of present embodiment is that driving collector nude film and the LED nude film with the solid brilliant routing of needs is arranged on the circuit substrate, irritates to seal with transparent enclosure glue; Chip for driving, led chip like this, so peripheral cell just formed the integral structure of sealing, realized the microminiaturization of whole three all-colour LED illuminating circuits, integrated, integrated, surface mount elementsization.Its specific implementation structure is as follows:
Include circuit substrate 1, circuit substrate 1 comprises the top layer circuit layer 17 and the bottom circuit layer 18 of mutual applying, on top layer circuit layer 17, be welded with peripheral cell 2 near the outside, on top layer circuit layer 17, also be provided with the positive source 11, power cathode 12, the signal input utmost point 13 and the signal output stage 14 that are electrically connected with bottom circuit layer 18, and the led chip 4 that is electrically connected with positive source 11, the chip for driving 3 that is electrically connected with power cathode 12, the signal input utmost point 13, signal output stage 14 and led chip 4 respectively; Also include transparent encapsulation blob of viscose 6, as shown in Figure 1, these encapsulation blob of viscose 6 glue modes such as (or) reverse mould encapsulatings and are covered on chip for driving 3 and the led chip 4 on circuit substrate 1.The transparent enclosure blob of viscose 6 of present embodiment can be hemisphere, elliposoidal or the square bodily form, even abnormity.As shown in Figure 2, transparent enclosure blob of viscose 6 is the side's of using bodily form, and this need adopt the mode of reverse mould encapsulating.
Led chip 4 is solid brilliant on the positive source 11 of top layer circuit layer 17, and chip for driving 3 is solid brilliant on the power cathode 12 of top layer circuit layer 17.Its mode by routing is electrically connected with circuit board;
In the present embodiment, above-mentioned peripheral cell 2 is a left and right sides peripheral cell, and it is symmetricly set on the two ends of circuit substrate 1, and the circuit lead on the circuit substrate 1 is also for symmetrical structure designs, and is attractive in appearance tight, rational deployment.Also can be according to the different mining of peripheral cell number peripheral cell asymmetric distribution.
Also be provided with on the circuit substrate 1 18 that be communicated with top layer circuit layer 17 and bottom circuit layer, be arranged on the positive source conductive hole 81 on the positive source 11 and be arranged on power cathode conductive hole 82 on the power cathode 12, be arranged on the signal input conductive hole 71 on the signal input utmost point 13 and be arranged on signal output conductive hole 72 on the signal output stage 14.Positive source conductive hole 81 and power cathode conductive hole 82 are symmetrical arranged at the upper and lower side on circuit substrate 1 surface, and signal input conductive hole 71 and signal output conductive hole 72 are symmetrical set.On the mid portion of circuit substrate 1, also consolidate crystalline substance chip for driving 3 and the led chip 4 that is electrically connected with above-mentioned conductive hole arranged.
See also Fig. 9 and shown in Figure 10, present embodiment circuit substrate 1 is the single line structure, and signal input conductive hole 71 and signal output conductive hole 72 are respectively one, and it is data-signal input and data-signal output.
Embodiment two:
Top layer circuit layer 17 is provided with and is used for box dam 5 that peripheral cell 2 and chip for driving 3, led chip 4 are kept apart, is formed with encapsulation groove 15 in box dam 5, on the top layer circuit layer 17, is perfused with transparent encapsulation blob of viscose 6 in this encapsulation groove 15.Present embodiment and the foregoing description difference are, on circuit substrate 1, be provided with box dam 5, put glue encapsulation blob of viscose 6 again, see also Fig. 3 and shown in Figure 4, box dam 5 comprises four first dividing plates 51 that connect one, and dividing plate 51 binds on circuit substrate 1, and wherein a pair of dividing plate 51 is close to peripheral cell 2 inboard settings, on the circuit substrate 1, formed encapsulation groove 15 between four first dividing plates 51, chip for driving 3, led chip 4 are in the encapsulation groove 15.
See also shown in Figure 10ly, present embodiment circuit substrate 1 is the single line structure, and signal input conductive hole 71 and signal output conductive hole 72 are respectively one, and it is exported for data-signal input and data-signal.A plurality of unit connect the paster module that can form assembly unit.
On the medium that chip unit can be applied to be not easy to mount as a complete surface mount elements, as, transparent glass, pottery etc.If do not adopt the structure of element circuit elementization may not be mounted on these media.
Profile after the integrated chip unit encapsulation of present embodiment can be polygon (rectangle, square, interior quadrangle, a honeycomb hexagon etc.), circular arc (just round, ellipse, the square combination of arc etc.).
Embodiment three:
See also Fig. 5 and shown in Figure 6, vertically be provided with groove surface 16 in four jiaos of ends of circuit substrate 1; Box dam 5 comprises and is arranged on the circuit substrate 1 surface second partition 52 of both sides up and down, be connected with the top cover 53 that hides on peripheral cell 2 between the second partition 52, along top cover 53 inner side edges along to having flanging 54, this flanging 54 is resisted against on the circuit substrate 1, on the circuit substrate 1, formed encapsulation groove 15 between flanging 54 and the second partition 52, chip for driving 3, led chip 4 all are in the encapsulation groove 15; Two ends at two second partitions 52 are extended with backstay 55 respectively downwards, and this backstay 55 one side inwardly is provided with the arc convex surface 551 corresponding with groove surface 16, and backstay 55 is provided with against groove surface 16.
See also shown in Figure 11, present embodiment circuit substrate 1 is a double structure, signal input conductive hole 71 and signal output conductive hole 72 are respectively two, and symmetrical being arranged on the circuit substrate 1, input of wherein a pair of data-signal respectively and data-signal output, another is to being respectively the output of clock or control signal input and clock or control signal.A plurality of unit connect the paster module that can form assembly unit.
Other structures of present embodiment are identical with embodiment one, are not described in detail in this.
Embodiment four:
See also Fig. 7 and shown in Figure 8, vertically be provided with groove surface 16 in four jiaos of ends of circuit substrate 1; Box dam 5 comprise connect one, be arranged at circuit substrate 1 surperficial surrounding along four the 3rd last dividing plates 56, be connected with on relative therein a pair of the 3rd dividing plate 56 and be close to peripheral cell 2 inboards and be arranged on the 4th dividing plate 57, above-mentioned peripheral cell 2 is arranged between the 3rd dividing plate 56 that the 4th dividing plate 57 is adjacent, on the circuit substrate 1, be formed with encapsulation groove 15 between the 3rd dividing plate 56 that is adjacent of the 4th dividing plate 57, chip for driving 3, led chip 4 are in the encapsulation groove 15; Be extended with backstay 55 respectively downwards at 5 four jiaos of ends of box dam, this backstay 55 one side inwardly is provided with the arc convex surface 551 corresponding with groove surface 16, and backstay 55 is provided with against groove surface 16.
See also shown in Figure 12, present embodiment circuit substrate 1 is a three wire configuration, signal input conductive hole 13 and signal output conductive hole 14 are respectively three, and symmetrical being arranged on the circuit substrate 1, first pair is respectively data-signal input and data-signal output, second pair is respectively clock signal input and clock signal output, and the 3rd pair is respectively control signal input and control signal output.A plurality of unit connect the paster module that can form assembly unit.
Other structures of present embodiment are identical with embodiment one, are not described in detail in this.
Above-listed detailed description is at the specifying of possible embodiments of the present invention, and this embodiment is not in order to limiting claim of the present invention, and the equivalence that all the present invention of disengaging do is implemented or change, all should be contained in the claim of this case.
Claims (10)
1. integrated chip unit, include circuit substrate (1), it is characterized in that: described circuit substrate (1) comprises the top layer circuit layer (17) and the bottom circuit layer (18) of fitting at least mutually, on top layer circuit layer (17), be provided with peripheral cell (2), on top layer circuit layer (17), also be provided with the positive source (11) that is electrically connected with bottom circuit layer (18), power cathode (12), the signal input utmost point (13) and signal output stage (14), and the led chip (4) that is electrically connected with positive source (11), respectively with power cathode (12), the signal input utmost point (13), the chip for driving (3) that signal output stage (14) and led chip (4) are electrically connected; Also include transparent encapsulation blob of viscose (6), this encapsulation blob of viscose (6) is located on the circuit substrate (1), and is covered on chip for driving (3) and the led chip (4).
2. integrated chip unit as claimed in claim 1, it is characterized in that: top layer circuit layer (17) is provided with and is used for box dam (5) that peripheral cell (2) and chip for driving (3), led chip (4) are kept apart, in box dam (5), on the top layer circuit layer (17), be formed with encapsulation groove (15), in this encapsulation groove (15), be perfused with transparent encapsulation blob of viscose (6).
3. integrated chip unit as claimed in claim 2, it is characterized in that: described box dam (5) comprises four first dividing plates (51) that connect one, dividing plate (51) binds on circuit substrate (1), wherein a pair of dividing plate (51) is close to the inboard setting of peripheral cell (2), described encapsulation groove (15) is formed between four first dividing plates (51) on the circuit substrate (1), and chip for driving (3) and led chip (4) are in the encapsulation groove (15).
4. integrated chip unit as claimed in claim 2 is characterized in that: four jiaos of ends at described circuit substrate (1) vertically are provided with groove surface (16); Described box dam (5) comprises and is arranged on circuit substrate (1) the surface second partition (52) of both sides up and down, be connected with the top cover (53) that hides on peripheral cell (2) between the second partition (52), along top cover (53) inner side edge along to having flanging (54), this flanging (54) is resisted against on the circuit substrate (1), described encapsulation groove (15) is formed between the flanging (54) and second partition (52) on the circuit substrate (1), and chip for driving (3) and led chip (4) are in the encapsulation groove (15); Two ends at two second partitions (52) are extended with backstay (55) respectively downwards, and this backstay (55) one side inwardly is provided with the arc convex surface (551) corresponding with described groove surface (16), and backstay (55) is provided with against groove surface (16).
5. integrated chip unit as claimed in claim 2 is characterized in that: four jiaos of ends at described circuit substrate (1) vertically are provided with groove surface (16); Described box dam (5) comprise connect one, be arranged at the surperficial surrounding of circuit substrate (1) along last four the 3rd dividing plates (56), be connected with on relative therein a pair of the 3rd dividing plate (56) and be close to peripheral cell (2) inboard and be arranged on the 4th dividing plate (57), above-mentioned peripheral cell (2) is arranged between the 3rd dividing plate (56) that the 4th dividing plate (57) is adjacent, described encapsulation groove (15) is formed between the 3rd dividing plate (56) on the circuit substrate (1), that the 4th dividing plate (57) is adjacent, and chip for driving (3) and led chip (4) are in the encapsulation groove (15); Be extended with backstay (55) respectively downwards at (5) four jiaos of ends of described box dam, this backstay (55) one side inwardly is provided with the arc convex surface (551) corresponding with described groove surface (16), and backstay (55) is provided with against groove surface (16).
6. integrated chip unit as claimed in claim 1 is characterized in that: also be provided with on the circuit substrate (1) top layer circuit layer (17) and bottom circuit layer (18) are communicated with, be arranged on the positive source conductive hole (81) on the positive source (11) and be arranged on power cathode conductive hole (82) on the power cathode (12), be arranged on the signal input conductive hole (71) on the signal input utmost point (13) and the signal that is arranged on the signal output stage (14) is exported conductive hole (72).
7. integrated chip unit as claimed in claim 6 is characterized in that: described circuit substrate (1) is the single line structure, and signal input conductive hole (71) and signal output conductive hole (72) are respectively one, and it is data-signal input and data-signal output.
8. integrated chip unit as claimed in claim 6, it is characterized in that: described circuit substrate (1) is a double structure, signal input conductive hole (71) and signal output conductive hole (72) are respectively two, input of wherein a pair of data-signal respectively and data-signal output, another is to being respectively the output of clock or control signal input and clock or control signal.
9. integrated chip unit as claimed in claim 6, it is characterized in that: described circuit substrate (1) is three wire configuration, signal input conductive hole (71) and signal output conductive hole (14) are respectively three, first pair is respectively data-signal input and data-signal output, second pair is respectively clock signal input and clock signal output, and the 3rd pair is respectively control signal input and control signal output.
10. integrated chip unit as claimed in claim 1 is characterized in that: described circuit substrate (1) can be pottery, metal, epoxy glass fiber plate; Described led chip (4) is solid brilliant on the positive source (11) of top layer circuit layer (17), and chip for driving (3) is solid brilliant on the power cathode (12) of top layer circuit layer (17).
Priority Applications (3)
| Application Number | Priority Date | Filing Date | Title |
|---|---|---|---|
| CN 201010157015 CN101877350A (en) | 2010-04-20 | 2010-04-20 | Integrated chip unit |
| CN 201110098303 CN102208518B (en) | 2010-04-20 | 2011-04-19 | Integrated patch unit |
| PCT/CN2011/073043 WO2011131125A1 (en) | 2010-04-20 | 2011-04-20 | Integrated patch unit |
Applications Claiming Priority (1)
| Application Number | Priority Date | Filing Date | Title |
|---|---|---|---|
| CN 201010157015 CN101877350A (en) | 2010-04-20 | 2010-04-20 | Integrated chip unit |
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| CN101877350A true CN101877350A (en) | 2010-11-03 |
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|---|---|---|---|
| CN 201010157015 Pending CN101877350A (en) | 2010-04-20 | 2010-04-20 | Integrated chip unit |
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| CN102208518A (en) * | 2010-04-20 | 2011-10-05 | 蒋伟东 | Integrated patch unit |
| CN102467853A (en) * | 2010-11-08 | 2012-05-23 | 蒋伟东 | Transparent glass curtain wall screen |
| CN102723325A (en) * | 2012-06-08 | 2012-10-10 | 深圳市聚智德科技有限公司 | LED (Light-Emitting Diode) light-emitting element |
| CN103000622A (en) * | 2012-12-11 | 2013-03-27 | 广东威创视讯科技股份有限公司 | Structure and method for packaging light-emitting diodes |
| CN103327671A (en) * | 2012-03-19 | 2013-09-25 | 黄如金 | PCB of LED lamp |
| CN104106122A (en) * | 2011-12-14 | 2014-10-15 | 万斯创新公司 | Light emitting system |
| CN108541108A (en) * | 2018-05-10 | 2018-09-14 | 厦门强力巨彩光电科技有限公司 | A kind of LED lamp bead encapsulating structure and LED display |
| CN108882670A (en) * | 2018-08-31 | 2018-11-23 | 广东立迪智能科技有限公司 | A kind of Full-automatic spot gluing chip mounter |
| CN109064913A (en) * | 2017-07-19 | 2018-12-21 | 广州超维光电科技有限责任公司 | Embedded integrated form row unit based on class stage structure |
| CN109827088A (en) * | 2019-03-06 | 2019-05-31 | 深圳市山墨电子有限公司 | Integral type standard sources and headlamp |
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