CN101859700A - Polycrystalline silicon deposition process - Google Patents
Polycrystalline silicon deposition process Download PDFInfo
- Publication number
- CN101859700A CN101859700A CN200910049075A CN200910049075A CN101859700A CN 101859700 A CN101859700 A CN 101859700A CN 200910049075 A CN200910049075 A CN 200910049075A CN 200910049075 A CN200910049075 A CN 200910049075A CN 101859700 A CN101859700 A CN 101859700A
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- Prior art keywords
- polycrystalline silicon
- etching
- polysilicon
- hole
- holes
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- 229910021420 polycrystalline silicon Inorganic materials 0.000 title claims abstract description 70
- 238000005137 deposition process Methods 0.000 title claims abstract description 16
- 238000005530 etching Methods 0.000 claims abstract description 43
- 238000000034 method Methods 0.000 claims abstract description 30
- 229920005591 polysilicon Polymers 0.000 claims description 40
- 239000007789 gas Substances 0.000 claims description 16
- UFHFLCQGNIYNRP-UHFFFAOYSA-N Hydrogen Chemical compound [H][H] UFHFLCQGNIYNRP-UHFFFAOYSA-N 0.000 claims description 10
- 239000001257 hydrogen Substances 0.000 claims description 10
- 229910052739 hydrogen Inorganic materials 0.000 claims description 10
- 238000010926 purge Methods 0.000 claims description 6
- 239000000126 substance Substances 0.000 claims description 6
- VEXZGXHMUGYJMC-UHFFFAOYSA-N Hydrochloric acid Chemical compound Cl VEXZGXHMUGYJMC-UHFFFAOYSA-N 0.000 claims description 4
- BLRPTPMANUNPDV-UHFFFAOYSA-N Silane Chemical compound [SiH4] BLRPTPMANUNPDV-UHFFFAOYSA-N 0.000 claims description 4
- XUIMIQQOPSSXEZ-UHFFFAOYSA-N Silicon Chemical compound [Si] XUIMIQQOPSSXEZ-UHFFFAOYSA-N 0.000 claims description 4
- 229910000041 hydrogen chloride Inorganic materials 0.000 claims description 4
- IXCSERBJSXMMFS-UHFFFAOYSA-N hydrogen chloride Substances Cl.Cl IXCSERBJSXMMFS-UHFFFAOYSA-N 0.000 claims description 4
- 229910000077 silane Inorganic materials 0.000 claims description 4
- 229910052710 silicon Inorganic materials 0.000 claims description 4
- 239000010703 silicon Substances 0.000 claims description 4
- 238000000151 deposition Methods 0.000 abstract 1
- 230000000630 rising effect Effects 0.000 abstract 1
- 230000004087 circulation Effects 0.000 description 3
- 239000013078 crystal Substances 0.000 description 2
- 238000010586 diagram Methods 0.000 description 2
- 238000004519 manufacturing process Methods 0.000 description 2
- 239000004065 semiconductor Substances 0.000 description 2
- 238000012986 modification Methods 0.000 description 1
- 230000004048 modification Effects 0.000 description 1
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Abstract
The invention discloses a polycrystalline silicon deposition process which is used for filling holes with high aspect ratio. The process comprises a plurality of process cycles, and each process cycle comprises the following steps of: depositing polycrystalline silicon with a preset thickness in holes with the high aspect ratio at low temperature, wherein the growth rate of the polycrystalline silicon at the mouths of the holes is greater than that of the polycrystalline silicon at the bottoms of the holes; rising temperature and meanwhile introducing etching gas to etch the polycrystalline silicon in the holes with the high aspect ratio at high temperature, wherein the etching rate of the polycrystalline silicon at the mouths of the holes is greater than that of the polycrystalline silicon at the bottoms of the holes, and the thickness of the etched polycrystalline silicon at the bottoms of the holes is greater than that of the polycrystalline silicon at the mouths of the holes; and reducing the temperature to low temperature, and repeating the process cycles for several times until the holes with the high aspect ratio are filled. The invention adopts the technical scheme of the invention can ensure that the bottoms of the holes are sufficiently filled through repeated filling and etching cycles.
Description
Technical field
The present invention relates to semiconductor fabrication process, more particularly, relate to a kind of polycrystalline silicon deposition process.
Background technology
The deposit polysilicon is an important step in the semiconductor fabrication process in the hole, and polysilicon gets performance during filling extent has directly determined to the hole.Polysilicon should have following feature for the good filling in hole: do not have space or space very little after fill in the hole.
For hole, there is not very little some difficulty in space or space after accomplishing to fill with high-aspect-ratio.Because in the process of filling, owing to the effect of bounce-back, sputter or the like, the speed of growth of the polysilicon in aperture can be greater than the bottom, often under the situation about being closed in the aperture, filling is not also finished in the inside in hole, so, will form the space and influence the performance of device.
This situation is especially common in the hole of the high-aspect-ratio more than 4: 1.So, need a kind of can finishing in high quality to carry out the technology that polysilicon is filled for the hole of high-aspect-ratio.
Summary of the invention
The present invention has disclosed a kind of technology that can finish well for the polysilicon filling in the hole with high-aspect-ratio.
According to an aspect of the present invention, proposed a kind of polycrystalline silicon deposition process, be used to fill the hole with high-aspect-ratio, this technology comprises:
Several process cycles, each process cycles comprises:
The polysilicon of deposit predetermined thickness in having the hole of high-aspect-ratio, deposit is carried out at low temperatures, and the polycrystalline silicon growth speed in aperture is greater than the polycrystalline silicon growth speed of bottom, hole;
Elevated temperature is also gone into etching gas together, polysilicon in the hole of high-aspect-ratio is carried out etching, etching is at high temperature carried out, and the etching polysilicon speed in aperture is greater than the etching polysilicon speed of hole bottom, and the polysilicon thickness of etching metapore bottom is greater than the polysilicon thickness in aperture;
Reduce temperature to low temperature;
Repeating for several times, process cycles is filled until the hole with high-aspect-ratio.
In one embodiment, in the process of deposit polysilicon, use hydrogen as carrying gas, silane is as silicon source gas.
In one embodiment, etching gas is a hydrogen chloride.
In one embodiment, in each process cycles, reduce temperature and to low temperature, also comprise with the hydrogen purge hole to remove the accessory substance that etching produces.
Above-mentioned polycrystalline silicon deposition process is particularly suitable for epitaxial device.
Adopt technical scheme of the present invention, by repetitious filling, etching circulation, the bottom of guaranteeing the hole can access sufficient filling, and, using hydrogen to purge after the etching each time, can effectively remove accessory substance and prevent that oxide layer from producing, thereby obtain high-quality filling effect.
Description of drawings
The above and other features of the present invention, character and advantage will become more obvious by the description below in conjunction with drawings and Examples, in the accompanying drawings, identical Reference numeral is represented identical feature all the time, wherein:
Fig. 1 has disclosed the schematic diagram of the technical process of polycrystalline silicon deposition process according to an embodiment of the invention.
Embodiment
The present invention has disclosed a kind of technology that can finish well for the polysilicon filling in the hole with high-aspect-ratio.This polycrystalline silicon deposition process is used to fill the hole with high-aspect-ratio, and this technology comprises:
Several process cycles, each process cycles comprises:
The polysilicon of deposit predetermined thickness in having the hole of high-aspect-ratio, deposit is carried out at low temperatures, and the polycrystalline silicon growth speed in aperture is greater than the polycrystalline silicon growth speed of bottom, hole;
Elevated temperature is also gone into etching gas together, polysilicon in the hole of high-aspect-ratio is carried out etching, etching is at high temperature carried out, and the etching polysilicon speed in aperture is greater than the etching polysilicon speed of hole bottom, and the polysilicon thickness of etching metapore bottom is greater than the polysilicon thickness in aperture;
Reduce temperature to low temperature;
Repeating for several times, process cycles is filled until the hole with high-aspect-ratio.
In one embodiment, in the process of deposit polysilicon, use hydrogen as carrying gas, silane is as silicon source gas.
In one embodiment, etching gas is a hydrogen chloride.
In one embodiment, in each process cycles, reduce temperature and to low temperature, also comprise with the hydrogen purge hole to remove the accessory substance that etching produces.
Above-mentioned polycrystalline silicon deposition process is particularly suitable for epitaxial device.
With reference to shown in Figure 1, Fig. 1 has disclosed the schematic diagram of the technical process of polycrystalline silicon deposition process according to an embodiment of the invention.
At first, with reference to shown in wherein (a), the certain thickness polysilicon of deposit at low temperatures, the growth rate in aperture is greater than the growth rate of bottom, and the thickness of polysilicon is greater than bottom polysilicon thickness near the aperture.So the polysilicon of deposit forms the tubaeform of downward expansion in the hole.In the process of deposit, can adopt hydrogen as carrying gas, silane is as silicon source gas.
With reference to shown in wherein (b), feed etching gas behind the elevated temperature polysilicon is carried out etching, etching is at high temperature carried out, and the etching polysilicon speed in aperture is greater than the etching polysilicon speed of hole bottom, and the polysilicon thickness of etching metapore bottom is greater than the polysilicon thickness in aperture.After etching, polysilicon forms the tubaeform of upwards expansion.In etching process, adopt hydrogen chloride as etching gas.
After finishing etching, once more temperature is reduced to low temperature, promptly be suitable for the temperature of polysilicon deposit, and use the hydrogen purge certain hour, remove the accessory substance that etching generates, and prevent that oxide layer from occurring.So just finished a process cycles.
With reference to wherein (c) with (d), repeat the above-mentioned deposit and the process of etching, relatively (a) and (b) and (c), (d) can find, after each process cycles is finished, the bottom in hole is just filled fully, and a back process cycles can be regarded as on the hole of " more shallow " carries out.
After several circulations, can obtain the effect shown in (e) so repeatedly, promptly the inside in hole is filled fully.
The technology that this polysilicon is filled can better solve the filling in the hole of high-aspect-ratio, can finish the filling of 4: 1 above high-aspect-ratios.On 4: 1 technology of depth-to-width ratio, test, fill finely in crystal circle center, do not have the slit; At crystal round fringes, there is very little slit, meet the device performance demands fully.
Adopt technical scheme of the present invention, by repetitious filling, etching circulation, the bottom of guaranteeing the hole can access sufficient filling, and, using hydrogen to purge after the etching each time, can effectively remove accessory substance and prevent that oxide layer from producing, thereby obtain high-quality filling effect.
The foregoing description provides to being familiar with the person in the art and realizes or use of the present invention; those skilled in the art can be under the situation that does not break away from invention thought of the present invention; the foregoing description is made various modifications or variation; thereby protection scope of the present invention do not limit by the foregoing description, and should be the maximum magnitude that meets the inventive features that claims mention.
Claims (5)
1. a polycrystalline silicon deposition process is characterized in that, is used to fill the hole with high-aspect-ratio, and described technology comprises:
Several process cycles, each process cycles comprises:
The polysilicon of deposit predetermined thickness in having the hole of high-aspect-ratio, described deposit is carried out at low temperatures, and the polycrystalline silicon growth speed in aperture is greater than the polycrystalline silicon growth speed of bottom, hole;
Elevated temperature is also gone into etching gas together, polysilicon in the hole of high-aspect-ratio is carried out etching, described etching is at high temperature carried out, and the etching polysilicon speed in aperture is greater than the etching polysilicon speed of hole bottom, and the polysilicon thickness of etching metapore bottom is greater than the polysilicon thickness in aperture;
Reduce temperature to low temperature;
Repeating for several times, described process cycles is filled until described hole with high-aspect-ratio.
2. polycrystalline silicon deposition process as claimed in claim 1 is characterized in that, in the process of deposit polysilicon, uses hydrogen as carrying gas, and silane is as silicon source gas.
3. polycrystalline silicon deposition process as claimed in claim 1 is characterized in that described etching gas is a hydrogen chloride.
4. polycrystalline silicon deposition process as claimed in claim 1 is characterized in that, in described each process cycles, reduces temperature and also comprises with the described hole of hydrogen purge to remove the accessory substance that etching produces to low temperature.
5. polycrystalline silicon deposition process as claimed in claim 1 is characterized in that described polycrystalline silicon deposition process is applied to epitaxial device.
Priority Applications (1)
| Application Number | Priority Date | Filing Date | Title |
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| CN2009100490758A CN101859700B (en) | 2009-04-09 | 2009-04-09 | Polycrystalline silicon deposition process |
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| Application Number | Priority Date | Filing Date | Title |
|---|---|---|---|
| CN2009100490758A CN101859700B (en) | 2009-04-09 | 2009-04-09 | Polycrystalline silicon deposition process |
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|---|---|
| CN101859700A true CN101859700A (en) | 2010-10-13 |
| CN101859700B CN101859700B (en) | 2012-05-30 |
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| CN103456634A (en) * | 2012-06-04 | 2013-12-18 | 中芯国际集成电路制造(上海)有限公司 | Manufacturing method for semiconductor device |
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| CN109742026A (en) * | 2019-02-25 | 2019-05-10 | 哈尔滨工业大学 | The method that direct growth method prepares diamond auxiliary heat dissipation silicon carbide substrate GaN-HEMTs |
| CN109817637A (en) * | 2017-11-22 | 2019-05-28 | 旺宏电子股份有限公司 | Semiconductor structure and its manufacturing method for three-dimensional storage element |
Family Cites Families (9)
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| US6291298B1 (en) * | 1999-05-25 | 2001-09-18 | Advanced Analogic Technologies, Inc. | Process of manufacturing Trench gate semiconductor device having gate oxide layer with multiple thicknesses |
| CN100349283C (en) * | 2002-07-03 | 2007-11-14 | 旺宏电子股份有限公司 | Method for promoting performance of flash memory by using microcrystalline silicon film as floating gate |
| US7078312B1 (en) * | 2003-09-02 | 2006-07-18 | Novellus Systems, Inc. | Method for controlling etch process repeatability |
| US7163896B1 (en) * | 2003-12-10 | 2007-01-16 | Novellus Systems, Inc. | Biased H2 etch process in deposition-etch-deposition gap fill |
| US7109097B2 (en) * | 2004-12-14 | 2006-09-19 | Applied Materials, Inc. | Process sequence for doped silicon fill of deep trenches |
| KR100607351B1 (en) * | 2005-03-10 | 2006-07-28 | 주식회사 하이닉스반도체 | Method for fabricating flash memory device |
| KR100752178B1 (en) * | 2005-08-12 | 2007-08-24 | 동부일렉트로닉스 주식회사 | Method for Forming Trench Isolation Layer |
| CN1979796A (en) * | 2005-12-05 | 2007-06-13 | 中芯国际集成电路制造(上海)有限公司 | Method with high seam-filling ability and device structure obtained therefrom |
| CN100499066C (en) * | 2006-12-05 | 2009-06-10 | 中芯国际集成电路制造(上海)有限公司 | Oxide deposition method of shallow groove isolation region |
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2009
- 2009-04-09 CN CN2009100490758A patent/CN101859700B/en active Active
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| CN103515214A (en) * | 2012-06-25 | 2014-01-15 | 中芯国际集成电路制造(上海)有限公司 | Manufacturing method of semiconductor device |
| CN103871880A (en) * | 2012-12-13 | 2014-06-18 | 中芯国际集成电路制造(上海)有限公司 | Shallow slot isolation structure manufacturing method |
| CN103050389A (en) * | 2012-12-14 | 2013-04-17 | 上海华虹Nec电子有限公司 | Growing method of low-stress IGBT (Insulated Gate Bipolar Transistor) groove type grid electrode |
| CN106158967A (en) * | 2015-05-15 | 2016-11-23 | 台湾积体电路制造股份有限公司 | Semiconductor devices and manufacture method thereof |
| CN106158967B (en) * | 2015-05-15 | 2020-09-01 | 台湾积体电路制造股份有限公司 | Semiconductor device and method for manufacturing the same |
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| CN109817637A (en) * | 2017-11-22 | 2019-05-28 | 旺宏电子股份有限公司 | Semiconductor structure and its manufacturing method for three-dimensional storage element |
| CN109817637B (en) * | 2017-11-22 | 2020-10-09 | 旺宏电子股份有限公司 | Semiconductor structure for three-dimensional memory element and manufacturing method thereof |
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| CN101859700B (en) | 2012-05-30 |
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Address after: 200233, No. 385 Rainbow Road, Shanghai, Xuhui District Patentee after: SHANGHAI ADVANCED SEMICONDUCTO Address before: 200233, 385 Rainbow Road, Shanghai Patentee before: ADVANCED SEMICONDUCTOR MANUFACTURING Co.,Ltd. |
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Effective date of registration: 20210425 Address after: 200120 No.600 Yunshui Road, Pudong New Area, Shanghai Patentee after: GTA Semiconductor Co.,Ltd. Address before: 200233, No. 385 Rainbow Road, Shanghai, Xuhui District Patentee before: SHANGHAI ADVANCED SEMICONDUCTO |
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