CN101847992A - Frequency synthesis system for enhancing spectrum purity of direct digital frequency synthesizer - Google Patents

Frequency synthesis system for enhancing spectrum purity of direct digital frequency synthesizer Download PDF

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Publication number
CN101847992A
CN101847992A CN200910264176A CN200910264176A CN101847992A CN 101847992 A CN101847992 A CN 101847992A CN 200910264176 A CN200910264176 A CN 200910264176A CN 200910264176 A CN200910264176 A CN 200910264176A CN 101847992 A CN101847992 A CN 101847992A
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direct digital
frequency
signal input
signal
signal output
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叶丰萍
张明珠
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NANJING GLARUN-ATTEN TECHNOLOGY Co Ltd
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NANJING GLARUN-ATTEN TECHNOLOGY Co Ltd
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Abstract

The invention relates to a frequency synthesis system for enhancing spectrum purity of a direct digital frequency synthesizer, which comprises a crystal oscillator, a phase-locked loop module (PLL), a direct digital frequency synthesis module (DDS), a filter module and a central processing unit, wherein the system uses the phase-locked loop module (PLL) to provide a variable clock for the direct digital frequency synthesis module (DDS), and the clock frequency of the variable clock provided by the phase-locked loop module (PLL) is an integral multiple of the frequency of the output signal. By changing the clock frequency of the direct digital frequency synthesizer, the noise generated in the quantization process is minimized, thereby improving the stray indexes of the output signal and enhancing the spectrum purity of the output signal.

Description

Improve the frequency synthesizer system of Direct Digital Synthesizer spectral purity
Technical field
The present invention relates to a kind of system of brand-new raising Direct Digital Synthesizer spectral purity, especially have the extremely frequency synthesizer system of wide application prospect at military affairs, communication and instrument industry, specifically improve the frequency synthesizer system of Direct Digital Synthesizer spectral purity.
Background technology
Direct Digital Synthesizer is one of the most frequently used baseband signal generator in Modern wireless communication and radar and electronic countermeasures field, but because it adopts digital frequency synthesis mode, the noise that produces in digital quantization and the sampling process can't be eliminated fully, has influenced its use to a great extent.At present, the Direct Digital Synthesizer of being produced by ADI company is one of Direct Digital Synthesizer DDS chip the most commonly used, but the best spuious inhibition degree that it can reach below nyquist frequency is also less than 50dB, this can influence to a great extent with it is the system index of the broadband frequency synthesizer of core, therefore, in to spuious index request higher system, can only choose the higher segment signal of spuious index in the DDS output signal earlier, carry out frequency expansion by methods such as frequency conversions again.The signal bandwidth that one section spuious inhibition degree that can take out in the DDS output signal usually is higher than 60dB can not be higher than 50MHz, this just means a plurality of frequency expansion modules that will use in the synthetic process of broadband signal, when taking time and effort, because the influence of factors such as the intermodulation that in the process of frequency expansion, produces, the interference between the adjacent channel, local-oscillator leakage, Harmonic Interference, the spuious inhibition degree of signal that causes exporting after the frequency expansion also will be lower than 60dB, is unfavorable for very much the raising of properties of product.With the technical force of present stage, the broadband spurious performance that wants to improve from the design of DDS itself it is infeasible, and therefore, prior art can't obtain more high performance frequency synthesizer system, can not satisfy the use needs.
Summary of the invention
The objective of the invention is to improve its performance from the design of itself at existing frequency synthesizer system, the spuious inhibition degree of the signal of exporting after the frequency expansion is low, the problem that cost is high, propose a kind ofly can improve Direct Digital Synthesizer output signal frequency purity, need not to improve the frequency synthesizer system that sample frequency just can realize the raising Direct Digital Synthesizer spectral purity that high-quality signal is synthetic.
Technical scheme of the present invention is:
A kind of frequency synthesizer system that improves the Direct Digital Synthesizer spectral purity, it comprises crystal oscillator OSC, phase-locked loop module PLL, Direct Digital formula frequency synthesis module DDS, filtration module and CPU, described crystal oscillator OSC provides system clock for frequency synthesizer system, the signal output part of crystal oscillator OSC links to each other with the reference clock signal input of phase-locked loop module PLL, the variable clock signal output of phase-locked loop module PLL is connected with the variable clock signal input of Direct Digital formula frequency synthesis module DDS, the signal input end of Direct Digital formula frequency synthesis module DDS and phase-locked loop module PLL is connected with each self-corresponding control signal output ends of CPU respectively, the output of the signal of Direct Digital formula frequency synthesis module DDS by after the filtration module filtering as the output radiofrequency signal of frequency synthesizer system.
Phase-locked loop module PLL of the present invention comprises phase frequency detector PFD, frequency divider X2, loop filter LoopFilter, voltage controlled oscillator X1, coupler COUP1, the radio frequency amplifier AMP4 and the first band pass filter BPF1, the signal input part of described phase frequency detector PFD links to each other with the signal output part of crystal oscillator OSC1 as the input of phase-locked loop module PLL, another signal input part of phase frequency detector PFD is connected with the signal output part of frequency divider X2, the signal input part that the signal output part of phase frequency detector PFD is corresponding with loop filter LoopFilter connects, the signal output part of loop filter LoopFilter is connected with the signal input part of voltage controlled oscillator X1, the signal output part of voltage controlled oscillator X1 is connected with the signal input part of coupler COUP1, the coupled end of coupler COUP1 is connected with the signal input part of frequency divider X2, the signal output part of coupler COUP1 is connected with the signal input part of radio frequency amplifier AMP4, the signal output part of radio frequency amplifier AMP4 is connected with the signal input part of the first band pass filter BPF1, and the signal output part of the first band pass filter BPF1 links to each other with the signal input part of Direct Digital formula frequency synthesis module DDS as the output of phase-locked loop module PLL.
Loop filter of the present invention comprises resistance R 1, R5, R9, R10, RR1 and RR2, capacitor C 1, C6, C7 and C8; The described first band pass filter BPF1 comprises inductance L 1-L7, capacitor C 11, C2-C5, C9 and C10.
Direct Digital formula frequency synthesis module DDS of the present invention comprises single-ended transfer difference circuit SDC, Direct Digital Synthesizer and difference are changeed single-end circuit DSC, the signal input part of single-ended transfer difference circuit SDC is exported promptly as the input of Direct Digital formula frequency synthesis module DDS with the signal of phase-locked loop module PLL, and the signal output part of the first band pass filter BPF1 is connected, the signal output part of single-ended transfer difference circuit SDC is connected with the signal input part of Direct Digital Synthesizer, the signal output part of Direct Digital Synthesizer is connected with the respective signal input that difference is changeed single-end circuit DSC, and the signal output part of difference commentaries on classics single-end circuit DSC is connected with the respective signal input of filtration module as the output of Direct Digital formula frequency synthesis module DDS.
Single-ended transfer difference circuit SDC of the present invention comprises transformer TF1, resistance R 11, capacitor C 27 and C28; Described difference is changeed single-end circuit DSC and is comprised transformer TF2, resistance R 12 and R13.
Filtration module of the present invention comprises the second band pass filter BPF2 and low-cut filter BSF, the signal input part of the described second band pass filter BPF2 is connected with the signal output part of Direct Digital formula frequency synthesis module DDS as the input of filtration module, the signal output part of the second band pass filter BPF2 is connected with the respective signal input of low-cut filter BSF, and the signal output part of low-cut filter BSF is the output output radiofrequency signal of frequency synthesizer system as the output of filtration module.
The second band pass filter BPF2 of the present invention comprises capacitor C 12-C21 and inductance L 8-L17; Low-cut filter BSF comprises capacitor C 22-C26 and inductance L 18-L22.
Beneficial effect of the present invention:
The spuious main source of Direct Digital Synthesizer of the present invention is exactly the noise that digital quantization produces, this system proposed by the invention is exactly by changing the clock frequency of Direct Digital Synthesizer, make the noise minimum that produces in the quantizing process, thereby improve its stray indexes.
Among the present invention with a high stability, hang down and make an uproar constant-temperature crystal oscillator mutually as system clock, low spuious with one, hang down and make an uproar mutually, high-resolution, the phase-locked loop module PLL of high stability is as the V-CLK of Direct Digital Synthesizer, with a filter its output signal is carried out filtering, can export the signal that is not higher than nyquist frequency, V-CLK by phase-locked loop module PLL make Direct Digital formula frequency synthesizer system frequency is set and clock satisfies: clock frequency is near the integral multiple of output signal frequency, at this moment, the spuious index of output signal is best, need not to improve sample frequency and just can realize that high-quality signal is synthetic.
Description of drawings
Fig. 1 is a structural representation of the present invention.
Fig. 2 is an electrical schematic diagram of the present invention.
Embodiment
The present invention is further illustrated below in conjunction with drawings and Examples.
As shown in Figure 1, a kind of frequency synthesizer system that improves the Direct Digital Synthesizer spectral purity, it comprises crystal oscillator OSC, phase-locked loop module PLL, Direct Digital formula frequency synthesis module DDS, filtration module and CPU, described crystal oscillator OSC provides system clock for frequency synthesizer system, the signal output part of crystal oscillator OSC links to each other with the reference clock signal input of phase-locked loop module PLL, the variable clock signal output of phase-locked loop module PLL is connected with the variable clock signal input of Direct Digital formula frequency synthesis module DDS, the signal input end of Direct Digital formula frequency synthesis module DDS and phase-locked loop module PLL is connected with each self-corresponding control signal output ends of CPU respectively, the output of the signal of Direct Digital formula frequency synthesis module DDS by after the filtration module filtering as the output radiofrequency signal of frequency synthesizer system.It adopts phase-locked loop module PLL to provide V-CLK for Direct Digital formula frequency synthesis module DDS, and the V-CLK that phase-locked loop module PLL provides satisfies: the clock frequency of V-CLK is near the integral multiple of output signal frequency.
As shown in Figure 2, phase-locked loop module PLL of the present invention comprises phase frequency detector PFD, frequency divider X2, loop filter LoopFilter, voltage controlled oscillator X1, coupler COUP1, the radio frequency amplifier AMP4 and the first band pass filter BPF1, the signal input part of described phase frequency detector PFD links to each other with the signal output part of crystal oscillator OSC1 as the input of phase-locked loop module PLL, another signal input part of phase frequency detector PFD is connected with the signal output part of frequency divider X2, the signal input part that the signal output part of phase frequency detector PFD is corresponding with loop filter LoopFilter connects, the signal output part of loop filter LoopFilter is connected with the signal input part of voltage controlled oscillator X1, the signal output part of voltage controlled oscillator X1 is connected with the signal input part of coupler COUP1, the coupled end of coupler COUP1 is connected with the signal input part of frequency divider X2, the signal output part of coupler COUP1 is connected with the signal input part of radio frequency amplifier AMP4, the signal output part of radio frequency amplifier AMP4 is connected with the signal input part of the first band pass filter BPF1, and the signal output part of the first band pass filter BPF1 links to each other with the signal input part of Direct Digital formula frequency synthesis module DDS as the output of phase-locked loop module PLL; Described loop filter comprises resistance R 1, R5, R9, R10, RR1 and RR2, capacitor C 1, C6, C7 and C8; The described first band pass filter BPF1 comprises inductance L 1-L7, capacitor C 11, C2-C5, C9 and C10.
As shown in Figure 2, Direct Digital formula frequency synthesis module DDS of the present invention comprises single-ended transfer difference circuit SDC, Direct Digital Synthesizer (model can be AD9858) and difference are changeed single-end circuit DSC, the signal input part of single-ended transfer difference circuit SDC is exported promptly as the input of Direct Digital formula frequency synthesis module DDS with the signal of phase-locked loop module PLL, and the signal output part of the first band pass filter BPF1 is connected, the signal output part of single-ended transfer difference circuit SDC is connected with the signal input part of Direct Digital Synthesizer, the signal output part of Direct Digital Synthesizer is connected with the respective signal input that difference is changeed single-end circuit DSC, and the signal output part of difference commentaries on classics single-end circuit DSC is connected with the respective signal input of filtration module as the output of Direct Digital formula frequency synthesis module DDS.Described single-ended transfer difference circuit SDC comprises transformer TF1, resistance R 11, capacitor C 27 and C28; Described difference is changeed single-end circuit DSC and is comprised transformer TF2, resistance R 12 and R13.
As shown in Figure 2, filtration module of the present invention comprises the second band pass filter BPF2 and low-cut filter BSF, the signal input part of the described second band pass filter BPF2 is connected with the signal output part of Direct Digital formula frequency synthesis module DDS as the input of filtration module, the signal output part of the second band pass filter BPF2 is connected with the respective signal input of low-cut filter BSF, and the signal output part of low-cut filter BSF is the output radiofrequency signal of frequency synthesizer system as the output of filtration module.The described second band pass filter BPF2 comprises capacitor C 12-C21 and inductance L 8-L17; Low-cut filter BSF comprises capacitor C 22-C26 and inductance L 18-L22.
During concrete enforcement:
The signal of Direct Digital Synthesizer output is not spuious all poor at all frequencies, and the spectral purity of some frequency is still very high.The present invention adopts phase-locked loop module PLL to provide V-CLK for Direct Digital formula frequency synthesis module DDS, and the V-CLK that phase-locked loop module PLL provides satisfies: the clock frequency of V-CLK is the integral multiple of output signal frequency.When output frequency is set to 150MHz, adopt the 1GHz clock usually, adopt the design of ADS2008 radio circuit to carry out emulation with simulation software, Direct Digital Synthesizer (model can be AD9858) output frequency is 150MHz; 300MHz and 450MHz are respectively its secondary and triple-frequency harmonics, are noise signal near the 200MHz.Take all factors into consideration the designing requirement of broadband frequency conversion and the output bandwidth of DDS, the free transmission range of band pass filter is 50~450MHz in this example.From simulation result, the noise signal of 200MHz will drop in the free transmission range of filter, can't filtering, and it will become one of factor of the spuious index of the system of influence.After adopting system of the present invention, provide V-CLK by phase-locked loop module PLL for Direct Digital formula frequency synthesis module DDS, the reference clock of DDS is become 900MHz, near the clutter of frequency 200MHz that clock exists during for 1GHz, by changing clock frequency, eliminate.Only there are 150MHz signal and its secondary and triple-frequency harmonics.For the harmonic wave composition of signal, can be with some simple filtering methods with they filterings easily.Therefore, adopt the frequency synthesizer system and the method thereof of raising Direct Digital Synthesizer spectral purity of the present invention, need not to improve sample frequency and just can realize that high-quality signal is synthetic.
The part that the present invention does not relate to prior art that maybe can adopt all same as the prior art is realized.

Claims (7)

1. frequency synthesizer system that improves the Direct Digital Synthesizer spectral purity, it is characterized in that it comprises crystal oscillator OSC, phase-locked loop module PLL, Direct Digital formula frequency synthesis module DDS, filtration module and CPU, described crystal oscillator OSC provides system clock for frequency synthesizer system, the signal output part of crystal oscillator OSC links to each other with the reference clock signal input of phase-locked loop module PLL, the variable clock signal output of phase-locked loop module PLL is connected with the variable clock signal input of Direct Digital formula frequency synthesis module DDS, the signal input end of Direct Digital formula frequency synthesis module DDS and phase-locked loop module PLL is connected with each self-corresponding control signal output ends of CPU respectively, the output of the signal of Direct Digital formula frequency synthesis module DDS by after the filtration module filtering as the output radiofrequency signal of frequency synthesizer system.
2. the frequency synthesizer system of raising Direct Digital Synthesizer spectral purity according to claim 1, it is characterized in that described phase-locked loop module PLL comprises phase frequency detector PFD, frequency divider X2, loop filter LoopFilter, voltage controlled oscillator X1, coupler COUP1, the radio frequency amplifier AMP4 and the first band pass filter BPF1, the signal input part of described phase frequency detector PFD links to each other with the signal output part of crystal oscillator OSC1 as the input of phase-locked loop module PLL, another signal input part of phase frequency detector PFD is connected with the signal output part of frequency divider X2, the signal input part that the signal output part of phase frequency detector PFD is corresponding with loop filter LoopFilter connects, the signal output part of loop filter LoopFilter is connected with the signal input part of voltage controlled oscillator X1, the signal output part of voltage controlled oscillator X1 is connected with the signal input part of coupler COUP1, the coupled end of coupler COUP1 is connected with the signal input part of frequency divider X2, the signal output part of coupler COUP1 is connected with the signal input part of radio frequency amplifier AMP4, the signal output part of radio frequency amplifier AMP4 is connected with the signal input part of the first band pass filter BPF1, and the signal output part of the first band pass filter BPF1 links to each other with the signal input part of Direct Digital formula frequency synthesis module DDS as the output of phase-locked loop module PLL.
3. the frequency synthesizer system of raising Direct Digital Synthesizer spectral purity according to claim 2 is characterized in that described loop filter comprises resistance R 1, R5, R9, R10, RR1 and RR2, capacitor C 1, C6, C7 and C8; The described first band pass filter BPF1 comprises inductance L 1-L7, capacitor C 11, C2-C5, C9 and C10.
4. the frequency synthesizer system of raising Direct Digital Synthesizer spectral purity according to claim 1, it is characterized in that described Direct Digital formula frequency synthesis module DDS comprises single-ended transfer difference circuit SDC, Direct Digital Synthesizer and difference are changeed single-end circuit DSC, the signal input part of single-ended transfer difference circuit SDC is exported promptly as the input of Direct Digital formula frequency synthesis module DDS with the signal of phase-locked loop module PLL, and the signal output part of the first band pass filter BPF1 is connected, the signal output part of single-ended transfer difference circuit SDC is connected with the signal input part of Direct Digital Synthesizer, the signal output part of Direct Digital Synthesizer is connected with the respective signal input that difference is changeed single-end circuit DSC, and the signal output part of difference commentaries on classics single-end circuit DSC is connected with the respective signal input of filtration module as the output of Direct Digital formula frequency synthesis module DDS.
5. the frequency synthesizer system of raising Direct Digital Synthesizer spectral purity according to claim 4 is characterized in that described single-ended transfer difference circuit SDC comprises transformer TF1, resistance R 11, capacitor C 27 and C28; Described difference is changeed single-end circuit DSC and is comprised transformer TF2, resistance R 12 and R13.
6. the frequency synthesizer system of raising Direct Digital Synthesizer spectral purity according to claim 1, it is characterized in that described filtration module comprises the second band pass filter BPF2 and low-cut filter BSF, the signal input part of the described second band pass filter BPF2 is connected with the signal output part of Direct Digital formula frequency synthesis module DDS as the input of filtration module, the signal output part of the second band pass filter BPF2 is connected with the respective signal input of low-cut filter BSF, and the signal output part of low-cut filter BSF is the output output radiofrequency signal of frequency synthesizer system as the output of filtration module.
7. according to claim 6, the frequency synthesizer system of raising Direct Digital Synthesizer spectral purity is characterized in that the described second band pass filter BPF2 comprises capacitor C 12-C21 and inductance L 8-L17; Low-cut filter BSF comprises capacitor C 22-C26 and inductance L 18-L22.
CN200910264176A 2009-12-31 2009-12-31 Frequency synthesis system for enhancing spectrum purity of direct digital frequency synthesizer Pending CN101847992A (en)

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Cited By (8)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
CN102158239A (en) * 2010-12-21 2011-08-17 浙江大学 Broad-band radio-frequency generation circuit based on VC-TCXO (Voltage Control - Temperature Compensation Crystal Oscillator) array and frequency synthesizing chip
CN102780490A (en) * 2012-08-14 2012-11-14 武汉滨湖电子有限责任公司 DDS (direct digital synthesis) type ultra-wide band frequency-modulated signal generating circuit and method
CN103346874A (en) * 2013-06-20 2013-10-09 桂林电子科技大学 Digital communication clock synchronization system based on DDS
CN104467836A (en) * 2014-11-10 2015-03-25 绵阳市维博电子有限责任公司 Clock signal generating method and system
CN105429638A (en) * 2014-09-17 2016-03-23 常熟市荣兴化纺有限责任公司 Integrated decimal microwave frequency synthesizer with low phase noise
CN109274370A (en) * 2018-09-29 2019-01-25 北京望远四象科技有限公司 Sweep Source and UAV system for millimetre-wave radar
CN110958030A (en) * 2019-12-03 2020-04-03 紫光展锐(重庆)科技有限公司 Method and device for preventing harmonic interference, and data processing method and device
CN113030577A (en) * 2021-03-19 2021-06-25 常州同惠电子股份有限公司 Clock and sine wave generating system and generating method

Cited By (14)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
CN102158239A (en) * 2010-12-21 2011-08-17 浙江大学 Broad-band radio-frequency generation circuit based on VC-TCXO (Voltage Control - Temperature Compensation Crystal Oscillator) array and frequency synthesizing chip
CN102780490B (en) * 2012-08-14 2014-12-10 武汉滨湖电子有限责任公司 DDS (direct digital synthesis) type ultra-wide band frequency-modulated signal generating circuit and method
CN102780490A (en) * 2012-08-14 2012-11-14 武汉滨湖电子有限责任公司 DDS (direct digital synthesis) type ultra-wide band frequency-modulated signal generating circuit and method
CN103346874B (en) * 2013-06-20 2017-04-19 桂林电子科技大学 Digital communication clock synchronization system based on DDS
CN103346874A (en) * 2013-06-20 2013-10-09 桂林电子科技大学 Digital communication clock synchronization system based on DDS
CN105429638A (en) * 2014-09-17 2016-03-23 常熟市荣兴化纺有限责任公司 Integrated decimal microwave frequency synthesizer with low phase noise
CN104467836A (en) * 2014-11-10 2015-03-25 绵阳市维博电子有限责任公司 Clock signal generating method and system
CN104467836B (en) * 2014-11-10 2017-12-08 绵阳市维博电子有限责任公司 A kind of clock signal generating method and system
CN109274370A (en) * 2018-09-29 2019-01-25 北京望远四象科技有限公司 Sweep Source and UAV system for millimetre-wave radar
CN109274370B (en) * 2018-09-29 2022-06-24 北京望远四象科技有限公司 Sweep frequency source for millimeter wave radar and unmanned aerial vehicle system
CN110958030A (en) * 2019-12-03 2020-04-03 紫光展锐(重庆)科技有限公司 Method and device for preventing harmonic interference, and data processing method and device
CN110958030B (en) * 2019-12-03 2021-11-30 紫光展锐(重庆)科技有限公司 Method and device for preventing harmonic interference, and data processing method and device
CN113030577A (en) * 2021-03-19 2021-06-25 常州同惠电子股份有限公司 Clock and sine wave generating system and generating method
CN113030577B (en) * 2021-03-19 2022-07-15 常州同惠电子股份有限公司 Clock and sine wave generating system and generating method

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Application publication date: 20100929