CN101834718A - Chaotic signal generating circuit - Google Patents

Abstract

The invention relates to a chaotic signal generating circuit, comprising a microcontroller, a signal isolating circuit, three D/A switching circuits; each D/A switching circuit comprises 16-bit shift registers and 16-bit DAC registers and shift registers in each D/A switching circuit are connected in series to form a 48-bit shift register. Serial digital signals output by an SPI interface of the microcontroller are transmitted to a serial data input terminal of a first D/A switching circuit through the signal isolating circuit; clock signals and latch control signals output by the SPI interface are respectively transmitted to a clock input terminal and a latch control signal input terminal of the D/A switching circuit through the signal isolating circuit. In the invention, based on the chaotic circuit of the microcontroller, the Euler algorithm is adopted to carry out discretization processing on the continuous state equation of the improved generalized Lorenz system; as a result, the operation algorithm which can be appropriately realized by the microcontroller is established and folding directions of chaotic attractors and system operation modes are optional.

Description

Chaotic signal generating circuit

technical field

The invention relates to a chaotic signal generating circuit, in particular to an improved generalized Lorenz chaotic signal generating circuit based on a microcontroller.

Background technique

Chaos reveals the real law and basic characteristics of nonlinear system motion, and reflects the dynamic behavior of the system. Due to the randomness of chaotic signals, the characteristics of continuous broadband power spectrum, the sensitive dependence of chaotic systems on initial conditions, and the characteristics of being easy to generate and difficult to predict and separate through commonly used time domain and frequency domain processing, chaotic signals are particularly suitable. In the fields of secure communication and information encryption. Therefore, the realization of chaotic signal generating circuits with different chaotic characteristics has long been a hot spot for researchers. The research of chaotic signal generation circuit is also required by the application of information engineering fields such as communication encryption, radar communication, electronic countermeasures, and cognitive radio. It can be applied to the experimental demonstration of chaotic phenomena and the experimental verification of chaotic systems in the process of scientific research and teaching.

Chua's chaotic circuit is the most typical of many designs. The model of Chua's circuit is realized by electronic circuits composed of capacitors, inductors, resistors and Chua's diodes, which are used to generate double-scroll or multi-scroll chaotic signals. Due to the discrete electronic components The large discreteness brings certain difficulties to circuit design and debugging. At present, there are mainly two types of design methods for chaotic signal generation circuits reported in China: ① Use operational amplifiers, resistors, capacitors and other components to form addition, subtraction, differentiation and integration circuits to realize chaotic signal output. This is composed of discrete components. The analog circuit has large discrete parameters, complex debugging, and poor circuit versatility, which is not conducive to popularization and application; ②Use digital processing technology to discretize the continuous-time dimensionless state equation of the chaotic system, and use FPGA programmable logic devices to realize the algorithm , the chaotic signal is generated through D/A, and a large amount of hardware logic resources are consumed when implementing the chaotic algorithm with FPGA, so the accuracy of the algorithm and the capacity of the logic unit become the bottleneck of the circuit design.

Contents of the invention

The technical problem to be solved by the present invention is to provide a chaotic signal generating circuit with good reliability and stability and high anti-interference performance.

In order to solve the above technical problems, the present invention provides a chaotic signal generating circuit, including: a microcontroller, a signal isolation circuit, a first D/A conversion circuit, a second D/A conversion circuit and a third D/A conversion circuit ; Each D/A conversion circuit includes a 16-bit shift register and a 16-bit DAC register, and the shift registers in each D/A conversion circuit are sequentially connected in series to form a 48-bit shift register.

The serial digital signal MISO output by the SPI interface of the microcontroller is sent to the serial data input terminal DATA IN _x of the first D/A conversion circuit through the signal isolation circuit, and the clock signal SCK and the latch control signal output by the SPI interface The SS is sent to the clock input terminal CLOCK and the latch control signal input terminal LATCH of each D/A conversion circuit through the signal isolation circuit to realize serial synchronous communication.

The microcontroller performs a linear transformation of the three state variables x _n , y _n , z _n in the mathematical expression of the improved generalized Lorenz system, so that the three state variables x _n , y The dynamic range of _n and z _n is reduced to 1/10, and discretized, and then based on the discretization iterative algorithm expression of the Lorenz-like system, Chen-like system or Lü-like system, according to the Lorenz-like system, The discretized iterative algorithm expression of the Chen-like system or Lü-like system calculates the floating-point data of the three state variables x _n , y _n , z _n , and then converts the floating-point data into integer data to output as the serial digital signal MISO.

Whenever the clock rising edge of the clock input terminal CLOCK occurs, the serial digital signal MISO enters the 48-bit digital signal serially from the serial data input terminal DATA IN _x of the first D/A conversion circuit through the signal isolation circuit. shift register, and when the 48th clock rising edge of the clock input terminal CLOCK arrives, the latch control signal input terminal LATCH is made to generate a rising edge, so that the 16-bit shift in each D/A conversion circuit The 16-bit data in the register is immediately loaded into the corresponding DAC register, and then each group of 16-bit data is latched and drives the digital-to-analog conversion, thereby realizing the synchronous output of V _x , V _y , V _z chaotic signals.

Further, a variable gain amplifier circuit is provided at the voltage signal output terminal V _OUT of each D/A conversion circuit, and the dynamic range of the output voltage of the variable gain amplifier circuit is 0V˜+10V.

Further, the switch control terminal of the microcontroller is provided with three control switches K ₀ , K ₁ and K ₂ , and the microcontroller realizes the Lorenz-like system, the Chen-like system, and the Lü-like system by judging the logic state of each control switch. The selection of the discretization iterative algorithm mode and the selection of the folding direction of the chaotic attractor.

The present invention has positive effect:

(1) The chaotic signal generating circuit of the present invention is a multi-dimensional chaotic signal generating circuit based on a micro-controller, realizes a three-dimensional improved generalized Lorenz system by programming, and adopts Euler algorithm to carry out discrete processing to the continuous state equation of the improved generalized Lorenz system , established a running algorithm suitable for microcontroller implementation, obtained the digital circuit experiment output through software programming, and obtained the circuit output that was completely consistent with the computer simulation results, and verified the feasibility of realizing the chaotic system based on the microcontroller digital circuit. The generated digital chaotic system has good versatility and software portability, and the design idea can be extended to the design and realization of general or high-dimensional chaotic system circuits.

(2) chaotic signal generation circuit of the present invention has the following characteristics: 1. microcontroller and A/D modulus circuit adopt SPI interface, and working speed is fast, is applicable to various microcontroller chips with SPI interface, and circuit versatility is strong ; ② Circuit modular design, simple structure, multi-dimensional analog voltage signal synchronous output; ③ The system is easy to expand, the signal dimension is variable, and can be extended to multi-dimensional chaotic systems, and can adapt to different chaotic systems, such as multi-wing Lü system, four-dimensional network Lattice scroll ultra-chaotic system, multi-scroll Colpitts chaotic system, etc., can produce different types of multi-dimensional chaotic attractor phase-track diagrams; ④The software designed in C language can be transplanted and can adapt to different chaotic systems; ⑤Using high-speed CMOS The ADUM120 digital isolation device with technology and chip-level transformer technology can suppress system interference; ⑥ The isolation circuit has a small driving current and supports a microprocessor with low voltage operation. The isolation circuit realizes level conversion and interfaces with the A/D circuit.

(3) On the basis of analyzing the characteristics of the improved generalized Lorenz system and its folded chaotic attractor, the present invention provides the simulation results of the left and right folded chaotic attractors of the Lorenz-like system, the Chen-like system and the Lü-like system under typical system parameters . On this basis, a general digital circuit is designed based on the microcontroller, and the Euler algorithm is used to discretize the continuous state equation of the improved generalized Lorenz system, and a running algorithm suitable for microcontroller implementation is established. Chaotic attractor Folding direction and system working mode can be selected. The experimental output results are completely consistent with the numerical simulation results, which proves the feasibility of implementing the generalized Lorenz system chaotic circuit with the digital circuit based on the microcontroller. The realization of the digital circuit of the chaotic system provides a good technical support for the microcontroller to realize the chaotic synchronization and secure communication, and lays the foundation for the research based on the chaotic application.

Description of drawings

In order to make the content of the present invention more easily understood, the present invention will be described in further detail below in conjunction with the specific embodiments according to the accompanying drawings, wherein

Fig. 1 is the attractor simulation diagram of the improved generalized Lorenz system in the embodiment;

Fig. 2 is the circuit schematic diagram of the chaotic signal generation circuit in the embodiment;

Fig. 3 is the circuit schematic diagram of the three-way D/A conversion circuit in the described chaotic signal generating circuit;

Fig. 4 is the data input/output sequence of the chaotic signal generation circuit in the embodiment;

Fig. 5 is a program flow diagram of the chaotic signal generating circuit in the embodiment.

Detailed ways

The chaotic signal generation circuit of this embodiment includes: a microcontroller, a signal isolation circuit, a first D/A conversion circuit, a second D/A conversion circuit and a third D/A conversion circuit.

Each D/A conversion circuit includes a 16-bit shift register and a 16-bit DAC register, and the shift registers in each D/A conversion circuit are connected in series to form a 48-bit shift register; The serial digital signal MISO output by the SPI interface is sent to the serial data input terminal DATA IN _x of the first D/A conversion circuit through the signal isolation circuit, and the clock signal SCK and the latch control signal SS output by the SPI interface are respectively passed through the signal The isolation circuit is sent to the clock input terminal CLOCK and the latch control signal input terminal LATCH of each D/A conversion circuit to realize serial synchronous communication. The SPI interface is a serial peripheral interface.

The mathematical expression of the improved generalized Lorenz system is as follows:

$\stackrel{<span\; class="notranslate">\; \&Center\; Dot;</span>}{\mathrm{<span\; class="notranslate">\; x</span>}}<span\; class="notranslate">\; =</span>\left(\begin{array}{cccc}& & & \mathrm{<span\; class="notranslate">\; 0</span>}\\ & \mathrm{<span\; class="notranslate">\; A</span>}& & \\ & & & <span\; class="notranslate">\; \&PlusMinus;</span>\mathrm{<span\; class="notranslate">\; 1</span>}\\ \mathrm{<span\; class="notranslate">\; 0</span>}& & \mathrm{<span\; class="notranslate">\; 0</span>}& {\mathrm{<span\; class="notranslate">\; \&lambda;</span>}}_{\mathrm{<span\; class="notranslate">\; 3</span>}}\end{array}\right)\mathrm{<span\; class="notranslate">\; x</span>}<span\; class="notranslate">\; +</span>\mathrm{<span\; class="notranslate">\; x</span>}\left(\begin{array}{ccc}\mathrm{<span\; class="notranslate">\; 0</span>}& \mathrm{<span\; class="notranslate">\; 0</span>}& \mathrm{<span\; class="notranslate">\; 0</span>}\\ \mathrm{<span\; class="notranslate">\; 0</span>}& \mathrm{<span\; class="notranslate">\; 0</span>}& <span\; class="notranslate">\; -</span>\mathrm{<span\; class="notranslate">\; 1</span>}\\ \mathrm{<span\; class="notranslate">\; 1</span>}& \mathrm{<span\; class="notranslate">\; 0</span>}& \mathrm{<span\; class="notranslate">\; 0</span>}\end{array}\right)\mathrm{<span\; class="notranslate">\; x</span>}<span\; class="notranslate">\; -</span><span\; class="notranslate">\; -</span><span\; class="notranslate">\; -</span><span\; class="notranslate">\; (</span>\mathrm{<span\; class="notranslate">\; 1</span>}<span\; class="notranslate">\; )</span>$

where x = [x y z] ^T , λ ₃ ∈ R, and A is a 2×2 real matrix

$\mathrm{<span\; class="notranslate">\; A</span>}<span\; class="notranslate">\; =</span>\left(\begin{array}{cc}{\mathrm{<span\; class="notranslate">\; a</span>}}_{\mathrm{<span\; class="notranslate">\; 11</span>}}& {\mathrm{<span\; class="notranslate">\; a</span>}}_{\mathrm{<span\; class="notranslate">\; 12</span>}}\\ {\mathrm{<span\; class="notranslate">\; a</span>}}_{\mathrm{<span\; class="notranslate">\; twenty\; one</span>}}& {\mathrm{<span\; class="notranslate">\; a</span>}}_{\mathrm{<span\; class="notranslate">\; twenty\; two</span>}}\end{array}\right)<span\; class="notranslate">\; -</span><span\; class="notranslate">\; -</span><span\; class="notranslate">\; -</span><span\; class="notranslate">\; (</span>\mathrm{<span\; class="notranslate">\; 2</span>}<span\; class="notranslate">\; )</span>$

Its characteristic root (λ ₁ , λ ₂ )∈R has λ2>λ1>λ3>0. A modified generalized Lorenz system is also called nontrivial if it has at least one solution that does not tend to zero or infinity or a limit cycle.

Different from the generalized Lorenz system, the improved generalized Lorenz system represented by the expression (1) adds a new linear term coefficient a ₂₃ =±1. The coefficient a ₂₃ can cause the chaotic attractor of the improved generalized Lorenz system to fold, and its folding direction depends on the different sign values of a _23. Here, a ₂₃ is called the folding factor, and it can be proved that the folding factor does not change after sign switching change the dynamics of the system.

对三维自治广义Lorenz系统给出了分类。按照其分类方法，对所述改进型广义Lorenz系统分为类Lorenz、类Chen和类Lü混沌系统，其中，类Lorenz系统满足：a₁₂a₂₁＞0；类Chen系统满足：a₁₂a₂₁＜0；类Lü系统满足：a₁₂a₂₁＝0。同样地，在Van

ek和

意义下，类Chen系统是类Lorenz系统的对偶系统，而类Lü系统则代表了类Lorenz系统和类Chen系统之间的转换。There is no diffeomorphism between the improved generalized Lorenz system and the generalized Lorenz system, and they are topologically inequivalent. According to the items a ₁₂ a ₂₁ in the above expression (2), and

The classification of 3D autonomous generalized Lorenz systems is given. According to its classification method, the improved generalized Lorenz system is divided into Lorenz-like, Chen-like and Lü-like chaotic systems, wherein, the Lorenz-like system satisfies: a ₁₂ a ₂₁ >0; the Chen-like system satisfies: a ₁₂ a ₂₁ <0; the Lü-like system satisfies: a ₁₂ a ₂₁ =0. Similarly, in Van

ek and

In a sense, the Chen-like system is the dual system of the Lorenz-like system, and the Lü-like system represents the conversion between the Lorenz-like system and the Chen-like system.

Let a ₁₁ =a ₁₂ =a, a ₂₁ =p, a ₂₂ =q, λ ₃ =b. When p=c, q=1, there are a ₁₂ a ₂₁ >0, the Lorenz-like system can be derived from the expression (1); when p=(c a), q=c, there are a ₁₂ a ₂₁ <0, A Chen-like system can be derived from expression (1); when p=0, q=c, a ₁₂ a ₂₁ =0, then a Lü-like system can be derived from expression (1). For typical system parameter values, the simulation diagram of the right-folded attractor and left-folded attractor of the improved generalized Lorenz system on the xz plane is shown in Figure 1.

It takes a certain amount of time (instruction cycle) for the microcontroller to execute an instruction, and it controls multiple input/output interfaces through a time-sharing method. Signal synchronization output is difficult to handle. For a multi-dimensional chaotic system, in order to realize the synchronous output of multiple analog voltages, in addition to considering multiple independent D/A channels, the synchronous control of analog output signals and the interface with the microcontroller must also be considered.

Figure 2 is a structural diagram of a three-dimensional chaotic signal synchronous output circuit, which is composed of a microcontroller, a signal isolation circuit, and a D/A conversion circuit. The microcontroller uses ATmega 128 with SPI serial communication interface, the working speed is as high as 50ns, and the high-speed data transmission is carried out through the SPI interface and the D/A conversion circuit. Each D/A conversion circuit includes a digital-to-analog converter of the model AD420, and the serial input DATA, clock CLOCK, and latch control LATCH of each D/A conversion circuit are respectively connected to MISO, SCK, and SS of the SPI serial port , to achieve SPI serial synchronous communication, the maximum rate can reach 3.3Mb/s. AD420 can get high-precision continuous analog output with a small amount of external components.

By setting the corresponding bits in the ATmega128 control register SPCR, parameters such as master/slave mode, data bit transmission order, baud rate, SCK idle level, and SCK sampling edge can be set. When ATmega128 is set as the SPI host mode, as long as the CPU writes data to the SPI data buffer SPDR, the clock SCK is started, and the 8-bit data is sequentially moved into the D/A conversion circuit. After the transmission is over, the clock SCK stops and an interrupt flag is generated. Through the interrupt program, the CPU can shift multiple data into the D/A conversion circuit, and store the data in the shift register of AD420. Because there is only one sending buffer in the SPI system, when the CPU is sending data, it must wait until the 8-bit data shifting process is all over before it can perform a write operation on the data buffer SPDR.

The AD420 includes a 16-bit shift register and a 16-bit DAC register. The shift registers of the x, y, and z D/A conversion circuits are connected in series to form a 48-bit shift register circuit, as shown in Figure 3. DATA IN _x , IN _Y and IN _Z are the serial digital signal input terminals of the first, second and third D/A conversion circuits respectively, and OUT _x and OUT _Y are the serial digital signal input terminals of the first and second D/A conversion circuits respectively. The serial digital signal output terminal, LATCH is the 16-bit parallel data latch control terminal, whenever the rising edge of the CLOCK clock occurs, the data enters the 48-bit shift register serially from the DATA IN _x terminal, and the data transmission sequence is high-order first. Let X _n , Y _n , and Z _n be the data (16bit) of the three channels of x, y, and z respectively. When the rising edge of the 48th CLOCK clock arrives, the data of X _n , Y _n , and Z _n are sequentially shifted into Three-way AD420 shift register. At this time, the latch control signal input terminal LATCH generates a rising edge, and the 16-bit data in each shift register is immediately loaded into each DAC register, and the data is latched and drives the digital-to-analog conversion, thereby realizing V _x , V The synchronous output of _y and V _z voltage signals, and the timing sequence of data input/output are shown in Figure 4.

Between the microcontroller and each D/A conversion circuit, the ADUM1410 four-channel digital isolator is used to form a digital signal isolation channel, which improves the system's common-mode rejection capability and ensures the stable output of the analog signal.

Since the AD420 is a single power supply device, the dynamic range of the analog voltage output V _OUT is only 0V ~ +5V, in order to obtain a wide voltage output in the experiment, a variable gain amplifier circuit can be designed at the V _OUT output terminal, as shown in Figure 3 It shows that when R _f =R ₁ =5kΩ, the dynamic range of the output voltage is expanded to 0V~+10V. In order to meet the fast response of 3ms in the full scale, the filter capacitors C ₁ and C ₂ should choose low-dielectric ceramic capacitors, where C ₁ =0.01μF, C ₂ =0.01μF.

In Figure 2, K ₀ , K ₁ , and K ₂ are control switches. The logical state of the switches is judged by the program, and the corresponding system parameters are selected to realize the mode selection of the Lorenz-like system, the Chen-like system, and the Lü-like system and the folding direction of the chaotic attractor selection, as shown in Table 1.

Table 1 Working mode selection

K ₀ K ₁ K ₂ Operating mode Function 0 0 0 Mode 0 Right folded attractor for Lorenz-like systems 1 0 0 Mode 1 Lorenz-like system left-folded attractor 0 0 1 Mode 2 Chen-like system right folded attractor 1 0 1 Mode 3 Chen-like system left-folded attractor 0 1 0 Mode 4 Lü-like system right folded attractor 1 1 0 Mode 5 Lü-like system left-folded attractor

In order to realize the continuous analog signal through the digital system, the corresponding continuous system must be discretized. There are usually three methods for the discretization of differential equations, namely the Euler algorithm, the improved Euler algorithm and the Runge-Kutta method. These three discretization methods have their own advantages and disadvantages, and the Runge-Kutta method has higher precision. In this paper, the Euler algorithm is used to discretize the system. First, the three state variables in the improved generalized Lorenz system (1) are linearly transformed in the same proportion, so that the dynamic range is reduced to 1/10, and then the discretization is carried out. processed, get

${\mathrm{<span\; class="notranslate">\; x</span>}}_{\mathrm{<span\; class="notranslate">\; no</span>}<span\; class="notranslate">\; +</span>\mathrm{<span\; class="notranslate">\; 1</span>}}<span\; class="notranslate">\; =</span>\mathrm{<span\; class="notranslate">\; h</span>}\left(\begin{array}{cccc}& & & \mathrm{<span\; class="notranslate">\; 0</span>}\\ & \mathrm{<span\; class="notranslate">\; A</span>}& & \\ & & & <span\; class="notranslate">\; \&PlusMinus;</span>\mathrm{<span\; class="notranslate">\; 1</span>}\\ \mathrm{<span\; class="notranslate">\; 0</span>}& & \mathrm{<span\; class="notranslate">\; 0</span>}& {\mathrm{<span\; class="notranslate">\; \&lambda;</span>}}_{\mathrm{<span\; class="notranslate">\; 3</span>}}\end{array}\right){\mathrm{<span\; class="notranslate">\; x</span>}}_{\mathrm{<span\; class="notranslate">\; no</span>}}<span\; class="notranslate">\; +</span>\mathrm{<span\; class="notranslate">\; 10</span>}\mathrm{<span\; class="notranslate">\; h</span>}{\mathrm{<span\; class="notranslate">\; x</span>}}_{\mathrm{<span\; class="notranslate">\; no</span>}}\left(\begin{array}{ccc}\mathrm{<span\; class="notranslate">\; 0</span>}& \mathrm{<span\; class="notranslate">\; 0</span>}& \mathrm{<span\; class="notranslate">\; 0</span>}\\ \mathrm{<span\; class="notranslate">\; 0</span>}& \mathrm{<span\; class="notranslate">\; 0</span>}& <span\; class="notranslate">\; -</span>\mathrm{<span\; class="notranslate">\; 1</span>}\\ \mathrm{<span\; class="notranslate">\; 1</span>}& \mathrm{<span\; class="notranslate">\; 0</span>}& \mathrm{<span\; class="notranslate">\; 0</span>}\end{array}\right){\mathrm{<span\; class="notranslate">\; x</span>}}_{\mathrm{<span\; class="notranslate">\; no</span>}}<span\; class="notranslate">\; +</span>{\mathrm{<span\; class="notranslate">\; x</span>}}_{\mathrm{<span\; class="notranslate">\; no</span>}}<span\; class="notranslate">\; -</span><span\; class="notranslate">\; -</span><span\; class="notranslate">\; -</span><span\; class="notranslate">\; (</span>\mathrm{<span\; class="notranslate">\; 3</span>}<span\; class="notranslate">\; )</span>$

Wherein, x _n+1 =[x _n+1 y _n+1 z _n+1 ] ^T , x _n =[x _n y _n z _n ] ^T , h is the sampling interval.

According to algorithm (3), the discretization iterative algorithm of Lorenz-like system, Chen-like system or Lü-like system can be obtained, respectively

$\left\{\begin{array}{c}{\mathrm{<span\; class="notranslate">\; x</span>}}_{\mathrm{<span\; class="notranslate">\; no</span>}<span\; class="notranslate">\; +</span>\mathrm{<span\; class="notranslate">\; 1</span>}}<span\; class="notranslate">\; =</span>\mathrm{<span\; class="notranslate">\; ha</span>}<span\; class="notranslate">\; (</span>{\mathrm{<span\; class="notranslate">\; the\; y</span>}}_{\mathrm{<span\; class="notranslate">\; no</span>}}<span\; class="notranslate">\; -</span>{\mathrm{<span\; class="notranslate">\; x</span>}}_{\mathrm{<span\; class="notranslate">\; no</span>}}<span\; class="notranslate">\; )</span><span\; class="notranslate">\; +</span>{\mathrm{<span\; class="notranslate">\; x</span>}}_{\mathrm{<span\; class="notranslate">\; no</span>}}\\ {\mathrm{<span\; class="notranslate">\; the\; y</span>}}_{\mathrm{<span\; class="notranslate">\; no</span>}<span\; class="notranslate">\; +</span>\mathrm{<span\; class="notranslate">\; 1</span>}}<span\; class="notranslate">\; =</span>\mathrm{<span\; class="notranslate">\; h</span>}<span\; class="notranslate">\; (</span>{\mathrm{<span\; class="notranslate">\; cx</span>}}_{\mathrm{<span\; class="notranslate">\; no</span>}}<span\; class="notranslate">\; -</span>{\mathrm{<span\; class="notranslate">\; the\; y</span>}}_{\mathrm{<span\; class="notranslate">\; no</span>}}<span\; class="notranslate">\; -</span>\mathrm{<span\; class="notranslate">\; 10</span>}{\mathrm{<span\; class="notranslate">\; x</span>}}_{\mathrm{<span\; class="notranslate">\; no</span>}}{\mathrm{<span\; class="notranslate">\; z</span>}}_{\mathrm{<span\; class="notranslate">\; no</span>}}<span\; class="notranslate">\; +</span>{\mathrm{<span\; class="notranslate">\; a</span>}}_{\mathrm{<span\; class="notranslate">\; twenty\; three</span>}}{\mathrm{<span\; class="notranslate">\; z</span>}}_{\mathrm{<span\; class="notranslate">\; no</span>}}<span\; class="notranslate">\; )</span><span\; class="notranslate">\; +</span>{\mathrm{<span\; class="notranslate">\; the\; y</span>}}_{\mathrm{<span\; class="notranslate">\; no</span>}}\\ {\mathrm{<span\; class="notranslate">\; z</span>}}_{\mathrm{<span\; class="notranslate">\; no</span>}<span\; class="notranslate">\; +</span>\mathrm{<span\; class="notranslate">\; 1</span>}}<span\; class="notranslate">\; =</span>\mathrm{<span\; class="notranslate">\; h</span>}<span\; class="notranslate">\; (</span>\mathrm{<span\; class="notranslate">\; 10</span>}{{\mathrm{<span\; class="notranslate">\; x</span>}}_{\mathrm{<span\; class="notranslate">\; no</span>}}}^{\mathrm{<span\; class="notranslate">\; 2</span>}}<span\; class="notranslate">\; -</span>\mathrm{<span\; class="notranslate">\; b</span>}{\mathrm{<span\; class="notranslate">\; z</span>}}_{\mathrm{<span\; class="notranslate">\; no</span>}}<span\; class="notranslate">\; )</span><span\; class="notranslate">\; +</span>{\mathrm{<span\; class="notranslate">\; z</span>}}_{\mathrm{<span\; class="notranslate">\; no</span>}}\end{array}\right.<span\; class="notranslate">\; -</span><span\; class="notranslate">\; -</span><span\; class="notranslate">\; -</span><span\; class="notranslate">\; (</span>\mathrm{<span\; class="notranslate">\; 4</span>}<span\; class="notranslate">\; )</span>$

$\left\{\begin{array}{c}{\mathrm{<span\; class="notranslate">\; x</span>}}_{\mathrm{<span\; class="notranslate">\; no</span>}<span\; class="notranslate">\; +</span>\mathrm{<span\; class="notranslate">\; 1</span>}}<span\; class="notranslate">\; =</span>\mathrm{<span\; class="notranslate">\; ha</span>}<span\; class="notranslate">\; (</span>{\mathrm{<span\; class="notranslate">\; the\; y</span>}}_{\mathrm{<span\; class="notranslate">\; no</span>}}<span\; class="notranslate">\; -</span>{\mathrm{<span\; class="notranslate">\; x</span>}}_{\mathrm{<span\; class="notranslate">\; no</span>}}<span\; class="notranslate">\; )</span><span\; class="notranslate">\; +</span>{\mathrm{<span\; class="notranslate">\; x</span>}}_{\mathrm{<span\; class="notranslate">\; no</span>}}\\ {\mathrm{<span\; class="notranslate">\; the\; y</span>}}_{\mathrm{<span\; class="notranslate">\; no</span>}<span\; class="notranslate">\; +</span>\mathrm{<span\; class="notranslate">\; 1</span>}}<span\; class="notranslate">\; =</span>\mathrm{<span\; class="notranslate">\; h</span>}<span\; class="notranslate">\; [</span>{<span\; class="notranslate">\; (</span>\mathrm{<span\; class="notranslate">\; c</span>}<span\; class="notranslate">\; -</span>\mathrm{<span\; class="notranslate">\; a</span>}<span\; class="notranslate">\; )</span>\mathrm{<span\; class="notranslate">\; x</span>}}_{\mathrm{<span\; class="notranslate">\; no</span>}}<span\; class="notranslate">\; +</span>\mathrm{<span\; class="notranslate">\; c</span>}{\mathrm{<span\; class="notranslate">\; the\; y</span>}}_{\mathrm{<span\; class="notranslate">\; no</span>}}<span\; class="notranslate">\; -</span>\mathrm{<span\; class="notranslate">\; 10</span>}{\mathrm{<span\; class="notranslate">\; x</span>}}_{\mathrm{<span\; class="notranslate">\; no</span>}}{\mathrm{<span\; class="notranslate">\; z</span>}}_{\mathrm{<span\; class="notranslate">\; no</span>}}<span\; class="notranslate">\; +</span>{\mathrm{<span\; class="notranslate">\; a</span>}}_{\mathrm{<span\; class="notranslate">\; twenty\; three</span>}}{\mathrm{<span\; class="notranslate">\; z</span>}}_{\mathrm{<span\; class="notranslate">\; no</span>}}<span\; class="notranslate">\; )</span><span\; class="notranslate">\; ]</span><span\; class="notranslate">\; +</span>{\mathrm{<span\; class="notranslate">\; the\; y</span>}}_{\mathrm{<span\; class="notranslate">\; no</span>}}\\ {\mathrm{<span\; class="notranslate">\; z</span>}}_{\mathrm{<span\; class="notranslate">\; no</span>}<span\; class="notranslate">\; +</span>\mathrm{<span\; class="notranslate">\; 1</span>}}<span\; class="notranslate">\; =</span>\mathrm{<span\; class="notranslate">\; h</span>}<span\; class="notranslate">\; (</span>\mathrm{<span\; class="notranslate">\; 10</span>}{{\mathrm{<span\; class="notranslate">\; x</span>}}_{\mathrm{<span\; class="notranslate">\; no</span>}}}^{\mathrm{<span\; class="notranslate">\; 2</span>}}<span\; class="notranslate">\; -</span>\mathrm{<span\; class="notranslate">\; b</span>}{\mathrm{<span\; class="notranslate">\; z</span>}}_{\mathrm{<span\; class="notranslate">\; no</span>}}<span\; class="notranslate">\; )</span><span\; class="notranslate">\; +</span>{\mathrm{<span\; class="notranslate">\; z</span>}}_{\mathrm{<span\; class="notranslate">\; no</span>}}\end{array}\right.<span\; class="notranslate">\; -</span><span\; class="notranslate">\; -</span><span\; class="notranslate">\; -</span><span\; class="notranslate">\; (</span>\mathrm{<span\; class="notranslate">\; 5</span>}<span\; class="notranslate">\; )</span>$

$\left\{\begin{array}{c}{\mathrm{<span\; class="notranslate">\; x</span>}}_{\mathrm{<span\; class="notranslate">\; no</span>}<span\; class="notranslate">\; +</span>\mathrm{<span\; class="notranslate">\; 1</span>}}<span\; class="notranslate">\; =</span>\mathrm{<span\; class="notranslate">\; ha</span>}<span\; class="notranslate">\; (</span>{\mathrm{<span\; class="notranslate">\; the\; y</span>}}_{\mathrm{<span\; class="notranslate">\; no</span>}}<span\; class="notranslate">\; -</span>{\mathrm{<span\; class="notranslate">\; x</span>}}_{\mathrm{<span\; class="notranslate">\; no</span>}}<span\; class="notranslate">\; )</span><span\; class="notranslate">\; +</span>{\mathrm{<span\; class="notranslate">\; x</span>}}_{\mathrm{<span\; class="notranslate">\; no</span>}}\\ {\mathrm{<span\; class="notranslate">\; the\; y</span>}}_{\mathrm{<span\; class="notranslate">\; no</span>}<span\; class="notranslate">\; +</span>\mathrm{<span\; class="notranslate">\; 1</span>}}<span\; class="notranslate">\; =</span>\mathrm{<span\; class="notranslate">\; h</span>}<span\; class="notranslate">\; (</span>{\mathrm{<span\; class="notranslate">\; cy</span>}}_{\mathrm{<span\; class="notranslate">\; no</span>}}<span\; class="notranslate">\; -</span>\mathrm{<span\; class="notranslate">\; 10</span>}{\mathrm{<span\; class="notranslate">\; x</span>}}_{\mathrm{<span\; class="notranslate">\; no</span>}}{\mathrm{<span\; class="notranslate">\; z</span>}}_{\mathrm{<span\; class="notranslate">\; no</span>}}<span\; class="notranslate">\; +</span>{\mathrm{<span\; class="notranslate">\; a</span>}}_{\mathrm{<span\; class="notranslate">\; twenty\; three</span>}}{\mathrm{<span\; class="notranslate">\; z</span>}}_{\mathrm{<span\; class="notranslate">\; no</span>}}<span\; class="notranslate">\; )</span><span\; class="notranslate">\; +</span>{\mathrm{<span\; class="notranslate">\; the\; y</span>}}_{\mathrm{<span\; class="notranslate">\; no</span>}}\\ {\mathrm{<span\; class="notranslate">\; z</span>}}_{\mathrm{<span\; class="notranslate">\; no</span>}<span\; class="notranslate">\; +</span>\mathrm{<span\; class="notranslate">\; 1</span>}}<span\; class="notranslate">\; =</span>\mathrm{<span\; class="notranslate">\; h</span>}<span\; class="notranslate">\; (</span>\mathrm{<span\; class="notranslate">\; 10</span>}{{\mathrm{<span\; class="notranslate">\; x</span>}}_{\mathrm{<span\; class="notranslate">\; no</span>}}}^{\mathrm{<span\; class="notranslate">\; 2</span>}}<span\; class="notranslate">\; -</span>\mathrm{<span\; class="notranslate">\; b</span>}{\mathrm{<span\; class="notranslate">\; z</span>}}_{\mathrm{<span\; class="notranslate">\; no</span>}}<span\; class="notranslate">\; )</span><span\; class="notranslate">\; +</span>{\mathrm{<span\; class="notranslate">\; z</span>}}_{\mathrm{<span\; class="notranslate">\; no</span>}}\end{array}\right.<span\; class="notranslate">\; -</span><span\; class="notranslate">\; -</span><span\; class="notranslate">\; -</span><span\; class="notranslate">\; (</span>\mathrm{<span\; class="notranslate">\; 6</span>}<span\; class="notranslate">\; )</span>$

Where: n is the number of iterations, a ₂₃ =±1 is the folding factor, and a, b, c are typical parameters of the improved generalized Lorenz system.

The data calculated according to the discretization equation is a floating-point number type, and before the data is sent to the D/A conversion circuit, the data must be converted into an integer type. At the same time, according to factors such as the number of digits of D/A conversion, the dynamic range of analog voltage output, and the experimental effect of observing the phase diagram with an oscilloscope, the digital quantity of analog-to-digital conversion must be properly linearly converted, that is, the data needs to be converted in the software design. convert. Let X _n , Y _n , Z _n be the adjusted 16-bit integer digital quantities of the three state variables x _n , y _n , z _n respectively, then

$\left\{\begin{array}{c}{\mathrm{<span\; class="notranslate">\; x</span>}}_{\mathrm{<span\; class="notranslate">\; no</span>}}<span\; class="notranslate">\; =</span>\mathrm{<span\; class="notranslate">\; d</span>}<span\; class="notranslate">\; +</span>{\mathrm{<span\; class="notranslate">\; x</span>}}_{\mathrm{<span\; class="notranslate">\; no</span>}}\\ {\mathrm{<span\; class="notranslate">\; Y</span>}}_{\mathrm{<span\; class="notranslate">\; no</span>}}<span\; class="notranslate">\; =</span>\mathrm{<span\; class="notranslate">\; d</span>}<span\; class="notranslate">\; +</span>{\mathrm{<span\; class="notranslate">\; ky</span>}}_{\mathrm{<span\; class="notranslate">\; no</span>}}\\ {\mathrm{<span\; class="notranslate">\; Z</span>}}_{\mathrm{<span\; class="notranslate">\; no</span>}}<span\; class="notranslate">\; =</span>\mathrm{<span\; class="notranslate">\; d</span>}<span\; class="notranslate">\; +</span>{\mathrm{<span\; class="notranslate">\; kz</span>}}_{\mathrm{<span\; class="notranslate">\; no</span>}}\end{array}\right.<span\; class="notranslate">\; -</span><span\; class="notranslate">\; -</span><span\; class="notranslate">\; -</span><span\; class="notranslate">\; (</span>\mathrm{<span\; class="notranslate">\; 7</span>}<span\; class="notranslate">\; )</span>$

Among them, d is the center coefficient of the phase-orbit diagram of the chaotic attractor, which is related to the number of digits of the D/A converter, and d=32768; k is the proportional coefficient, and k=10000. The coefficient k can be simulated and debugged by AVR STUDIO to obtain the data of X _n , Y _n , and Z _n , and it can be determined by experiments under the condition that the maximum data value is not greater than 65536.

According to the algorithm (4)(5)(6)(7), the C program based on the microcontroller can be designed, and then the C program can be compiled by the ICC AVR compiler to generate the HEX execution code, which can be simulated and debugged by AVR STUDIO , the program flow chart shown in Figure 5, h takes 0.002. Before the iterative operation, first assign the initial values (x ₀ , y ₀ , z ₀ )=(1, 1, 1) to the three state variables that are not all zero, judge the switch states of K ₀ , K ₁ , and K ₂ , and determine the folding Direction and select the working mode of Lorenz-like system, Chen-like system or Lü-like system, select the iterative algorithm, and assign typical parameters a, b, c for iterative calculation. The iterative calculation adopts the double-precision formatting operation, and finally converts the numerical value and converts it into an integer format.

Using the Agilent DSO7032A digital oscilloscope, connect the "Y channel" to the V _z output terminal, and the "X channel" to the V _x output terminal, and you can observe the phase rail diagram output by the improved generalized Lorenz system on the x z plane under typical system parameters. As shown in Figure 6. Compared with the numerical simulation results of the improved generalized Lorenz system shown in Figure 1, it can be seen that the results of the two are completely consistent. At the same time, it is also known from the experimental results that the improved generalized Lorenz system can generate complex double-scroll folded attractors and single-scroll folded attractors, and the folding direction can be switched by the sign of the folding factor. The calculated values in the program use floating-point numbers. Since the calculation results only need to save the nth and n+1th related values, the RAM space of the microcontroller is not restricted by the number of iterations n, that is, the system hardware resources are not affected by n. .

Apparently, the above-mentioned embodiments are only examples for clearly illustrating the present invention, rather than limiting the implementation of the present invention. For those of ordinary skill in the art, other changes or changes in different forms can be made on the basis of the above description. It is not necessary and impossible to exhaustively list all the implementation manners here. And these obvious changes or modifications derived from the spirit of the present invention are still within the protection scope of the present invention.

Claims (3)

1. a chaotic signal generating circuit is characterized in that comprising: microcontroller, signal isolation circuit, a D/A change-over circuit, the 2nd D/A change-over circuit and the 3rd D/A change-over circuit;

Each D/A change-over circuit comprises one 16 shift register and one 16 DAC register, and the series connection successively of the shift register in each D/A change-over circuit, to constitute 48 bit shift register;

The serial digital signal (MISO) of the SPI interface output of microcontroller is sent into serial data input (the DATA IN of a D/A change-over circuit through signal isolation circuit _x), the clock signal (SCK) of described SPI interface output and latch control signal (SS) are sent into each D/A change-over circuit respectively through signal isolation circuit input end of clock (CLOCK) and latch control signal input (LATCH) are to realize distant serial synchronous telecommunications;

Described microcontroller is with three state variable x in the mathematic(al) representation of modified model Generalized Lorenz system _n, y _n, z _nDo linear transformation in proportion, make described three state variable x _n, y _n, z _nDynamic amplitude narrow down to 1/10, and carry out discretization and handle, obtain then on the basis of discretization iterative algorithm expression formula of class Lorenz system, class Chen system or class L ü system, calculate described three state variable x according to the discretization iterative algorithm expression formula of described class Lorenz system, class Chen system or class L ü system _n, y _n, z _nThe data of floating number type, then the data of this floating number type are converted to the data of integer type, to export as described serial digital signal (MISO);

Whenever the clock rising edge of input end of clock (CLOCK) when taking place, described serial digital signal (MISO) is through serial data input (the DATA IN of signal isolation circuit from a described D/A change-over circuit _x) serial enters described 48 bit shift register, and the 48th clock rising edge edge at input end of clock (CLOCK) come then, make described latch control signal input (LATCH) produce a rising edge edge, so that 16 bit data in 16 bit shift register in each D/A change-over circuit are loaded in the corresponding D AC register immediately, respectively organize 16 bit data then and be latched and drive digital-to-analogue conversion, thereby realize V _x, V _y, V _zThe synchronous output of chaotic signal.

2. chaotic signal generating circuit according to claim 1 is characterized in that: at the voltage signal output end (V of each D/A change-over circuit _OUT) be provided with variable-gain amplification circuit, and the dynamic range of the output voltage of this variable-gain amplification circuit be 0V～+ 10V.

3. chaotic signal generating circuit according to claim 2 is characterized in that: the switch control end of described microcontroller is provided with three control switch (K ₀, K ₁And K ₂), microcontroller is by judging the logic state of each control switch, the selection of the selection of the discretization iterative algorithm pattern of realization class Lorenz system, class Chen system, class L ü system and the folding direction of chaos attractor.

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