CN206363629U - A kind of new lissajous figures apparatus for demonstrating - Google Patents
A kind of new lissajous figures apparatus for demonstrating Download PDFInfo
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- CN206363629U CN206363629U CN201621401246.0U CN201621401246U CN206363629U CN 206363629 U CN206363629 U CN 206363629U CN 201621401246 U CN201621401246 U CN 201621401246U CN 206363629 U CN206363629 U CN 206363629U
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Abstract
The utility model is related to physical experiment apparatus field, especially a kind of new lissajous figures apparatus for demonstrating, including core control circuit, waveform shaping circuit and sine wave restoring circuit, core control circuit includes microprocessor, sinusoidal signal generator, input module and display module, waveform shaping circuit includes signal amplification circuit and level comparison circuit, and sine wave restoring circuit includes pure resistance potential-divider network, programmable filter I, programmable filter II, phase shifter and frequency divider.The utility model beneficial effect：Control sinusoidal signal generator to produce sinusoidal signal by microprocessor, by the square-wave signal obtained by shaping point two-way, send into CPLD divided and phase shift all the way, and the signal feeding program control filtering module I after frequency dividing and phase shift is filtered；Another road is sent directly into programmable filter II and is filtered, and this two paths of signals finally is sent into pure resistance potential-divider network again carries out partial pressure, then by the signal obtained by partial pressure send into oscillograph just can with arrive corresponding lissajous figures, with very strong practicality.
Description
Technical field
The utility model is related to physical experiment apparatus field, especially a kind of new lissajous figures apparatus for demonstrating.
Background technology
Lissajous figures be as two frequencies in mutually perpendicular direction into simple integer than simple harmonic oscillation synthesized by
Rule, stable closed curve.With the development of science and technology, Lie groupoid application field is more and more extensive:Utilize Lee's Sa
As figure is all widely used in terms of frequency calculating, measurement frequency stability, chaos phenomenon.Simultaneously can by lissajous figures
To measure the frequency ratio and phase difference of two signals.In addition lissajous figures are physics, the important content of telecommunications course, because
This designs a set of performance stabilization, and compact conformation, lissajous figures apparatus for demonstrating simple to operate will have wide market
Prospect.
Conventional lissajous figures apparatus for demonstrating is mainly based upon the lissajous figures apparatus for demonstrating of Mechanical Method synthesis at present
With the lissajous figures apparatus for demonstrating based on laser.Chen Xinlian, Geng Qingming et al. propose one kind and synthesize Lee's Sa using Mechanical Method
Such as apparatus for demonstrating (CN201520101843) of figure, including control circuit, it is characterized in that：The control circuit connection driving electricity
Road, the drive circuit connects four motors, and each motor connects a gear, each gear
Edge is provided with to be connected between connecting rod one, projection described in another two between the projection that can be rotated, two projections and connected
There is connecting rod two, the connecting rod one and the connecting rod two are mutually perpendicular to and both pass through contiguous block, and the side of the contiguous block is provided with
Paintbrush.This apparatus for demonstrating can slowly show the biosynthesis locus of lissajous figures, can clearly show X-direction and
The frequency ratio and phase difference of Y-direction, show the starting point synthesized when each frequency ratio and each phase difference and direction, and can be with
Individually carry out the demonstration of the simple harmonic oscillation of a direction.Tong Peixiong, Zhao Zhong et al. propose a kind of laser Lissajous figure and drilled
Show instrument (CN03228653) instrument with the prescription of X, Y two to vibrator and laser constitution demonstrator.Two groups of vibrators are equal
It is to be passed through by vibrator bar in the middle of coil, and is in again between two pole pieces, is formed when coil is connected with sine-wave current
Vibration, laser is radiated at speculum formation conjunction that is reflected on the speculum of vibrator bar X one end and reaching vibrator bar Y one end and shaken
It is dynamic.Two vibration frequencies are adjusted into ratio of integers, then demonstrate lissajous figures.Both devices have it is complicated, it is cumbersome,
The features such as performance is unstable.
Therefore, it is necessary to propose a kind of new lissajous figures apparatus for demonstrating for above mentioned problem.
Utility model content
The utility model purpose is to overcome deficiency of the prior art to demonstrate there is provided a kind of new lissajous figures
Device.
In order to solve the above-mentioned technical problem, the utility model is to be achieved through the following technical solutions：
A kind of new lissajous figures apparatus for demonstrating, it is characterised in that：Including core control circuit, waveform shaping circuit
With sine wave restoring circuit, the core control circuit includes microprocessor, sinusoidal signal generator, input module and display mould
Block, the waveform shaping circuit includes signal amplification circuit and level comparison circuit, and the sine wave restoring circuit includes pure electricity
Hinder potential-divider network, programmable filter I, programmable filter II, phase shifter and frequency divider；The input module transmits touch signal
Into microprocessor, the display module is aobvious to carry out presentation of information to microprocessor, and the microprocessor is sent out by sinusoidal signal
Raw device is connected with signal amplifier, and the signal amplifier accesses phase shifter and frequency divider by the square wave I of level comparison circuit,
The access programmable filter II of square wave II of the level comparison circuit, the programmable filter I and programmable filter II pass through
The external oscillograph of pure resistance potential-divider network, the phase shift instruction of the microprocessor is transferred to phase shifter, point of the microprocessor
Frequency coefficient is transferred to frequency divider.
Preferably, the microprocessor uses STM32F103ZET6, and the sinusoidal signal generator uses AD9850, institute
State input module and display module uses TFT touch screen, the signal amplifier uses LM318, and the voltage comparator is used
LM311, the frequency divider and phase shifter carry out phase shift using CPLD, and the programmable filter I and programmable filter II are adopted
Use MAX262.
Preferably, the signal amplification circuit includes the first amplifier, the first electric capacity, the second electric capacity, the 3rd electric capacity, the 4th
Electric capacity, first resistor, second resistance, 3rd resistor and the 4th resistance, the level comparison circuit include level comparator, the 5th
Electric capacity, the 6th electric capacity, the 7th electric capacity, the 8th electric capacity and the 9th electric capacity；One end of first electric capacity is accessed by first resistor
The inverting input of first amplifier, the inverting input of first amplifier is connect by second resistance and the second electric capacity respectively
Enter the output end of the first amplifier, the in-phase input end distribution of first amplifier passes through the 3rd electric capacity, 3rd resistor, the 4th
Electric capacity and the 4th resistance access the cathode output end of the first amplifier；The output end of first amplifier also passes through the 5th electric capacity
The anti-phase input of level comparator is accessed, the cathode output end of the level comparator passes through the 6th electric capacity and the 7th electric capacity respectively
Ground connection, the cathode output end of the level comparator passes through the 8th electric capacity and the 9th capacity earth respectively.
Preferably, the 3rd end pin of the microprocessor passes sequentially through the tenth electric capacity, the 5th resistance and the 6th resistance eutral grounding,
20th end pin of the microprocessor passes sequentially through the 11st electric capacity, the 7th resistance and the 8th resistance eutral grounding.
The utility model beneficial effect：Sinusoidal signal generator is controlled to produce sinusoidal signal by microprocessor, and will production
Carried out in signal amplifier and level comparison circuit that raw sinusoidal signal feeding is made up of signal amplifier and voltage comparator
Shaping；By the square-wave signal obtained by shaping point two-way, send into CPLD divided and phase shift all the way, and by after frequency dividing and phase shift
Signal feeding program control filtering module I be filtered；Another road is sent directly into the filtering of the row of program control filtering module II, wherein frequency dividing system
Number and phase shift phase step are freely set by user by TFT touch screen.Finally again by this two paths of signals feeding pure resistance point
Pressure network network carry out partial pressure, then by obtained by partial pressure signal send into oscillograph just can with arrive corresponding lissajous figures, tool
There is very strong practicality.
The technique effect of design of the present utility model, concrete structure and generation is made furtherly below with reference to accompanying drawing
It is bright, to be fully understood from the purpose of this utility model, feature and effect.
Brief description of the drawings
Fig. 1 is structural representation of the present utility model；
Fig. 2 is the core control circuit figure of the utility model embodiment；
Fig. 3 is the waveform shaping circuit of the utility model embodiment；
Fig. 4 is the sine wave restoring circuit figure of the utility model embodiment.
Embodiment
Embodiment of the present utility model is described in detail below in conjunction with accompanying drawing, but the utility model can be by right
It is required that the multitude of different ways for limiting and covering is implemented.
Such as Fig. 1 and with reference to shown in Fig. 2 to Fig. 4, a kind of new lissajous figures apparatus for demonstrating, it is characterised in that：Including
Core control circuit, waveform shaping circuit and sine wave restoring circuit, the core control circuit include microprocessor, sinusoidal letter
Number generator, input module and display module, the waveform shaping circuit include signal amplification circuit and level comparison circuit, institute
Stating sine wave restoring circuit includes pure resistance potential-divider network, programmable filter I, programmable filter II, phase shifter and frequency divider；Institute
State input module touch signal is transferred in microprocessor, the display module is aobvious to carry out presentation of information, institute to microprocessor
State microprocessor to be connected with signal amplifier by sinusoidal signal generator, the signal amplifier passes through level comparison circuit
Square wave I accesses phase shifter and frequency divider, the access programmable filter II of square wave II of the level comparison circuit, the program control filtering
Device I and programmable filter II are by the external oscillograph of pure resistance potential-divider network, and the phase shift instruction of the microprocessor is transferred to
Phase shifter, the divide ratio of the microprocessor is transferred to frequency divider.
Further, the microprocessor uses STM32F103ZET6, and the sinusoidal signal generator uses AD9850,
The input module and display module use TFT touch screen, and the signal amplifier uses LM318, and the voltage comparator is adopted
With LM311, the frequency divider and phase shifter carry out phase shift and frequency dividing, the programmable filter I and program control filtering using CPLD
Device II uses MAX262.
Further, the signal amplification circuit includes the first amplifier Q1, the first electric capacity C1, the second electric capacity C2, the 3rd
Electric capacity C3, the 4th electric capacity C4, first resistor R1, second resistance R2,3rd resistor R3 and the 4th resistance R4, the level are more electric
Road includes level comparator Q2, the 5th electric capacity C5, the 6th electric capacity C6, the 7th electric capacity C7, the 8th electric capacity C8 and the 9th electric capacity C9；Institute
The one end for stating the first electric capacity C1 accesses the first amplifier Q1 inverting input, the first amplifier Q1 by first resistor R1
Inverting input the first amplifier Q1 output end is accessed by second resistance R2 and the second electric capacity C2 respectively, described first puts
Big device Q1 in-phase input end distribution passes through the 3rd electric capacity C3,3rd resistor R3, the 4th electric capacity C4 and the 4th resistance R4 accesses the
One amplifier Q1 cathode output end；The output end of the first amplifier Q1 also accesses level comparator by the 5th electric capacity C5
Q2 anti-phase input, the cathode output end of the level comparator Q2 is grounded by the 6th electric capacity C6 and the 7th electric capacity C7 respectively,
The cathode output end of the level comparator Q2 is grounded by the 8th electric capacity C8 and the 9th electric capacity C9 respectively.
Further, the 3rd end pin of the microprocessor passes sequentially through the tenth electric capacity C10, the 5th resistance R5 and the 6th electricity
R6 ground connection is hindered, the 20th end pin of the microprocessor passes sequentially through the 11st electric capacity C11, the 7th resistance T7 and the 8th resistance R8
Ground connection.
Case study on implementation：Lissajous figures apparatus for demonstrating microprocessor uses 32 ARM- of ST ST Microelectronics
The STM32F103ZET6 microprocessors of Cortex M3 frameworks are as main body control core, and its working frequency is maximum up to 72M；Just
String signal generator uses the DDS chip AD9850 of ADI companies, energy directly 2 road sine waves of the output frequency in 0-40MHZ；Letter
Number amplifier uses LM318 chips, and this is a high speed operation amplifier, and gain bandwidth product is 15MHZ；Level comparison circuit is adopted
Use LM311 chips；The programmable logic device (CPLD) that frequency divider and phase shifter are released using ATLTRA companies
EPM570T100C5 is divided and phase shift, and divide ratio and adjustable phase step-length can be controlled by program；Program control filtering
Device produces MAX262 chips using MAXIM companies, and this is the double second order universal switch electric capacity active filters of a CMOS, can be by micro-
Processor accurately controls filter function, can be configured to low pass, high pass, with logical, trap and all-pass filter, and without external electrical
Road, can be configured by program to centre frequency f0, quality factor q and working method MODE；Potential-divider network uses pure resistance
Potential-divider network；Instruction input module and result display module use TFT touch screen.
As shown in figure 1, a kind of new lissajous figures apparatus for demonstrating is by core control circuit, waveform shaping circuit and just
String ripple restoring circuit is constituted.Core control circuit includes microprocessor, sinusoidal signal generator module and CPLD, its major function
It is that driving sinusoidal signal generator produces sine wave signal, receives the input instruction of TFT touch screen and show the result of system
In TFT touch screen, while sending corresponding frequency dividing and phase shift instruction to CPLD.Waveform shaping circuit comprising signal amplifier,
Level comparison circuit, its major function is that the sinusoidal signal for producing sinusoidal signal generator carries out amplitude amplification and by its shaping
Into square-wave signal.Sine wave restoring circuit is made up of CPLD, programmable filter and pure resistance potential-divider network, its major function be by
The square-wave signal handled reverts to the sine wave signal for synthesizing lissajous figures.Pass through microprocessor first
STM32F103ZET6 receives the instruction inputted from TFT touch screen, so as to control sinusoidal signal generation module AD9850 to produce just
String signal, sinusoidal signal is shaped as corresponding square-wave signal by signal amplifier LM318 and level comparison circuit LM311.Will
The square-wave signal of generation point square wave 1 and the two-way of square wave 2, the feeding CPLD and program control filtering module 1MAX262 of square wave 1 carry out corresponding
Phase shift, frequency dividing and filtering, wherein divide ratio, phase shift phase difference are keyed in by user from touch-screen；Square wave 2 is sent directly into journey
Control filtration module 2 is filtered；Then the two paths of signals exported program control filtering module 1 and program control filtering module 2 sends into pure electricity
Resistance potential-divider network just can obtain frequency than for integer and having the two-way sinusoidal signal 1 and sinusoidal signal 2 of certain phase difference, by this two
Road sinusoidal signal feeding oscillograph just can obtain the lissajous figures with the different frequency stabilization poorer than with out of phase.This is
System has simple structure, the characteristics of simple to operate and performance is stable.
As shown in Fig. 2 the data pins of the TFT color screen touch screen module in the core circuit of lissajous figures apparatus for demonstrating
DB0 and DB1 are connected with STM32F103ZET6 PD14 and PD15 respectively, and DB2, DB3 are connected with itself PD0 and PD1 pin respectively,
DB4 to DB12 is connected respectively STM32F103ZET6 PE7 to PE15 pins, DB13 to DB15 connect respectively PD8, PD9,
Tri- pins of PD10, processor can be write or read data to TFT color screen by these data pins；When chip selection signal CS pipes
When pin is high level, TFT color screen is enabled, and TFT color screen is disabled when for low level, the PG12 pins of this pin and processor
It is connected；Data-/ command control end RS is command mode when being low level, is data pattern when being set to high level, this pin with
STM32F103ZET6 PG0 is connected；RD and WR pins are respectively the Read-write Catrol pin of TFT color screen, the two pins and Wei Chu
Manage PD4 the and PD5 pins connection of device；T_CLK pins provide reference clock letter to touch clock input pin for touch function
Number, this pin is connected with the PC0 pins of microprocessor；T_CS pins are that touch function enables pin, when this pin is high level
When touch function be opened, touch function is closed when for low level, and this pin is connected with STM32F103ZET6 PC1 pin；
T_D0 be touch function data output pins, T_DIN be touch data input pin, the two pins respectively with microprocessor
PC2 is connected with PC3；T_IRQ is touch function interrupt pin, and when there is touch signal interim, this pin can produce interrupt signal,
The pin is connected with the PC10 of microprocessor, is used as interrupting input；RST be TFT color screen reset signal, this pin with
STM32F103ZET6 NRST pin are connected, and just it is resetted when electric system is firm.CPLD P40-P47 pins difference
It is connected with the PE0-PE7 pins of microprocessor, as address input pin；；The PB0- of P50-P65 pins respectively with microprocessor
PBE is connected, and is the input pin of divide ratio and phase shift signal, to the frequency divider in CPLD and phase shifter provide divide ratio and
The phase shift number of degrees；CPLD P49 pins are connected with STM32F103ZET6 PA8 pins, when pin is high, choose phase shift coefficient
Input, when pin is low, chooses divide ratio to input.AD9850 WCLK and STM32F103ZET6 PG8 are connected, this pin
For providing clock signal to loading frequency plot control word；RESET pins are connected with PG9, multiple when this pin is high level
Position AD9850；FQ_UD pins are connected with STM32F103ZET6 PG10 pin, and when this pin is rising edge, AD9850 is by basis
Data renewal frequency and phase in input register；AD9850 D0 to D7 pins and STM32F103ZET6 PA0 to PA7
Pin is connected, and these pins are used to load frequency and phase control words to AD9850.
As shown in figure 3, in the waveform shaping circuit figure of lissajous figures apparatus for demonstrating comprising LM318 operational amplifiers and
LM311 comparators.When amplitude inputs for V_INPUT sinusoidal signal from the port of amplifier 2, entered LM318 amplification, then from
The amplitude of 6 ports output sine wave signal will be changed intoAmplification can be adjusted by adjusting R2 and R1 value
Multiple；Then in the sinusoidal signal feeding LM311 comparators after amplifying through LM318, when the voltage amplitude of LM311 comparator terminals
More than 3 ends reference voltage Reference_Vcc when the end of output end 7 will export low level, when the voltage amplitude at the ends of LM311 3 is small
The end of output end 7 will export high level when 2 end reference voltage Reference_Vcc.Like this by waveform shaping circuit with regard to energy
Enough sinusoidal signals for producing sinusoidal signal generator are shaped to the square-wave signal that amplitude is of moderate size and can handled by CPLD.
As shown in figure 4, CPLD phase shifters and frequency divider are included in the sine wave restoring circuit of lissajous figures apparatus for demonstrating,
MAX262 programmable filters, pure resistance potential-divider network.Two-way is divided into by the square wave obtained by waveform shaping circuit, given all the way
CPLD is divided and phase shift, and CPLD is according to receiving from the microprocessor STM32F103ZET6 frequency dividings sended over and phase shift
Instruction carries out frequency dividing and phase shift accordingly, the programmable filter that will then divide and the complete square-wave signal of phase shift is sent into MAX262
1 is filtered, and its input port is INA；The programmable filter 2 being directly fed to all the way in MAX262 is filtered, its input
Mouth is INB.Two wave filters in wherein MAX262 are each configured to low pass filter pattern, their cut-off frequency by
CPLD in MAX262_IO is configured, the clock frequency of programmable filter 1 and programmable filter 2 in MAX262 also by
CPLD_IO in MAX262_IO is provided.Finally by the output port HPA of programmable filter 1 and the output port HPB of programmable filter 2
The signal output exported gives the pure resistance potential-divider network being made up of 10K swept resistances and 1k fixed resistances to carry out partial pressure, just can be with
Frequency is obtained than for integer and having the two-way sinusoidal signal of certain phase difference.This two-way sinusoidal signal feeding oscillograph just can be obtained
To lissajous figures.
The utility model beneficial effect：Sinusoidal signal generator is controlled to produce sinusoidal signal by microprocessor, and will production
Carried out in signal amplifier and level comparison circuit that raw sinusoidal signal feeding is made up of signal amplifier and voltage comparator
Shaping；By the square-wave signal obtained by shaping point two-way, send into CPLD divided and phase shift all the way, and by after frequency dividing and phase shift
Signal feeding program control filtering module I be filtered；Another road is sent directly into the filtering of the row of program control filtering module II, wherein frequency dividing system
Number and phase shift phase step are freely set by user by TFT touch screen.Finally again by this two paths of signals feeding pure resistance point
Pressure network network carry out partial pressure, then by obtained by partial pressure signal send into oscillograph just can with arrive corresponding lissajous figures, tool
There is very strong practicality.
Preferred embodiment of the present utility model described in detail above.It should be appreciated that the ordinary skill people of this area
Member just can make many modifications and variations without creative work according to design of the present utility model.Therefore, all this technology necks
Technical staff passes through logic analysis, reasoning or limited reality on the basis of existing technology according to design of the present utility model in domain
Available technical scheme is tested, all should be in the protection domain being defined in the patent claims.
Claims (7)
1. a kind of new lissajous figures apparatus for demonstrating, it is characterised in that：Including core control circuit, waveform shaping circuit and
Sine wave restoring circuit, the core control circuit includes microprocessor, sinusoidal signal generator, input module and display mould
Block, the waveform shaping circuit includes signal amplification circuit and level comparison circuit, and the sine wave restoring circuit includes pure electricity
Hinder potential-divider network, programmable filter I, programmable filter II, phase shifter and frequency divider；
Touch signal is transferred in microprocessor by the input module, and the display module is aobvious to be entered row information to microprocessor and show
Show, the microprocessor is connected by sinusoidal signal generator with signal amplifier, the signal amplifier is compared by level
The access phase shifter of square wave I and frequency divider of circuit, the access programmable filter II of square wave II of the level comparison circuit, the journey
Wave filter I and programmable filter II are controlled by the external oscillograph of pure resistance potential-divider network, the phase shift of the microprocessor is instructed
Phase shifter is transferred to, the divide ratio of the microprocessor is transferred to frequency divider.
2. a kind of new lissajous figures apparatus for demonstrating as claimed in claim 1, it is characterised in that：The microprocessor is adopted
With STM32F103ZET6, the sinusoidal signal generator uses AD9850, and the input module and display module are touched using TFT
Screen is touched, the signal amplifier uses LM318, and the voltage comparator uses LM311.
3. a kind of new lissajous figures apparatus for demonstrating as claimed in claim 1, it is characterised in that：The frequency divider and shifting
Phase device carries out phase shift using CPLD, and the programmable filter I and programmable filter II use MAX262.
4. a kind of new lissajous figures apparatus for demonstrating as claimed in claim 1, it is characterised in that：The signal amplification electricity
Road includes the first amplifier, the first electric capacity, the second electric capacity, the 3rd electric capacity, the 4th electric capacity, first resistor, second resistance, the 3rd electricity
Resistance and the 4th resistance, the level comparison circuit include level comparator, the 5th electric capacity, the 6th electric capacity, the 7th electric capacity, the 8th electricity
Hold and the 9th electric capacity.
5. a kind of new lissajous figures apparatus for demonstrating as claimed in claim 4, it is characterised in that：First electric capacity
One end accesses the inverting input of the first amplifier by first resistor, and the inverting input of first amplifier passes through respectively
Second resistance and the second electric capacity access the output end of the first amplifier, and the in-phase input end of first amplifier is respectively by the
Three electric capacity, 3rd resistor, the 4th electric capacity and the 4th resistance access the cathode output end of the first amplifier.
6. a kind of new lissajous figures apparatus for demonstrating as claimed in claim 4, it is characterised in that：First amplifier
Output end also pass through the 5th electric capacity access level comparator anti-phase input, the level comparator cathode output end difference
By the 6th electric capacity and the 7th capacity earth, the cathode output end of the level comparator passes through the 8th electric capacity and the 9th electricity respectively
Hold ground connection.
7. a kind of new lissajous figures apparatus for demonstrating as claimed in claim 1, it is characterised in that：The microprocessor
3rd end pin passes sequentially through the tenth electric capacity, the 5th resistance and the 6th resistance eutral grounding, and the 20th end pin of the microprocessor is successively
Pass through the 11st electric capacity, the 7th resistance and the 8th resistance eutral grounding.
Priority Applications (1)
| Application Number | Priority Date | Filing Date | Title |
|---|---|---|---|
| CN201621401246.0U CN206363629U (en) | 2016-12-20 | 2016-12-20 | A kind of new lissajous figures apparatus for demonstrating |
Applications Claiming Priority (1)
| Application Number | Priority Date | Filing Date | Title |
|---|---|---|---|
| CN201621401246.0U CN206363629U (en) | 2016-12-20 | 2016-12-20 | A kind of new lissajous figures apparatus for demonstrating |
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| Publication Number | Publication Date |
|---|---|
| CN206363629U true CN206363629U (en) | 2017-07-28 |
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ID=59374692
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| CN201621401246.0U Expired - Fee Related CN206363629U (en) | 2016-12-20 | 2016-12-20 | A kind of new lissajous figures apparatus for demonstrating |
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Cited By (4)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| CN110098818A (en) * | 2019-05-29 | 2019-08-06 | 中电国基南方有限公司 | A kind of digital phase shifter |
| CN110531103A (en) * | 2019-09-30 | 2019-12-03 | 浙江海洋大学 | A kind of light velocity measurement method and apparatus based on Lissajou's figure |
| CN112436748A (en) * | 2020-11-17 | 2021-03-02 | 天津津航计算技术研究所 | Digital sine wave circuit based on CPLD |
| CN115016114A (en) * | 2021-03-03 | 2022-09-06 | 中国科学院苏州纳米技术与纳米仿生研究所 | Laser scanning system and method |
-
2016
- 2016-12-20 CN CN201621401246.0U patent/CN206363629U/en not_active Expired - Fee Related
Cited By (4)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| CN110098818A (en) * | 2019-05-29 | 2019-08-06 | 中电国基南方有限公司 | A kind of digital phase shifter |
| CN110531103A (en) * | 2019-09-30 | 2019-12-03 | 浙江海洋大学 | A kind of light velocity measurement method and apparatus based on Lissajou's figure |
| CN112436748A (en) * | 2020-11-17 | 2021-03-02 | 天津津航计算技术研究所 | Digital sine wave circuit based on CPLD |
| CN115016114A (en) * | 2021-03-03 | 2022-09-06 | 中国科学院苏州纳米技术与纳米仿生研究所 | Laser scanning system and method |
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