CN101826843A - Variable gain amplifier for linearity optimization at low gain - Google Patents

Abstract

The invention discloses a variable gain amplifier (VGA) for linearity optimization at low gain, belonging to the technical field of analogue integrated circuits. The variable gain amplifier adopts pseudo-indexes to approximately realize linear variation by decibel. The variable gain amplifier is formed by a variable transconductance array, a bias current array, a digital control circuit, a transistor variable load connected with a diode, and a common-mode feedback circuit. The VGA realizes the variable gain of the VGA through changing the bias current of the variable transconductance and the variable load and realizes the linearity optimization when the gain of the VGA is low. Since the bias current of the variable transconductance array is very small at low gain, the variation of the width-to-length ratio effective value of the variable transconductance array does not have great impacts on the overall power consumption of the VGA. A circuit structure can be realized by using a CMOS technology.

Description

A kind of when low gain the variable gain amplifier of linearity optimization

Technical field

The invention belongs to the analog integrated circuit technical field, be specifically related to a kind of variable gain amplifier (variable gain amplifier, design VGA) of linearity optimization when low gain.Can be used as the Analog Baseband rear end of wireless communication receiver, the pre-driver amplifier use of analog to digital converter.

Background technology

VGA is positioned at the analog back-end of wireless communication receiver, and in conjunction with AGC (automatic gain control) system, it can increase or the signal power that reduces to receive drives analog to digital converter with coupling.Programmable gain amplifier (programmable gain amplifier with respect to discrete adjustment, PGA), the significant advantage of the VGA of analog signal control just is that it can regulate change in gain continuously, be that its gain step size can be infinitely small, this is vital for improving wireless communication receiver gain accuracy.

The approximate VGA of pseudoindex is a kind of common analog signal control VGA, and its basic circuit structure as shown in Figure 2.Its gain can be expressed as:

$A_V={\left(\frac{\frac{I_{\mathrm{bias}}}{K(V_{\mathrm{bias}}-V_{\mathrm{th}})}+{(1+\frac{V_{\mathrm{ctrl}}}{(V_{\mathrm{bias}}-V_{\mathrm{th}})})}^2}{\frac{I_{\mathrm{bias}}}{K(V_{\mathrm{bias}}-V_{\mathrm{th}})}+{(1-\frac{V_{\mathrm{ctrl}}}{(V_{\mathrm{bias}}-V_{\mathrm{th}})})}^2}\right)}^{\frac{1}{2}}\≈e^{\frac{V_{\mathrm{ctrl}}}{(V_{\mathrm{bias}}-V_{\mathrm{th}})}}---\left(1\right)$

Wherein K is a technological parameter.As can be seen, gain decibels and V _CtrlLinear, promptly satisfy by decibel linear (dB-linear) variation.From (1) as can be seen, A _VWith V _CtrlGain curve about former dot center symmetry, in other words, how many gain rangings are this structure have, it just has the attenuation range of equity simultaneously.Therefore, the VGA of this structure usually and the amplifier cascade of one-level fixed gain to realize positive variable gain, concrete structure is as shown in Figure 3, the one-level pseudoindex is approximate, the VGA of gain ranging-20～20dB and the cascade of one-level 20dB fixed gain amplifier just can realize the VGA of 0～40dB.

The problem that exists

The VGA that pseudoindex is similar to promptly under Shuai Jian the situation, the situation that the linearity worsens significantly can occur in little gain.Observe the transconductance structure in Fig. 2 frame of broken lines, can draw following relational expression:

$I_p-I_n=K(V_p-V_n)\sqrt{\frac{4I_{\mathrm{bias}}}{K}-{(V_p-V_n)}^2}---\left(2\right)$

According to (2) formula, we can draw output difference current I _p-I _nWith input difference voltage V _p-V _nRelation as shown in Figure 4.From Fig. 4, we as can be seen, the main cause that the general differential configuration linearity worsens is exactly a tail current to restriction that can the processing signals amplitude of oscillation, if tail current determines that then circuit just can only be handled the signal of certain amplitude of oscillation, promptly among Fig. 4-Δ V～+ Δ V.In the approximate VGA of pseudoindex, because the biasing of variable transconductance can change, the signal handling capacity of VGA reduces and reduces with gain, when VGA is in least gain, its signal swing that can handle is very little, and this just fails to agree with the original intention that wireless receiver designs.In a wireless receiver, it is for following purpose that the designer designs VGA: when the signal amplitude that receives hour, VGA realizes big gain, signal is amplified significantly the coupling of realization and analog to digital converter (being that enough voltage output drives analog to digital converter to satisfy conversion accuracy); When the signal amplitude that receives was big, VGA realized little gain even zero gain, and signal is amplified by a small margin or do not amplify, the coupling of same realization and analog to digital converter.Therefore when the little gain of VGA, general all is to handle large-signal, if do not solve this problem that limits of the VGA processing signals amplitude of oscillation of little when gain, then place the input of this VGA will inevitably cause very severe nonlinear a large-signal, gain will inevitably seriously be compressed.

Summary of the invention

The purpose of this invention is to provide the approximate VGA of a kind of pseudoindex, and its under the low gain situation by the improvement of circuit structure, widen its manageable signal swing, to satisfy the needs of receiver design.

VGA provided by the invention, structure as shown in Figure 1, this VGA is by the variable transconductance array, the bias current array, digital control circuit, transistor variable load that diode connects and common mode feedback circuit constitute.Wherein:

Each weight of variable transconductance array all increases with 2 index power, with the variation of coupling bias current.Effective transconductance value of variable transconductance array is controlled by digital controlled signal, and the switch of Digital Signals is arranged in the transistorized grid end of each mutual conductance of array.

Each weight of bias current array of variable transconductance increases with 2 index power, and changes in the opposite direction with effective transconductance value of variable transconductance array.The bias current array is controlled by digital controlled signal, and the switch of Digital Signals is arranged in the grid end of each bias transistor of array.

Load is the active load that diode connects.In the ideal case, for the variable gain scope that makes variable gain amplifier about the 0dB symmetry, and realize the domain coupling, the transistorized breadth length ratio of active load that diode connects should effectively breadth length ratio be identical with variable transconductance array maximum.

Common mode electrical level in the common mode feedback loop extracts must be than the equiva lent impedance of active load big one more than the order of magnitude, to reduce its influence to the variable gain amplifier gain of resistance (R among Fig. 1).

Identical with principle shown in Figure 1 but adopt with Fig. 1 in complementary PMOS transistor as the element of variable transconductance, and/or adopt the variable gain amplifier structure of overhead bias current array.

Identical with principle shown in Figure 1 but increased the variable gain amplifier structure of the figure place of variable transconductance array and current offset array.

Among the present invention, the variable transconductance array is an example with NMOS pipe array, the source electrode of all NMOS pipes in the array links to each other with node 1, be the point of contact of node 1 for all NMOS pipe source electrodes, NMOS pipe grid are connected with input signal by switch, and the NMOS pipe leaks node 2 and the node 3 that is connected among Fig. 1, i.e. the difference of VGA output, be the point of contact of node 2 for the drain electrode of a part of NMOS pipe, node 3 is the point of contact of another part NMOS pipe drain electrode; The breadth length ratio of NMOS increases according to 2 index power in the variable transconductance array; Current offset array pipe is the NMOS pipe, and the drain terminal of all NMOS pipes links to each other with node 1 in the array, promptly links to each other with the source electrode of all NMOS pipes in the variable transconductance array, and the grid of all NMOS pipes are connected to external analog control voltage V by switch in the current offset pipe _Bias+ V _Ctrl, V wherein _BiasBe fixed bias voltage, V _CtrlBe variable analog control voltage, can realize that by changing it gain changes by decibel linearity (dB-linear), the breadth length ratio of NMOS pipe increases according to 2 index power in the current offset array; The opening or turn-offing of the Signal-controlled switch of digital control circuit, change the effective value of variable transconductance breadth length ratio and current offset, digital controlled signal is produced by comparator, and the designer can think that setting a plurality of (being 3 among Fig. 1) threshold voltage opening or turn-offing of control switch according to technology and linearity index; The transistor that diode connects is as the load of VGA, its drain terminal and grid end are connected to node 2 and node 3, difference output as VGA, its source end is connected to node 4, link to each other with the drain terminal of the bias current NMOS pipe of loading section, the grid end of the bias current NMOS pipe of loading section is connected to analog control voltage V _Bias-V _CtrlFor the coupling of realize gaining symmetry and domain, the load pipe that diode connects with and the breadth length ratio of current offset should be identical with the maximum breadth length ratio of variable transconductance array and current offset array accordingly; The common mode electrical level of common-mode feedback extracts resistance and is connected between the difference output end (node 2 or node 3) and node 5 of VGA, and Fig. 1 has saved common mode feedback loop.

Improvements of the present invention and operation principle

Thinking of the present invention derives from Fig. 4, because the signal amplitude that the decline of the bias current of VGA mutual conductance pipe causes handling under the low gain situation descends, if under the low gain situation, increase the bias current of mutual conductance pipe, the linearity of VGA will be taken on a new look to some extent so, if the while keeps the gain of VGA this moment constant, then the VGA gain just can not be destroyed by decibel characteristic that linear (dB-linear) changes.Transistorized transconductance value can be represented by (3) formula:

$\mathrm{gm}=\sqrt{2\mathrm{\μ}{C}_{\mathrm{ox}}\frac{W}{L}{I}_{\mathrm{bias}}}---\left(3\right)$

Under the low gain situation, if with I _BiasIncrease to original twice, simultaneously the breadth length ratio of mutual conductance pipe is reduced to originally 1/2nd, does not change the transconductance value of mutual conductance pipe when then can increase bias current in theory, does not destroy gain characteristic curve.So the design just considers mutual conductance pipe and the effective array format of current offset are realized, and the weight of each is according to 2 index power growth.When processing signals, along with reducing of VGA gain, the biased electrical of mutual conductance pipe corresponding the diminishing that fail to be convened for lack of a quorum, when the linearity deteriorates into to a certain degree, i.e. V _Bias+ V _CtrlWhen being reduced to certain threshold voltage, can close certain transistor in the mutual conductance array by comparator, make the effective value of its breadth length ratio be reduced to original 1/2nd, simultaneously, certain transistor of current offset array conducting of variable transconductance array, make its effective bias current increase to original twice, thereby the holding circuit transconductance value is constant.When the bias current of variable transconductance increases to original twice, suppose that other characteristics are constant, the signal swing that circuit can be handled can increase to original twice in theory, and this can be as can be seen from Figure 4.

In actual design, transconductance value was discontinuous before and after switch is turn-offed or opened to a subject matter exactly, when the designer is original 1/2nd with the reducing of effective breadth length ratio of mutual conductance array (increase), perhaps the effective breadth length ratio of pipe in the current offset array of variable transconductance array is increased (reducing) and be original 1/2nd, the transconductance value of circuit might not remain unchanged, this might be the deviation owing to pipe technology, and perhaps second-order effect (as bulk effect) causes.So when design, can adjust according to actual conditions.

Description of drawings

Fig. 1 VGA electrical block diagram of the present invention.

The approximate VGA structural representation of pseudoindex that Fig. 2 is general.

The implementation method of Fig. 3 postiive gain VGA.

Fig. 4 fully differential structure difference output current and difference input voltage graph of a relation.

The circuit diagram of the concrete embodiment of Fig. 5 the design.

Under Fig. 6 (a) 000 situation, by the circuit gain of AC emulation.

(b) under 111 situations, by the circuit gain of AC emulation.

Under Fig. 7 (a) 000 situation, by the spectrum analysis of transient state emulation.

(b) under 111 situations, by the spectrum analysis of transient state emulation.

Under Fig. 8 (a) 000 situation, by the waveform of transient state emulation.

(b) under 111 situations, by the waveform of transient state emulation.

Performance under Figure 90 00 (not optimizing VGA) and 111 (optimizing VGA) situation relatively.

Embodiment

The circuit parameter of VGA structure specific design of the present invention is put into practice under TSMC 0.13um technology as shown in Figure 5, and emulation tool is Cadence SpectreRF.At experimental circuit shown in Figure 5, keep input signal amplitude and circuit gain constant, change digital controlled signal, observe the situation of amplitude output signal and 3 order harmonicses, frequency input signal is 1MHz.Experimental result is as shown in table 1.

Table 1 experimental result relatively

??D 2D 1D 0	Input signal (mV)	Circuit gain (dB)	Output signal (mV)	??HD 3??(dB)
					??000	??200	??-6.015	??80.9	??-25.53
??001	??200	??-6.037	??85.19	??-28.05
					??011	??200	??-6.0643	??92.86	??-35.04
??111	??200	??-6.051	??101.4	??-42.64

Fig. 6, Fig. 7 and Fig. 8 are respectively VGA amplitude-frequency response under 000 and 111 situations, transient waveform and spectrum analysis, and data are summed up in table 1.As can be seen from Table 1, along with the increase of current offset array effective current, the linearity of circuit has significant improvement; Can find simultaneously, amplitude output signal also increases thereupon, this is owing to the increase along with current offset array effective current, the 1dB compression point of VGA also can increase, impel the output signal amplitude of oscillation to increase, this situation can not embody in AC emulation, so it is constant just can circuit gain to occur in the table 1, and the situation that output voltage swing changes.Fig. 9 has provided under 000 and 111 situations, output HD ₃Variation with the input amplitude of oscillation.As seen from Figure 9, rise to original 8 times with respect to equivalent current offset under 000,111 situation, the breadth length ratio of equivalent variable mutual conductance is reduced to the pairing HD of 80mV input signal under 1/8, the 000 original situation ₃With the pairing HD of 220mV input signal under 111 situations ₃Identical, in other words, the signal amplitude that the VGA by linearity optimization under equal conditions can handle has improved 275%.

Claims (2)

1. the variable gain amplifier of a linearity optimization when low gain, it is characterized in that this variable gain amplifier comprises five parts: the variable transconductance array, the bias current array, digital control circuit, transistor variable load and common mode feedback circuit that diode connects; Wherein:

Each weight of variable transconductance array all increases with 2 index power, with the variation of coupling bias current; Effective transconductance value of variable transconductance array is controlled by digital controlled signal, and the switch of Digital Signals is arranged in the transistorized grid end of each mutual conductance of array;

Each weight of bias current array of variable transconductance increases with 2 index power, and changes in the opposite direction with effective transconductance value of variable transconductance array; The bias current array is controlled by digital controlled signal, and the switch of Digital Signals is arranged in the grid end of each bias transistor of array;

Load is the active load that diode connects, and the transistorized breadth length ratio of active load that diode connects is identical with maximum effective breadth length ratio of variable transconductance array;

It is big one more than the order of magnitude that common mode electrical level in the common mode feedback loop extracts the equiva lent impedance of resistance ratio active load.

2. according to claim 1 when low gain the variable gain amplifier of linearity optimization, it is characterized in that the variable transconductance array adopts NMOS pipe array; The bias current array adopts NMOS pipe array.

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