CN101808343B - Automated test circuit structure and method of SIM (Subscriber Identity Module)/USIM(Universal Subscriber Identity Module) controller in ARM digital baseband chip - Google Patents
Automated test circuit structure and method of SIM (Subscriber Identity Module)/USIM(Universal Subscriber Identity Module) controller in ARM digital baseband chip Download PDFInfo
- Publication number
- CN101808343B CN101808343B CN 200910046161 CN200910046161A CN101808343B CN 101808343 B CN101808343 B CN 101808343B CN 200910046161 CN200910046161 CN 200910046161 CN 200910046161 A CN200910046161 A CN 200910046161A CN 101808343 B CN101808343 B CN 101808343B
- Authority
- CN
- China
- Prior art keywords
- arm
- baseband chip
- digital baseband
- sim
- test
- Prior art date
- Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
- Active
Links
- 238000012360 testing method Methods 0.000 title claims abstract description 167
- 238000000034 method Methods 0.000 title claims abstract description 36
- 238000005070 sampling Methods 0.000 claims abstract description 61
- 230000008569 process Effects 0.000 claims description 14
- 230000005540 biological transmission Effects 0.000 claims description 7
- 238000012545 processing Methods 0.000 claims description 5
- 230000000052 comparative effect Effects 0.000 claims description 3
- 230000000977 initiatory effect Effects 0.000 abstract 1
- 230000006870 function Effects 0.000 description 9
- 238000005516 engineering process Methods 0.000 description 7
- 238000010586 diagram Methods 0.000 description 5
- 230000003993 interaction Effects 0.000 description 4
- 230000008859 change Effects 0.000 description 2
- 238000012986 modification Methods 0.000 description 2
- 230000004048 modification Effects 0.000 description 2
- 239000000047 product Substances 0.000 description 2
- 239000007787 solid Substances 0.000 description 2
- 241001269238 Data Species 0.000 description 1
- 238000003491 array Methods 0.000 description 1
- 238000006243 chemical reaction Methods 0.000 description 1
- 238000004891 communication Methods 0.000 description 1
- 239000012467 final product Substances 0.000 description 1
- 230000002452 interceptive effect Effects 0.000 description 1
- 238000004519 manufacturing process Methods 0.000 description 1
- NJPPVKZQTLUDBO-UHFFFAOYSA-N novaluron Chemical compound C1=C(Cl)C(OC(F)(F)C(OC(F)(F)F)F)=CC=C1NC(=O)NC(=O)C1=C(F)C=CC=C1F NJPPVKZQTLUDBO-UHFFFAOYSA-N 0.000 description 1
- 238000012795 verification Methods 0.000 description 1
Images
Abstract
The invention relates to automated test circuit structure and method of a SIM/USIM controller in an ARM digital baseband chip. The structure comprises a test host, an ARM emulator, and a test circuit module carrying the ARM digital baseband chip; CLK (Clock) signal and data I/O signal pins of the SIM/USIM controller are respectively connected with a first GPIO (General Purpose Input/Output) pin and a second GPIO pin of the baseband chip; and the test host is connected with the ARM digital baseband chip through the ARM emulator. The method comprises the steps of: initiating a SIM/USIM controller register and a GPIO control register; reading the input signal value of the first GPIO pin, and detecting the CLK signal pin; configuring and driving the I/O signal pin to send a preset test data sequence; sampling and saving the input signal values on the first GPIO pin and the second GPIO pin; comparing and judging the correctness; and feeding results back to the test host. The automated test circuit structure and the method of a SIM/USIM controller in an ARM digital baseband chip have the advantages of simple and practical structure, reduced test cost, stable and reliable performance, strong portability and wider application scope.
Description
Technical field
The present invention relates to integrated circuit fields, particularly the chip testing technology field, specifically refer to SIM/USIM card controller automatic test circuit structure and method in a kind of ARM digital baseband chip.
Background technology
Chip for cell phone accounts for more than 50% of mobile phone total cost, and wherein, baseband chip is part most crucial in mobile phone, is also the highest part of technology content.Baseband chip provides other all functions except radio frequency.In evolution, formed the comparatively fixing chip architecture of DSP+ARM.
General arm processor is all supported the JTAG debugging at present.JTAG is the debug standard of ARM, and its concept of finally wanting is boundary scan (Boundary-Scan).The basic thought of boundary scan technique is to increase a shift register cell on the close input and output pin of chip.When chip is in debugging mode, for the output pin of chip, also can " catch " output signal on (CAPTURE) this pin by the boundary scan register that is attached thereto.Under normal running status, these boundary scan register are transparent to chip, so normal operation can not be affected.Like this, boundary scan register provide one easily mode in order to observation with control the chip of required debugging.
GPIO (general programmable input/output interface, General Programmable Input Output) be the signal port pin of conventional configuration in digital baseband chip, when microcontroller or chipset do not have enough I/O ports, or when system need to adopt the far-end serial communication or control, the GPIO product can provide extra control ﹠ monitor function.
(client identifies module to SIM, Subscriber Identity Model) card is a card that includes large scale integrated circuit in inside, the card storage inside contents such as digital mobile phone client's information, encryption key, it can differentiate client identity for the GSM network, and the voice messaging the when client is conversed is encrypted.Similar with SIM card, USIM (UMTS client identifies module, UMTS Subscriber Identity Module) card is to answer the requirement in 3G epoch and produce, and larger with SIM card phase specific capacity, function is abundanter.
The SIM/USIM card controller is requisite in the 3G baseband chip SIM/USIM to be controlled and the module of data interaction, and for example storage or delete telephone number, short message etc. in the SIM/USIM card is all completed by the SIM/USIM card controller.SIM and USIM are a kind of of ISO smart card,
Chip testing is a step of crucial importance in the baseband chip R﹠D process, and the quality of testing scheme greatly affects R﹠D cycle and the R﹠D costs of chip.Good testing scheme can improve the rate of finished products of chip, shortens the R﹠D cycle, reduces R﹠D costs.As important module in baseband chip, the testing scheme of SIM/USIM card controller is also very important.
In the prior art, all need the PCB test board of an ARM debugger, a special use, the SIM/USIM test card of a special use of needs based on the baseband chip measuring technology of ARM, see also shown in Figure 1.Wherein the card outside have 6 control signal pins, card controller is controlled and data interaction card by CLK and two holding wires of I/O, mutual data format sees also shown in Figure 2: the data on the I/O holding wire are arranged in order to high-order (MSB) from low level (LSB), a partial data byte comprises: 1 low level start bit, 8 bit data positions, 1 digit pair check digit, 2 position of rests (high level); CLK is the clock signal of rule; In idle condition, CLK and I/O are defaulted as high level, Low level effective.The data interaction pattern is semiduplex mode, and namely synchronization can only carry out one-way data transmission (the card controller synchronization can only be received data or send out data).
See also again shown in Figure 3ly, in the scheme of above-mentioned prior art, need the special pcb board that test is special-purpose of making, buy the SIM test card of a special use.And the fabrication cycle of pcb board is long usually, and the SIM test card is also more expensive, and this has just caused, and test process is more loaded down with trivial details, test period is long, testing cost is higher, has brought certain inconvenience for running smooth of test job.
Summary of the invention
The objective of the invention is to have overcome above-mentioned shortcoming of the prior art, provide a kind of and do not need special-purpose PCB test board and SIM/USIM test card, simple and practical, testing process automatic quick, test error is less, portability is strong, stable and reliable working performance, the scope of application SIM/USIM card controller automatic test circuit structure and method in the ARM digital baseband chip comparatively widely.
In order to realize above-mentioned purpose, in ARM digital baseband chip of the present invention, SIM/USIM card controller automatic test circuit structure and method are as follows:
this realizes the circuit structure based on SIM/USIM card controller automatic test in the digital baseband chip of ARM, comprise Test Host and ARM simulator, its main feature is, also comprise the test circuit module that carries the ARM digital baseband chip in described circuit structure, the clock CLK signal pin of the SIM/USIM card controller in described ARM digital baseband chip is connected with a GPIO pin on this ARM digital baseband chip, and the data I of this SIM/USIM card controller/O signal pin is connected with the 2nd GPIO pin on this ARM digital baseband chip, described Test Host is connected with this ARM digital baseband chip by this ARM simulator.
This realization is connected with the jtag interface of this ARM digital baseband chip based on the ARM simulator in the circuit structure of SIM/USIM card controller automatic test in the digital baseband chip of ARM.
This realization is PC based on the Test Host in the circuit structure of SIM/USIM card controller automatic test in the digital baseband chip of ARM.
This utilizes above-mentioned circuit structure realization based on the method for SIM/USIM card controller automatic test in the digital baseband chip of ARM, and its main feature is that described method comprises the following steps:
(1) the ARM digital baseband chip carries out initialization process to the register in described SIM/USIM card controller and GPIO control register;
(2) the ARM digital baseband chip reads the input signal values on a described GPIO pin, detects on described clock CLK signal pin whether clock signal is arranged;
(3) the described SIM/USIM card controller register of ARM digital baseband chip configuration, and drive described data I/predefined sequence of test data of O signal pin transmission;
(4) the ARM digital baseband chip is sampled to the input signal values on a described GPIO pin and the 2nd GPIO pin, and the sampling test point information that obtains is carried out storage operation;
(5) the ARM digital baseband chip carries out correctness according to the sampling test point information of a GPIO pin of storing and the 2nd GPIO pin and relatively judges processing;
The result that (6) will relatively judge is returned to Test Host, and finishes.
This realization comprises the following steps based in the method for SIM/USIM card controller automatic test in the digital baseband chip of ARM, the register in the SIM/USIM card controller and GPIO control register being carried out initialization process:
(11) the clock CLK set of frequency with the register in described SIM/USIM card controller is the twice of data I/O speed;
(12) sense that the GPIO control register makes a GPIO pin and the 2nd GPIO pin is set and is set to input.
This realization comprises the following steps based on the storage operation of carrying out in the method for SIM/USIM card controller automatic test in the digital baseband chip of ARM:
(21) create clock sampling signal array and data I/O sampled signal array in the memory block of ARM digital baseband chip;
(22) will deposit in described clock sampling signal array the sampled signal values that obtains of sampling of the input signal values on a GPIO pin;
(23) will deposit in described data I/O sampled signal array the sampled signal values that obtains of sampling of the input signal values on the 2nd GPIO pin.
This realization relatively judges processing based on the correctness of carrying out in the method for SIM/USIM card controller automatic test in the digital baseband chip of ARM, comprises the following steps:
(31) calculate for the sampling test point information in the clock sampling signal array of being stored in the spacing value that occurs between adjacent actual clock sampling signal test point that level changes;
(32) calculate for the sampling test point information in data I/O sampled signal array of being stored in the spacing value that occurs between adjacent real data I/O sampled signal test point that level changes;
(33) according to the SIM/USIM host-host protocol, calculate the spacing value between the adjacent theoretical clock sampling signal test point that the level variation occurs for clock sampling signal test point information corresponding in predefined sequence of test data;
(34) according to the SIM/USIM host-host protocol, calculate the spacing value between the adjacent gross data I/O sampled signal test point that the level variation occurs for data I corresponding in predefined sequence of test data/O sampled signal test point information;
(35) spacing value between described adjacent actual clock sampling signal test point is compared with spacing value between corresponding adjacent theoretical clock sampling signal test point, simultaneously the spacing value between described adjacent real data I/O sampled signal test point and the spacing value between adjacent theoretical clock sampling signal test point are compared;
(36) if comparative result in default reasonable error scope, result is correct; Otherwise result is mistake.
adopted SIM/USIM card controller automatic test circuit structure and method in the ARM digital baseband chip of this invention, due to its general GPIO pin that carries based on the ARM digital baseband chip, the arm processor that has utilized simultaneously the ARM digital baseband chip to carry, directly test code is imported in this ARM digital baseband chip by jtag interface by the ARM simulator, and allow this ARM digital baseband chip automatically perform test code, and output test result, thereby realized the automatic test of SIM/USIM controller, special-purpose PCB beta version and SIM/USIM test card have been saved, not only simple and practical, and saved testing cost, and make testing process full-automatic, simplified testing process, shortened the cycle of test, simultaneously due to the sampling clock of ARM digital baseband chip usually all at dozens or even hundreds of megahertz, thereby guaranteed the high accuracy of sampled data, stable and reliable working performance, and test code only needs to revise a little, just can conveniently be transplanted on different hardware platforms, thereby obtained comparatively desirable portability, the scope of application is comparatively extensive, for further developing of digital baseband chip measuring technology established solid foundation.
Description of drawings
Fig. 1 is SIM/USIM card test pin schematic diagram of the prior art.
Fig. 2 is SIM/USIM card data format schematic diagram of the prior art.
Fig. 3 is the composition schematic diagram of SIM/USIM card controller test platform of the prior art.
Fig. 4 is SIM/USIM card controller automatic test electrical block diagram in ARM digital baseband chip of the present invention.
Fig. 5 is the overall flow figure of SIM/USIM card controller automated testing method in ARM digital baseband chip of the present invention.
Fig. 6 is data sampling schematic diagram in SIM/USIM card controller automated testing method in ARM digital baseband chip of the present invention.
Embodiment
In order more clearly to understand technology contents of the present invention, describe in detail especially exemplified by following examples.
see also shown in Figure 4, this realizes the circuit structure based on SIM/USIM card controller automatic test in the digital baseband chip of ARM, comprise Test Host and ARM simulator, wherein, also comprise the test circuit module that carries the ARM digital baseband chip in described circuit structure, the clock CLK signal pin of the SIM/USIM card controller in described ARM digital baseband chip is connected with a GPIO pin on this ARM digital baseband chip, and the data I of this SIM/USIM card controller/O signal pin is connected with the 2nd GPIO pin on this ARM digital baseband chip, described Test Host is connected with this ARM digital baseband chip by this ARM simulator.
Wherein, described ARM simulator can be connected with the jtag interface of this ARM digital baseband chip, moreover, can also be connected by other suitable data transmission interface; This Test Host can be PC simultaneously, also can have the equipment such as Industry Control single-chip microcomputer that function is controlled in test for other.
In the middle of reality is used, because the SIM/USIM card controller has two signal pins: clock CLK and data I/O.Data interactive mode is semiduplex mode.Data interaction speed on the I/O signal is generally between 10～100kbit/s, and message transmission rate is slower, and clock CLK is generally 372 times of I/O speed.Usually baseband chip all can carry GPIO for the user.
In circuit structure of the present invention, use two GPIO to be connected with CLK, I/O, by the value on sampling GPIO, in conjunction with SIM/USIM card host-host protocol in 3GPP, verify the correctness of CLK and I/O signal, thereby reach the purpose of test SIM/USIM card controller.
In the circuit structure of Fig. 4, technical scheme of the present invention in fact only needs a Daepori to lead to PC, an ARM simulator, a pedestal and the baseband chip with ARM to get final product.Do not need special PCB test board and SIM test card.
Because chip carries arm processor, support the JTAG debug standard, therefore just can test code (C language or ARM assembler language) be poured in baseband chip by the JTAG mouth by the ARM simulator, so just can observe and debug all functions of baseband chip.By this method, only need to allow chip automatically perform at PC end input test routine, output test result at the PC end at last, so just realized the automatic test of SIM/USIM controller.
Due to the sampling clock of general baseband chip usually all in dozens or even hundreds of megahertz left and right, the hundred times of SIM/USIM card transmission rate, in a bit data length of SIM/USIM card, the GPIO mouth generally can be sampled many times, so the accuracy of sampled data is high.
See also shown in Figure 5ly, this utilizes above-mentioned circuit structure to realize comprising the following steps method based on SIM/USIM card controller automatic test in the digital baseband chip of ARM again:
(1) the ARM digital baseband chip carries out initialization process to the register in described SIM/USIM card controller and GPIO control register, comprises the following steps:
(a) the clock CLK set of frequency with the register in described SIM/USIM card controller is the twice of data I/O speed;
(b) sense that the GPIO control register makes a GPIO pin and the 2nd GPIO pin is set and is set to input;
(2) the ARM digital baseband chip reads the input signal values on a described GPIO pin, detects on described clock CLK signal pin whether clock signal is arranged;
(3) the described SIM/USIM card controller register of ARM digital baseband chip configuration, and drive described data I/predefined sequence of test data of O signal pin transmission;
(4) the ARM digital baseband chip is sampled to the input signal values on a described GPIO pin and the 2nd GPIO pin, and the sampling test point information that obtains is carried out storage operation, comprises the following steps:
(a) create clock sampling signal array and data I/O sampled signal array in the memory block of ARM digital baseband chip;
(b) will deposit in described clock sampling signal array the sampled signal values that obtains of sampling of the input signal values on a GPIO pin;
(c) will deposit in described data I/O sampled signal array the sampled signal values that obtains of sampling of the input signal values on the 2nd GPIO pin;
(5) the ARM digital baseband chip carries out correctness according to the sampling test point information of a GPIO pin of storing and the 2nd GPIO pin and relatively judges processing, comprises the following steps:
(a) calculate for the sampling test point information in the clock sampling signal array of being stored in the spacing value that occurs between adjacent actual clock sampling signal test point that level changes;
(b) calculate for the sampling test point information in data I/O sampled signal array of being stored in the spacing value that occurs between adjacent real data I/O sampled signal test point that level changes;
(c) according to the SIM/USIM host-host protocol, calculate the spacing value between the adjacent theoretical clock sampling signal test point that the level variation occurs for clock sampling signal test point information corresponding in predefined sequence of test data;
(d) according to the SIM/USIM host-host protocol, calculate the spacing value between the adjacent gross data I/O sampled signal test point that the level variation occurs for data I corresponding in predefined sequence of test data/O sampled signal test point information;
(e) spacing value between described adjacent actual clock sampling signal test point is compared with spacing value between corresponding adjacent theoretical clock sampling signal test point, simultaneously the spacing value between described adjacent real data I/O sampled signal test point and the spacing value between adjacent theoretical clock sampling signal test point are compared;
(f) if comparative result in default reasonable error scope, result is correct; Otherwise result is mistake;
The result that (6) will relatively judge is returned to Test Host, and finishes.
In the middle of reality is used, with circuit structure of the present invention connect complete after, just can be at PC end editor and modification test code (C language or ARM assembler language).After compiling is passed through, by the ARM simulator, test code is poured in baseband chip from jtag interface.Based on the debug standard of ARM JTAG, just can configure and read any register in chip, comprise SIM/USIM controller and GPIO controller.After like this test code being poured into baseband chip, chip can automatically perform instructions, outputs test result at the PC end at last.
Testing process of the present invention is divided into five steps.
The first step: initialization SIM/USIM card controller register and GPIO control register.
Second step: read the value of GPIO0, detect on CLK whether clock signal is arranged.
The 3rd step: configure SIM/USIM card controller register, send the data of fixed sequence program by I/O.
The 4th step: the value of sampling GPIO0 and GPIO1, and deposit respectively array CLK[in], I/O[] in.
The 5th step: whether the array value that calculates GPIO0 and GPIO1 is correct.
(1) at initial period, initialization SIM/USIM and GPIO control register arrange the various functions parameter.Be the twice of I/O with the CLK set of frequency of SIM/USIM control register, GPIO0 and GPIO1 direction are set to input, so just can obtain by sampling GPIO0 and GPIO1 the value of CLK and I/O signal.
(2) after first step initialization SIM/USIM control register, CLK can send the clock signal of a fixed frequency, and the level upset of clock signal is frequent.Because GPIO0 is connected with CLK, so only need read the input value of GPIO0 at second step, sees if there is variation (0 becomes 1 or 1 becomes 0) and just can learn whether clock is arranged.
In (3) the 3rd steps, configuration SIM/USIM card controller register makes and sends the one piece of data sequence on I/O.
In (4) the 4th steps, constantly read the input value (data on namely sample CLK and I/O) of GPIO0 and GPIO1 at T0, and deposit continuously array CLK[in] and I/O[] in.At two complete CLK in the clock cycle, GPIO0 and the GPIO1 number of times sampling (different hardware test platform sampling numbers slightly have difference) that can fix.
See also shown in Figure 6ly, suppose that a certain hardware platform can fixed sample in the clock cycle 6 times at two continuous CLK, can obtain so following two groups of sampled datas:
CLK[]＝{1，1，0，0，1，1，0，0}，I/O[]＝{1，1，1，1，0，0，0，0}。
(5) the 5th steps, the sampled value of observing CLK obtained in the previous step and I/O, CLK changes the 1st, 3,5,7 test point as can be known, and I/O changes the 1st, 5 test point.Can obtain thus other a pair of array, i.e. spacing value between the test point that changes of numerical value:
CLK_DURATION[]＝{2，2，2}——(3-1，5-3，7-5)
I/O_DURATION[]＝{4}——(5-1)。
Because the SIM/USIM host-host protocol is fixed, and the data sequence that sends is controlled, so just can calculated in advance go out the interval between the test point that CLK and I/O signal change, and and the actual test point that changes between the interval compare, just can verify the correctness of the upper data of CLK and I/O, thus the function of checking SIM/USIM card controller.
Illustrate as follows:
Suppose that the upper data sequence that sends of I/O is 0X55.According to the SIM/USIM card host-host protocol shown in Fig. 2, in above the 4th step, by reading the input value of GPIO0 and GPIO1, obtain two groups of sampling arrays:
CLK[]＝{1，1，0，0，1，1，0，0，1，1，0，0，1，1，0，0，1，1，0，0，1，1，0，0}；
I/O[]＝{0，0，0，0，1，1，1，1，0，0，0，0，1，1，1，1，0，0，0，0，1，1，1，1，0，0，0，0，1，1，1，1，0，0，0，0，0，0，0，0，1，1，1，1，1，1，1，1}。
In above the 5th step, by calculating CLK[] and I/O[], just can obtain the spacing value between test point that CLK and I/O signal change:
CLK_DURATION[]＝{2，2，2，2，2，2，2，2，2，2，2，2}；
I/O_DURATION＝{4，4，4，4，4，4，4，4，8，8}。
With CLK_DURATION[] and I/O_DURATION[] correct result that goes out with calculated in advance compares, if in the reasonable error scope, shows test results correct, if exceed, shows mistake.
Simultaneously because the CLK frequency is the twice of I/O, so the minimum interval value of I/O should be the twice of CLK minimum interval value, by this multiple relation, therefore can verify again the accuracy of CLK and I/O signal frequency, the function correctness of checking SIM/USIM card controller register.
In above-mentioned testing process, it is not 0 to be exactly the characteristics of 1 value that the 4th step and the 5th wherein goes on foot the input value utilized cleverly GPIO, thereby has realized the function of verification of correctness.
The ardware feature of different PC, ARM simulator and baseband chip is different, actual minimum interval value can be different, namely at two continuous CLK in the clock cycle, some hardware platform GPIO can read 6 times, what have can only read 5 times, but spacing value necessarily becomes the multiple relation, according to this characteristic, test program of the present invention only need be revised the minimum interval value, arrives different hardware test platforms with regard to portable.
SIM/USIM card controller automatic test circuit structure and method in above-mentioned ARM digital baseband chip have been adopted, due to its general GPIO pin that carries based on the ARM digital baseband chip, the arm processor that has utilized simultaneously the ARM digital baseband chip to carry, directly test code is imported in this ARM digital baseband chip by jtag interface by the ARM simulator, and allow this ARM digital baseband chip automatically perform test code, and output test result, thereby realized the automatic test of SIM/USIM controller, special-purpose PCB beta version and SIM/USIM test card have been saved, not only simple and practical, and saved testing cost, and make testing process full-automatic, simplified testing process, shortened the cycle of test, simultaneously due to the sampling clock of ARM digital baseband chip usually all at dozens or even hundreds of megahertz, thereby guaranteed the high accuracy of sampled data, stable and reliable working performance, and test code only needs to revise a little, just can conveniently be transplanted on different hardware platforms, thereby obtained comparatively desirable portability, the scope of application is comparatively extensive, for further developing of digital baseband chip measuring technology established solid foundation.
In this specification, the present invention is described with reference to its specific embodiment.But, still can make various modifications and conversion obviously and not deviate from the spirit and scope of the present invention.Therefore, specification and accompanying drawing are regarded in an illustrative, rather than a restrictive.
Claims (6)
1. a realization is based on the circuit structure of SIM/USIM card controller automatic test in the digital baseband chip of ARM, comprise Test Host and ARM simulator, it is characterized in that, also comprise the test circuit module that carries the ARM digital baseband chip in described circuit structure, the clock CLK signal pin of the SIM/USIM card controller in described ARM digital baseband chip is connected with a GPIO pin on this ARM digital baseband chip, and the data I of this SIM/USIM card controller/O signal pin is connected with the 2nd GPIO pin on this ARM digital baseband chip, described Test Host is connected with this ARM digital baseband chip by this ARM simulator, and by this ARM simulator, test code is imported in this ARM digital baseband chip, described ARM digital baseband chip automatically performs test code, and output test result.
2. realization according to claim 1 based on the circuit structure of SIM/USIM card controller automatic test in the digital baseband chip of ARM, is characterized in that, described ARM simulator is connected with the jtag interface of this ARM digital baseband chip.
3. realization according to claim 1 and 2 based on the circuit structure of SIM/USIM card controller automatic test in the digital baseband chip of ARM, is characterized in that, described Test Host is PC.
4. one kind is utilized the described circuit structure realization of claim 1 based on the method for SIM/USIM card controller automatic test in the digital baseband chip of ARM, it is characterized in that, described method comprises the following steps:
(1) the ARM digital baseband chip carries out initialization process to the register in described SIM/USIM card controller and GPIO control register;
(2) the ARM digital baseband chip reads the input signal values on a described GPIO pin, detects on described clock CLK signal pin whether clock signal is arranged;
(3) the described SIM/USIM card controller register of ARM digital baseband chip configuration, and drive described data I/predefined sequence of test data of O signal pin transmission;
(4) the ARM digital baseband chip is sampled to the input signal values on a described GPIO pin and the 2nd GPIO pin, and the sampling test point information that obtains is carried out storage operation;
(5) the ARM digital baseband chip carries out correctness according to the sampling test point information of a GPIO pin of storing and the 2nd GPIO pin and relatively judges processing; The described correctness of carrying out relatively judges processing, comprises the following steps:
(a) calculate for the sampling test point information in the clock sampling signal array of being stored in the spacing value that occurs between adjacent actual clock sampling test point information that level changes;
(b) calculate for the sampling test point information in data I/O sampled signal array of being stored in the spacing value that occurs between adjacent real data I/O sampling test point information that level changes;
(c) according to the SIM/USIM host-host protocol, calculate the spacing value between the adjacent theoretical clock sampling test point information that the level variation occurs for clock sampling test point information corresponding in predefined sequence of test data;
(d) according to the SIM/USIM host-host protocol, calculate the spacing value between the adjacent gross data I/O sampling test point information that the level variation occurs for data I corresponding in predefined sequence of test data/O sampling test point information;
(e) spacing value between described adjacent actual clock sampling test point information is compared with spacing value between corresponding adjacent theoretical clock sampling test point information, simultaneously the spacing value between described adjacent real data I/O sampling test point information is compared with the spacing value that adjacent gross data I/O samples between test point information;
(f) if comparative result in default reasonable error scope, result is correct; Otherwise result is mistake;
The result that (6) will relatively judge is returned to Test Host, and finishes.
5. realization according to claim 4 is based on the method for SIM/USIM card controller automatic test in the digital baseband chip of ARM, it is characterized in that, described register in the SIM/USIM card controller and GPIO control register are carried out initialization process, comprise the following steps:
(11) the clock CLK set of frequency with the register in described SIM/USIM card controller is the twice of data I/O speed;
(12) sense that the GPIO control register makes a GPIO pin and the 2nd GPIO pin is set and is set to input.
6. realization according to claim 4 based on the method for SIM/USIM card controller automatic test in the digital baseband chip of ARM, is characterized in that, the described storage operation of carrying out comprises the following steps:
(21) create clock sampling signal array and data I/O sampled signal array in the memory block of ARM digital baseband chip;
(22) will deposit in described clock sampling signal array the described sampling test point information that obtains of sampling of the input signal values on a GPIO pin;
(23) will deposit in described data I/O sampled signal array the described sampling test point information that obtains of sampling of the input signal values on the 2nd GPIO pin.
Priority Applications (1)
| Application Number | Priority Date | Filing Date | Title |
|---|---|---|---|
| CN 200910046161 CN101808343B (en) | 2009-02-13 | 2009-02-13 | Automated test circuit structure and method of SIM (Subscriber Identity Module)/USIM(Universal Subscriber Identity Module) controller in ARM digital baseband chip |
Applications Claiming Priority (1)
| Application Number | Priority Date | Filing Date | Title |
|---|---|---|---|
| CN 200910046161 CN101808343B (en) | 2009-02-13 | 2009-02-13 | Automated test circuit structure and method of SIM (Subscriber Identity Module)/USIM(Universal Subscriber Identity Module) controller in ARM digital baseband chip |
Publications (2)
| Publication Number | Publication Date |
|---|---|
| CN101808343A CN101808343A (en) | 2010-08-18 |
| CN101808343B true CN101808343B (en) | 2013-11-06 |
Family
ID=42609913
Family Applications (1)
| Application Number | Title | Priority Date | Filing Date |
|---|---|---|---|
| CN 200910046161 Active CN101808343B (en) | 2009-02-13 | 2009-02-13 | Automated test circuit structure and method of SIM (Subscriber Identity Module)/USIM(Universal Subscriber Identity Module) controller in ARM digital baseband chip |
Country Status (1)
| Country | Link |
|---|---|
| CN (1) | CN101808343B (en) |
Families Citing this family (10)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| CN101907683B (en) * | 2009-06-02 | 2013-05-08 | 上海摩波彼克半导体有限公司 | Automatic circuit testing structure of I2C module in digital baseband chip and method thereof |
| CN105827333A (en) * | 2015-01-07 | 2016-08-03 | 展讯通信（上海）有限公司 | System and method of baseband chip automatic test |
| DE112016006660T5 (en) | 2016-03-31 | 2018-12-13 | Intel Corporation | TROUBLESHOOTING TECHNOLOGY FOR HIGH-SPEED I / O DATA TRANSFER |
| CN106546900B (en) * | 2016-09-13 | 2019-04-16 | 芯海科技（深圳）股份有限公司 | One kind realizing automated testing method by CodeOption |
| CN110320460A (en) * | 2018-03-29 | 2019-10-11 | 北京华虹集成电路设计有限责任公司 | A kind of method and apparatus of SIM card robustness testing |
| CN111352025B (en) * | 2020-03-13 | 2020-12-11 | 京微齐力(深圳)科技有限公司 | Method, system and equipment for verifying configuration controller in FPGA (field programmable Gate array) |
| CN111596196A (en) * | 2020-05-14 | 2020-08-28 | 成都思科瑞微电子股份有限公司 | Graphic processing chip GPU parameter testing device |
| CN114297104B (en) * | 2021-12-30 | 2023-08-18 | 高新兴物联科技股份有限公司 | Debug data transmission method, device, equipment and storage medium |
| CN116224042B (en) * | 2023-04-28 | 2023-08-29 | 北京壁仞科技开发有限公司 | Method, system, apparatus and medium for generating test vector for testing device under test |
| CN117251329B (en) * | 2023-11-17 | 2024-03-08 | 深圳市耀星微电子有限公司 | DRAM test equipment and method based on ARM architecture processor |
Citations (4)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| CN2859959Y (en) * | 2005-12-20 | 2007-01-17 | 华为技术有限公司 | User tag card recognition device in wireless communication system |
| CN101022634A (en) * | 2007-03-16 | 2007-08-22 | 烟台麦特电子有限公司 | Testing method based on remote control vehicular device |
| US7265570B2 (en) * | 2001-09-28 | 2007-09-04 | Inapac Technology, Inc. | Integrated circuit testing module |
| CN201114647Y (en) * | 2007-09-04 | 2008-09-10 | 宁波金信通讯技术有限公司 | An automatic dialing and detection instruction for SIM card remote control |
Family Cites Families (1)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| US7590470B2 (en) * | 2004-01-23 | 2009-09-15 | Aos Holding Company | Heating apparatus and method of detecting a short-cycling condition |
-
2009
- 2009-02-13 CN CN 200910046161 patent/CN101808343B/en active Active
Patent Citations (4)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| US7265570B2 (en) * | 2001-09-28 | 2007-09-04 | Inapac Technology, Inc. | Integrated circuit testing module |
| CN2859959Y (en) * | 2005-12-20 | 2007-01-17 | 华为技术有限公司 | User tag card recognition device in wireless communication system |
| CN101022634A (en) * | 2007-03-16 | 2007-08-22 | 烟台麦特电子有限公司 | Testing method based on remote control vehicular device |
| CN201114647Y (en) * | 2007-09-04 | 2008-09-10 | 宁波金信通讯技术有限公司 | An automatic dialing and detection instruction for SIM card remote control |
Also Published As
| Publication number | Publication date |
|---|---|
| CN101808343A (en) | 2010-08-18 |
Similar Documents
| Publication | Publication Date | Title |
|---|---|---|
| CN101808343B (en) | Automated test circuit structure and method of SIM (Subscriber Identity Module)/USIM(Universal Subscriber Identity Module) controller in ARM digital baseband chip | |
| CN106054058B (en) | One kind can be to multiple sigma-delta ADC chip testings and temperature controlled system and method | |
| CN103578568B (en) | The performance test methods of solid state hard disc and device | |
| CN204832267U (en) | Chip test platform | |
| CN109871326A (en) | A kind of method and apparatus that script is recorded | |
| CN106771972B (en) | Automatic testing device, system and method for POS machine mainboard | |
| CN101334448A (en) | Test platform and method for testing PC board | |
| CN110058147B (en) | Chip testing system and method based on fpga | |
| CN108519889B (en) | JTAG standard-based FPGA program remote upgrading system and method | |
| CN104407882B (en) | A kind of board card device | |
| CN101093521A (en) | FPGA emulation device and method | |
| CN115291082B (en) | Efficient test method and device for chip and storage medium | |
| CN109061446A (en) | A kind of test method and system of single-ended port transmission chip | |
| CN106294056A (en) | Chip adjustment method and device | |
| CN111711494A (en) | Automatic test method, system, equipment and medium for wireless communication module current consumption | |
| CN105067894A (en) | Method and system of testing frequency conversion loss of mixer | |
| CN115078083A (en) | Universal pressure testing method, system and medium for integrated equipment | |
| CN103856277A (en) | Automatic testing system and method for measuring ZigBee radio frequency performance | |
| CN116257037B (en) | Method, system, electronic device and storage medium for generating controller test program | |
| CN113359010A (en) | Core board test system and test method thereof | |
| CN116737270A (en) | Equipment, system and method for rapid adaptation of instrument function | |
| CN103389938A (en) | Log CPK analysis method and system | |
| CN114578790A (en) | Unmanned aerial vehicle flight control automatic test method, system, equipment and medium | |
| CN114995331A (en) | Bladed platform and PLC hardware-in-loop test communication method, medium and equipment | |
| CN114626330A (en) | Simulation method and device for digital-analog hybrid circuit |
Legal Events
| Date | Code | Title | Description |
|---|---|---|---|
| C06 | Publication | ||
| PB01 | Publication | ||
| C10 | Entry into substantive examination | ||
| SE01 | Entry into force of request for substantive examination | ||
| C14 | Grant of patent or utility model | ||
| GR01 | Patent grant | ||
| TR01 | Transfer of patent right | ||
| TR01 | Transfer of patent right |
Effective date of registration: 20170626 Address after: 201203 Shanghai Zhangjiang High Tech Park of Pudong New Area Chunxiao Road No. 439 Building No. 2 Patentee after: SPREADTRUM COMMUNICATIONS (SHANGHAI) Co.,Ltd. Address before: 201204, building 1, building 180, Zhang Heng Road, Pudong New Area, Shanghai, 4F Patentee before: Shanghai Mobilepeak Semiconductor Co.,Ltd. |
|
| CP02 | Change in the address of a patent holder | ||
| CP02 | Change in the address of a patent holder |
Address after: 201203 Shanghai city Zuchongzhi road Pudong New Area Zhangjiang hi tech park, Spreadtrum Center Building 1, Lane 2288 Patentee after: SPREADTRUM COMMUNICATIONS (SHANGHAI) Co.,Ltd. Address before: 201203 Shanghai Zhangjiang High Tech Park of Pudong New Area Chunxiao Road No. 439 Building No. 2 Patentee before: SPREADTRUM COMMUNICATIONS (SHANGHAI) Co.,Ltd. |
|
| TR01 | Transfer of patent right | ||
| TR01 | Transfer of patent right |
Effective date of registration: 20180410 Address after: The 300456 Tianjin FTA test area (Dongjiang Bonded Port) No. 6865 North Road, 1-1-1802-7 financial and trade center of Asia Patentee after: Xinji Lease (Tianjin) Co.,Ltd. Address before: 201203 Shanghai city Zuchongzhi road Pudong New Area Zhangjiang hi tech park, Spreadtrum Center Building 1, Lane 2288 Patentee before: SPREADTRUM COMMUNICATIONS (SHANGHAI) Co.,Ltd. |
|
| EE01 | Entry into force of recordation of patent licensing contract | ||
| EE01 | Entry into force of recordation of patent licensing contract |
Application publication date: 20100818 Assignee: SPREADTRUM COMMUNICATIONS (SHANGHAI) Co.,Ltd. Assignor: Xinji Lease (Tianjin) Co.,Ltd. Contract record no.: 2018990000196 Denomination of invention: Structure and method of automatic test circuit for SIM/USIM card controller in ARM digital baseband chip Granted publication date: 20131106 License type: Exclusive License Record date: 20180801 |
|
| TR01 | Transfer of patent right | ||
| TR01 | Transfer of patent right |
Effective date of registration: 20221025 Address after: 201203 Shanghai city Zuchongzhi road Pudong New Area Zhangjiang hi tech park, Spreadtrum Center Building 1, Lane 2288 Patentee after: SPREADTRUM COMMUNICATIONS (SHANGHAI) Co.,Ltd. Address before: 300456 1-1-1802-7, north area of financial and Trade Center, No. 6865, Asia Road, Tianjin pilot free trade zone (Dongjiang Bonded Port Area) Patentee before: Xinji Lease (Tianjin) Co.,Ltd. |