CN101771339A - Soft start circuit for switch power supply - Google Patents
Soft start circuit for switch power supply Download PDFInfo
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- CN101771339A CN101771339A CN200810241920A CN200810241920A CN101771339A CN 101771339 A CN101771339 A CN 101771339A CN 200810241920 A CN200810241920 A CN 200810241920A CN 200810241920 A CN200810241920 A CN 200810241920A CN 101771339 A CN101771339 A CN 101771339A
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Abstract
The invention discloses a soft start circuit for a switch power supply, comprising an oscillator, a fractional frequency counting module, a resistance network, a current sampling module, a current source I2, a resistance R100, a pulse duration modulation comparer, a phase inverter, an RS trigger and a power PMOS pipe P1, wherein, output clocks of a reset signal and the oscillator are input to the send of the fractional frequency counting module and the RS trigger together, an output signal of the fractional frequency counting module controls the resistance network to obtain output voltage which is connected with a negative input end of the pulse duration modulation comparer, the other negative input end is connected with the error voltage, the positive input end is connected with output current of the current sampling module and is overlaid with the current source I2 to obtain the voltage through the resistance R100, the output end of the pulse duration modulation comparer is input to the R end of the RS trigger after being inverted by the phase inverter, and the inverted output end of the RS trigger is connected with the grid electrode of the power PMOS pipe P1. In the invention, the soft start effect is good, the circuit structure is simple and the chip area is saved.
Description
Technical field
The present invention relates to a kind of integrated circuit (IC) design of simulation, specifically relate to the design of start-up circuit in a kind of Switching Power Supply.
Background technology
Because the continuous development of VLSI, power supply chip integrated swift and violent development, and be widely used in the various device, portable type electronic product especially is such as mobile phone, MP3, PDA, PMP, DSC etc.
Switching Power Supply (DC-DC) is an important branch among the power supply IC, compares with low pressure difference linear voltage regulator, and it has the high advantage of efficient, is one of first-selected electric power system of portable product.
For electric power system, because various use improperly all can cause the impaired of power-supply system, especially serious especially for SOC (system on a chip), the damage of power supply directly causes the collapse of entire chip.Therefore, in the defencive function of power supply, generally all need soft starting circuit, damage power supply and load to prevent when the power supply electrifying that inductive current is excessive.
The DC-DC Switching Power Supply is in power up, and output voltage is from the maximum that is raised to above freezing, because degenerative effect, the duty ratio of the PWM of power tube (pulse-width modulation) control signal begins to change from maximum, reduces gradually, and is stable up to circuit.Because the existence of output filter capacitor in the circuit, to electric capacity generation surge current easy to charge, this moment, the electric current by power tube can reach very big, easily the damaged circuit system.In order in start-up course, to prevent big surge current, to the damage of Circuits System, in the circuit start process, need electric current is limited, promptly need in switching power source chip, add soft starting circuit.
The soft starting circuit needed value that is the duty ratio that is used for controlling pwm pulse waveform in the power input voltage uphill process when minimum value tapers to operate as normal, thus control output voltage progressively changes.Because duty ratio is to begin to gradually change from minimum value, can not make power tube in the conducting always of longer a period of time, thereby avoid the generation of surge current, has guaranteed the reliability of Circuits System.
Summary of the invention
Technical problem to be solved by this invention provides a kind of soft starting circuit that is applied in the Switching Power Supply, this circuit adopts simple structure, does not need to insert big electric capacity and can realize a kind of soft starting circuit that not only can be used for voltage mode control but also can be used for current control mode.
For solving the problems of the technologies described above, the present invention proposes a kind of soft starting circuit that is used for Switching Power Supply, this circuit comprises oscillator, frequency division counter module, resistor network, current sample module, current source 1
2, resistance R 100, pulse-width modulation comparator, inverter, rest-set flip-flop and power tube PMOS P1, wherein, reset signal inputs to the S end of frequency division counter module and rest-set flip-flop with the output clock of oscillator, the output signal controlling resistance network of this frequency division counter module obtains the negative input end that output voltage connects the pulse-width modulation comparator, another negative input end of pulse-width modulation comparator connects error voltage, the output current and the current source I of positive input termination current sample module
2Stack is after the voltage that resistance R 100 obtains, and the output of pulse-width modulation comparator inputs to the R end of rest-set flip-flop after inverter is anti-phase, and the reversed-phase output of this rest-set flip-flop connects the grid of power tube PMOS P1 and the input of current sample module.
Described current source I
2For doing the triangular current source of slope compensation.
Described pulse-width modulation comparator comprises five PMOS pipe M600, M601, M602, M603, M606, and three NMOS pipe M604, M605, M607, wherein PMOS manages M601, M602 and M603 are one group of differential pair tube, PMOS pipe M601 and NMOS pipe M604 are connected serially to ground, after linking to each other, the drain electrode of PMOS pipe M602 and M603 is connected serially to ground with NMOS pipe M605, NMOS pipe M604 manages 605 mirror images with NMOS and is connected, and NMOS pipe M604 grid leak is extremely continuous, three PMOS pipe M601, drain electrode with PMOS pipe M600 after the source electrode of M602 and M603 links to each other links to each other, PMOS pipe M600 is connected with the M606 mirror image, PMOS pipe M606 and NMOS pipe M607 are connected serially to ground, the grid of NMOS pipe M607 links to each other the output signal V of this pulse-width modulation comparator with the drain electrode of NMOS pipe
PWMDrain electrode output from NMOS pipe M607.
Described frequency division counter module comprises two two input NOR gate G1 and G2, n T trigger, an inverter and a rest-set flip-flop, wherein import the clear terminal that the output of clear terminal clear behind inverter is connected to n T trigger respectively, this n T trigger connected successively, the input end of clock of the T trigger in back connects the Q output of previous T trigger, wherein n-1 T trigger
End output signal D0, n T trigger
End output signal D1, and output signal D0 and D1 input to two inputs of a NOR gate G1, the output of this NOR gate G1 and clear terminal clear are as two inputs of rest-set flip-flop, the output of this rest-set flip-flop and described clock signal clk are as two inputs of another NOR gate G2, first T trigger input end of clock of the output termination of this NOR gate G2, wherein n is a natural number.
Described resistor network comprises M-1 NMOS pipe and M resistance, power supply V
In, current source I
1With current source I
3, wherein M resistance and current source I
1Be connected serially to power supply V
InAnd between the ground, will be from power supply V
InWhether each resistance NMOS pipe in parallel in M-1 the resistance of beginning, the turn-on and turn-off control by the NMOS pipe and this NMOS pipe parallel resistor place in circuit, and then the magnitude of voltage V that exports of control
1, current source I
3From power supply V
InBe connected to ground through M resistance, wherein M is a natural number.
Described current source I
2With current source I
3The electric current of output is identical.
Beneficial effect of the present invention is: soft starting circuit of the present invention does not need to increase extra input/output interface and inserts big electric capacity, do not need to use microprocessor controls, and can be integrated into chip internal, directly limit inductive current, soft start is effective, and both can support voltage mode control, can support current control mode again.Simultaneously, the structure of the comparator of pulse-width modulation described in the specific embodiment of the invention combines pulse width modulator and current limliting comparator, thereby for system has saved the current limliting comparator, makes circuit structure simpler, more saves chip area.
Description of drawings
Fig. 1 is the structural representation of soft starting circuit in the specific embodiment of the invention;
Fig. 2 is that soft starting circuit described in the specific embodiment of the invention is applied to the structural representation in the Switching Power Supply BUCK structure;
Fig. 3 is a kind of circuit structure diagram of frequency division counter module in the specific embodiment of the invention;
Fig. 4 is a kind of structural representation of resistor network in the specific embodiment of the invention;
Fig. 5 is a kind of circuit structure diagram of current sample module in the specific embodiment of the invention;
Fig. 6 is a kind of circuit structure diagram of pulse-width modulation comparator in the specific embodiment of the invention;
Fig. 7 is the key signal oscillogram in the soft start-up process in the specific embodiment of the invention.
Embodiment
Below in conjunction with accompanying drawing the specific embodiment of the invention is elaborated.
As shown in Figure 1, be the structural representation of soft starting circuit in the specific embodiment of the invention, this circuit comprises oscillator 101, frequency division counter module 102, resistor network 103, pulse-width modulation comparator 104 and an inverter, current sample module 105, current source I
2, resistance R 100, rest-set flip-flop 106 and power tube PMOS P1, wherein, the clock signal clk of oscillator 101 outputs inputs to the S end of frequency division counter module 102 and rest-set flip-flop 106, another input of frequency division counter module 102 is clear terminal clear, the access number of resistance in two output D0 and the D1 controlling resistance network 103, thereby the value of the output voltage V 1 of controlling resistance network 103, the output V of error amplifier in this voltage V1 and the Switching Power Supply
EaConnect the negative input end of pulse-width modulation comparator 104, that its positive input terminal is imported is the output current and the current source I of current sample module 105
2Stack is after resistance R 100 obtains voltage V2, and two inputs of this current sample module 105 connect rest-set flip-flop 106 respectively
The sampled point SW of output and inductive current, the output of pulse-width modulation comparator 104 input to the R end of rest-set flip-flop 106, rest-set flip-flop 106 behind inverter
End output signal V
PPower controlling PMOS manages conducting and the shutoff of P1, thereby has controlled the duty ratio of whole switching power circuit.Wherein, current source I
2For the triangular current source, play slope compensation.
Be illustrated in figure 2 as the described soft starting circuit of the specific embodiment of the invention and be applied to structural representation in the Switching Power Supply BUCK structure, wherein by power tube PMOS P1, inductance L and capacitor C
oThe structure that LC low-pass filter network of forming and sustained diode are formed is a Switching Power Supply BUCK structure in the specific embodiment of the invention, and the load resistance of this switching power circuit is R
Load, its output voltage V
OUTExpression.
In the BUCK configuration switches power circuit of this band soft starting circuit, reset signal clear is the output of Switching Power Supply electrification reset module, power supply electrifying passes through this signal to 102 zero clearings of frequency division counter module, restart to count frequency division, thereby the control entire circuit is started working, this moment, oscillator 101 was also started working, and clocking clk is for entire circuit provides clock signal; Simultaneously frequency division counter module 102 is by carrying out the clock signal of input to obtain output signal D0 and D1 behind the frequency division, and the resistance number that inserts in these two Digital Signals resistor networks 103 makes the voltage V1 of output increase according to certain step.Wherein, the voltage V1 that rises when this step is less than error voltage V
EaThe time, voltage V1 is as the negative terminal threshold voltage of pulse-width modulation comparator 104, and up voltage V1 changes to greater than error voltage V on this step
EaThe time, then gradually by V
EaAs the negative terminal threshold voltage of pulse-width modulation comparator 104, thereby finish the soft start of described switching power circuit.Simultaneously, for certain negative terminal threshold voltage, the course of work of entire circuit is as described below.
When oscillator 101 is started working clocking clk, open power tube PMOS P1 by rest-set flip-flop 106, this moment is because fly-wheel diode is in anti-state partially, not conducting, according to the inductive current formula, inductive current is linear to rise, then the electric current of power tube PMOS P1 is also linear rises, this moment, the current sample module also started, begin to sample current value on the inductance, the current value that sampling obtains also is linear the rising, when current value rises the output voltage V 2 that makes current sample module 105 when reaching described certain negative terminal threshold voltage, the output hopping of pulse-width modulation comparator 104 is a high level, and power tube PMOS is turn-offed.According to the characteristic of inductance, this moment, inductive current began to reduce.Because the current sample module is subjected to signal V
PControl, this moment the current value of sampled power PMOS pipe not.When the next clock clk of oscillator 101 outputs arrives, rest-set flip-flop
Output is set and is low level, i.e. V
PBe low level, power tube PMOS is conducting again, and circuit enters the control of next cycle.In the process of soft start, the rising stage by stage of the threshold value of electric current, thus limited the peak current on the inductive current, suppressed the generation of surge current, and the output voltage V of Switching Power Supply
OutAlso rise stage by stage, reach the effect of soft start.
Below to being that the embodiment of each module in the soft start structure chart elaborates as shown in Figure 1.
Be illustrated in figure 3 as a kind of enforcement circuit of frequency division counter module 102 in the specific embodiment of the invention, this circuit comprises two two input NOR gate G1 and G2, n T trigger, an inverter and a rest-set flip-flop, wherein the clear terminal of n T trigger all is connected to the output of clear terminal clear behind inverter, this n T trigger connected successively, the input end of clock of the T trigger in back connects the Q output of previous T trigger, n-1 T trigger
End output signal D0, n T trigger
End output signal D1, and output signal D0 and D1 input to two inputs of a NOR gate G1, the output of this NOR gate G1 and clear terminal clear are as two inputs of rest-set flip-flop, the output of this rest-set flip-flop and described clock signal clk be as two inputs of another NOR gate G2, first T trigger input end of clock of the output termination of this NOR gate G2.
In this embodiment, be that example illustrates its frequency division counter process with n=12, then 12 grades of T triggers can carry out 2 with input clock signal clk
12Frequency division, as shown in the figure, output signal D0 is 2 of an input clock signal
11Frequency division, output signal D1 are 2 of input clock signal
12Frequency division, then in the clock cycle of D1, the change procedure of D0 and D1 is 11,01,10,00.When D0 and D1 saltus step were 00, then NOR gate G1 output 1, was rest-set flip-flop output high level thereby make the gating signal of clock signal clk, thereby made clock signal clk conductively-closed by NOR gate G2, and frequency division finishes.
Figure 4 shows that the physical circuit figure of resistor network 103 in the specific embodiment of the invention, this resistor network 103 comprises NMOS pipe M401 and M402, resistance R 1, R2, R3, and power supply I
1And I
3, wherein, current source I
1, resistance R 3, R2 and R1 be connected between power supply and the ground successively, NMOS pipe M401 and M402 are connected on resistance R 2 and R3 two ends respectively, whether controlling resistance R2 and R3 are operated under the current-mode for making soft starting circuit by short circuit, increase sawtooth current source biasing I to output voltage
3, and this current source biasing I
3With current source I as shown in Figure 1
2The electric current of output is identical.This concrete resistance of implementing resistance R 3 in the circuit is the twice of resistance R 1 resistance, and the resistance of resistance R 1 and resistance R 2 equates.
It should be noted that, the number n of T trigger has determined the size of the clock frequency that frequency division obtains in the described branch frequency counting circuit, thereby determined the time of every grade of step of threshold voltage V1, therefore, the number of T trigger is not limited to this embodiment described 12 in the enforcement circuit of the described frequency division counter module 102 of the specific embodiment of the invention, but determine by the output voltage of designed circuit, satisfy the step make behind the frequency division at the threshold voltage V1 that obtains in the time soft start reach the required output voltage of switching circuit.
In addition, the number of resistance is not limited to described three resistance in the described resistor network 103, the number of step when wherein the number of the resistance of NMOS management and control system has determined soft start also is the resistance of resistance in the number of resistance in the NMOS management and control system place in circuit and the place in circuit, obtains V
1The number of magnitude of voltage is the number of soft start step, therefore, the distribution of the number of resistance and resistance is not limited to circuit structure shown in Figure 4 in the described resistor network 103 of the specific embodiment of the invention, step number that can be as required in the concrete application and the voltage difference between step are distributed the number and the resistance of resistance, and satisfy the resistance two ends that are connected with ground in the resistance serial chain of place in circuit and do not need NMOS pipe in parallel, current source I
3Be connected to ground through this resistance.
Described current sample module 105 can adopt circuit structure diagram as shown in Figure 5, and this circuit comprises inductance L and capacitor C
0, the PMOS that is connected of the current detecting pipe MP501 that is connected of two switching tube MS501 and MS502, the NMOS pipe MN501, the MN502 that are connected by three mirror images and MN503, two mirror images and MP502 and two mirror images manages mirror image circuit, the reference current source I that MP503 and MP504 form
1, sample rate current pipe MR, power tube P1, and continued flow tube MN504.
Wherein, current detection circuit place DC/DC step-down controller partial inductance L and capacitor C
oSeries connection, power tube P1 and continued flow tube MN504 series connection, current detecting pipe MP501, PMOS pipe MP503, NMOS pipe MN503 connects successively in the described three arrangement of mirrors image tubes, also series connection successively of current detecting pipe MP502, PMOS pipe MP504, NMOS pipe MN502, reference current source I
1Connecting with NMOS pipe MN501 provides the electric current of described mirror image pipe; Switching tube MS501 and power tube P1 series connection and after grid are connected altogether, be connected in parallel with switching tube MS502 and gate voltage opposite, sample rate current I
SenFrom the drain electrode output of sample rate current pipe MR, the source electrode of described sample rate current pipe MR is connected the drain electrode of current detecting pipe MP501, and grid links to each other with the drain electrode of PMOS pipe MP504.
In addition, described circuit also comprises a building-out capacitor C
C, this building-out capacitor C
CThe source electrode and the PMOS that are connected in current detecting pipe MP502 manage between the drain electrode of MP504.
In the described circuit shown in Figure 5, the testing process of inductive current is divided into following two kinds of situations:
Work as V
Q=0 o'clock, thus inductive current obtained by the electric current of detection power pipe P1.Below the concrete implementation method of described testing circuit is made labor.
Because V
QFor low, then power tube P1 and the equal conducting of switching tube MS501, continued flow tube MN504 and switching tube MS502 all end, because current detecting pipe MP501 is connected with current detecting pipe MP502 mirror image, PMOS pipe MP503 is connected with the MP504 mirror image simultaneously, NMOS pipe MN501, MN502 are connected with MN503 also mirror image, then electric current I
1Also mirror image is originally specifically implemented current source I in circuit
1Be small power supply, and each arrangement of mirrors is identical as the breadth length ratio of metal-oxide-semiconductor, then the source voltage terminal of mirror image PMOS pipe MP503 and MP504 equates, i.e. V
A=V
B, owing to current detecting pipe MP501, current detecting pipe MP502, power tube P1 are operated in linear zone, the resistance of promptly described three pipes is used R respectively
On_MP501, R
On_MP502, R
On_P1Expression, as shown in Figure 5, the electric current of PMOS pipe MP501 and MP502 is respectively I
P501And I
1, the electric current of power tube P1 is I
P1, then can obtain formula (1) by Ohm's law:
I
p501R
on_MP501＝I
p1R
on_P1+I
1R
on_MP502 (1)
I again
P2=I
Sen+ I
1(2)
R
on_MP501＝R
on_MP502 (3)
By formula (1), (2), (3) as can be known,
I
P1=KI
Sen, wherein: I
SenBe sample rate current, I
P1≈ I
L, I
LBe inductive current,
Therefore, the breadth length ratio by design power pipe P1 and current detecting pipe MP501 just can obtain inductive current I
LWith sample rate current I
SenRatio K, therefore, adopt sample rate current I
SenCome proportional equivalent inductance electric current I
L, the shutoff of power controlling pipe MP1 can be fed back the size of output voltage at high speed, obtains the output voltage of efficient stable.
It should be noted that the described current sample module 105 of the specific embodiment of the invention is not limited to circuit as shown in Figure 5, other satisfies the circuit of realizing the sampling inductive current and all belongs to the scope of protection of the invention.
Be illustrated in figure 6 as a kind of particular circuit configurations of pulse-width modulation comparator 104 in the specific embodiment of the invention, this circuit comprises five PMOS pipe M600, M601, M602, M603, M606, and three NMOS pipe M604, M605, M607, wherein, PMOS manages M601, M602 and M603 form one group of differential pair tube, M601 and NMOS pipe M604 are connected serially to ground, after linking to each other, the drain electrode of M602 and M603 is connected serially to ground with NMOS pipe M605, NMOS pipe M604 manages 605 mirror images with NMOS and is connected, and NMOS pipe M604 grid leak is extremely continuous, three PMOS pipe M601, drain electrode with PMOS pipe M600 after the source electrode of M602 and M603 links to each other links to each other, and PMOS pipe M600 and M606 mirror image are connected to bias supply V
b, PMOS pipe M606 and NMOS pipe M607 are connected serially to ground, and the grid of NMOS pipe M607 links to each other the output signal V of this pulse-width modulation comparator 104 with the drain electrode of NMOS pipe M605
PWMDrain electrode output from NMOS pipe M607.
When the soft start of system began, because this moment, output voltage was very low, the output error signal Vea level of error amplifier was very high, promptly Vea＞＞V1, the electric current that flows through the M2 pipe is very little, can ignore, thereby the output V by described pulse-width modulation comparator
PWMThe break-make of power controlling pipe.Along with the change of V1 ladder is big, also ladder rising of output voltage, the output of error amplifier also slowly reduce.When soft start finishes, the output error signal of error amplifier plays a major role, and the voltage of resistor network output V1 is greater than the error signal Vea at the beginning of the soft start, and the electric current that promptly flows through PMOS pipe M603 this moment can be ignored.Circuit is in the closed loop state, and Vea and V2 compare, and produces a series of pulse V
PWMMake circuit output voltage be stabilized in a value.
Be illustrated in figure 7 as physical circuit shown in the specific embodiment of the invention and realize the key control signal oscillogram of soft start-up process, each module particular circuit configurations of all adopting in this embodiment to be exemplified wherein, then D1 and D0 are respectively 4096 frequency divisions and 2048 frequency divisions of clock signal clk, duty ratio becomes big along with the ladder rising of resistor network, also ladder rising of output voltage, thus fast and stable ground reaches the effect of soft start.
Above content be in conjunction with concrete preferred implementation to further describing that the present invention did, can not assert that concrete enforcement of the present invention is confined to these explanations.For the general technical staff of the technical field of the invention, without departing from the inventive concept of the premise, can also make some simple deduction or replace, all should be considered as belonging to protection scope of the present invention.
Claims (6)
1. a soft starting circuit that is used for Switching Power Supply is characterized in that, this circuit comprises oscillator, frequency division counter module, resistor network, current sample module, current source I
2, resistance R 100, pulse-width modulation comparator, inverter, rest-set flip-flop and power tube PMOS P1, wherein, reset signal inputs to the S end of frequency division counter module and rest-set flip-flop with the output clock of oscillator, the output signal controlling resistance network of this frequency division counter module obtains the negative input end that output voltage connects the pulse-width modulation comparator, another negative input end of pulse-width modulation comparator connects error voltage, the output current and the current source I of positive input termination current sample module
2Stack is after the voltage that resistance R 100 obtains, and the output of pulse-width modulation comparator inputs to the R end of rest-set flip-flop after inverter is anti-phase, and the reversed-phase output of this rest-set flip-flop connects the grid of power tube PMOS P1 and the input of current sample module.
2. soft starting circuit according to claim 1 is characterized in that, described current source I
2For doing the triangular current source of slope compensation.
3. soft starting circuit according to claim 1, it is characterized in that, described pulse-width modulation comparator comprises five PMOS pipe M600, M601, M602, M603, M606, and three NMOS pipe M604, M605, M607, wherein PMOS manages M601, M602 and M603 are one group of differential pair tube, PMOS pipe M601 and NMOS pipe M604 are connected serially to ground, after linking to each other, the drain electrode of PMOS pipe M602 and M603 is connected serially to ground with NMOS pipe M605, NMOS pipe M604 manages 605 mirror images with NMOS and is connected, and NMOS pipe M604 grid leak is extremely continuous, three PMOS pipe M601, drain electrode with PMOS pipe M600 after the source electrode of M602 and M603 links to each other links to each other, PMOS pipe M600 is connected with the M606 mirror image, PMOS pipe M606 and NMOS pipe M607 are connected serially to ground, and the grid of NMOS pipe M607 links to each other the output signal V of this pulse-width modulation comparator with the drain electrode of NMOS pipe
PWMDrain electrode output from NMOS pipe M607.
4. soft starting circuit according to claim 1, it is characterized in that, described frequency division counter module comprises two two input NOR gate G1 and G2, n T trigger, an inverter and a rest-set flip-flop, wherein import the clear terminal that the output of clear terminal clear behind inverter is connected to n T trigger respectively, this n T trigger connected successively, the input end of clock of the T trigger in back connects the Q output of previous T trigger, wherein n-1 T trigger
End output signal D0, n T trigger
End output signal D1, and output signal D0 and D1 input to two inputs of a NOR gate G1, the output of this NOR gate G1 and clear terminal clear are as two inputs of rest-set flip-flop, the output of this rest-set flip-flop and described clock signal clk are as two inputs of another NOR gate G2, first T trigger input end of clock of the output termination of this NOR gate G2, wherein n is a natural number.
5. soft starting circuit according to claim 1 is characterized in that, described resistor network comprises M-1 NMOS pipe and M resistance, power supply V
In, current source I
1With current source I
3, wherein M resistance and current source I
1Be connected serially to power supply V
InAnd between the ground, will be from power supply V
InWhether each resistance NMOS pipe in parallel in M-1 the resistance of beginning, the turn-on and turn-off control by the NMOS pipe and this NMOS pipe parallel resistor place in circuit, and then the magnitude of voltage V that exports of control
1, current source I
3From power supply V
InBe connected to ground through M resistance, wherein M is a natural number.
6. soft starting circuit according to claim 1 or 5 is characterized in that described current source I
2With current source I
3The electric current of output is identical.
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| CN200810241920A CN101771339A (en) | 2008-12-29 | 2008-12-29 | Soft start circuit for switch power supply |
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|---|---|---|---|
| CN200810241920A CN101771339A (en) | 2008-12-29 | 2008-12-29 | Soft start circuit for switch power supply |
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| CN113904309A (en) * | 2021-10-15 | 2022-01-07 | 无锡力芯微电子股份有限公司 | Soft start circuit capable of suppressing surge current and overshoot voltage |
| CN113965086A (en) * | 2021-10-21 | 2022-01-21 | 中国电子科技集团公司第二十四研究所 | Multi-input current type PWM comparator circuit |
| CN114333727A (en) * | 2021-12-29 | 2022-04-12 | Tcl华星光电技术有限公司 | Display panel |
| CN115037125A (en) * | 2022-06-22 | 2022-09-09 | 无锡格兰德微电子科技有限公司 | High-reliability wide-voltage-range Buck controller circuit |
| CN115085515A (en) * | 2022-08-22 | 2022-09-20 | 成都动芯微电子有限公司 | Novel output power adjustable circuit |
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| CN102447380A (en) * | 2010-10-12 | 2012-05-09 | Ad技术有限公司 | Soft start circuit for power supplies |
| CN102447380B (en) * | 2010-10-12 | 2014-08-20 | Ad技术有限公司 | Soft start circuit for power supplies |
| CN102074933A (en) * | 2010-12-30 | 2011-05-25 | 天津南大强芯半导体芯片设计有限公司 | Controlling and activating circuit with low power consumption |
| CN102074933B (en) * | 2010-12-30 | 2013-11-06 | 天津南大强芯半导体芯片设计有限公司 | Controlling and activating circuit with low power consumption |
| CN102566648A (en) * | 2011-12-28 | 2012-07-11 | 上海中科高等研究院 | Soft start controller |
| CN102566648B (en) * | 2011-12-28 | 2014-05-07 | 中国科学院上海高等研究院 | Soft start controller |
| US8804383B2 (en) | 2012-03-09 | 2014-08-12 | Delta Electronics, Inc. | Starter of grid-connected inverter and control method thereof |
| CN103378718B (en) * | 2012-04-20 | 2015-07-15 | 中国科学院电子学研究所 | Multi-mode step-down DC-DC converter in-chip soft start circuit |
| CN103378718A (en) * | 2012-04-20 | 2013-10-30 | 中国科学院电子学研究所 | Multi-mode step-down DC-DC converter in-chip soft start circuit |
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| CN108362929A (en) * | 2018-04-18 | 2018-08-03 | 无锡硅动力微电子股份有限公司 | Two-way anode current sampling module, sample circuit, switching circuit and the method for sampling |
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| CN109067005A (en) * | 2018-06-26 | 2018-12-21 | 上海航天设备制造总厂有限公司 | For rotating the contactless power supply device of electromechanical equipment |
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| CN110957902A (en) * | 2018-09-27 | 2020-04-03 | 英飞凌科技奥地利有限公司 | Method, apparatus and system for implementing soft start of power converter circuit |
| CN110336457A (en) * | 2019-07-26 | 2019-10-15 | 南京桐润新能源有限公司 | A kind of digital vehicle power supply output soft-starting method |
| CN112671222A (en) * | 2021-01-22 | 2021-04-16 | 上海艾为电子技术股份有限公司 | DCDC converter, electronic equipment and method for realizing soft start of DCDC converter |
| CN113904309A (en) * | 2021-10-15 | 2022-01-07 | 无锡力芯微电子股份有限公司 | Soft start circuit capable of suppressing surge current and overshoot voltage |
| CN113904309B (en) * | 2021-10-15 | 2022-08-12 | 无锡力芯微电子股份有限公司 | Soft start circuit capable of suppressing surge current and overshoot voltage |
| CN113965086A (en) * | 2021-10-21 | 2022-01-21 | 中国电子科技集团公司第二十四研究所 | Multi-input current type PWM comparator circuit |
| CN113965086B (en) * | 2021-10-21 | 2023-09-05 | 中国电子科技集团公司第二十四研究所 | Multi-input current type PWM comparator circuit |
| CN114333727A (en) * | 2021-12-29 | 2022-04-12 | Tcl华星光电技术有限公司 | Display panel |
| CN115037125A (en) * | 2022-06-22 | 2022-09-09 | 无锡格兰德微电子科技有限公司 | High-reliability wide-voltage-range Buck controller circuit |
| CN115037125B (en) * | 2022-06-22 | 2024-04-26 | 无锡格兰德微电子科技有限公司 | High-reliability wide-voltage-range Buck controller circuit |
| CN115085515A (en) * | 2022-08-22 | 2022-09-20 | 成都动芯微电子有限公司 | Novel output power adjustable circuit |
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