CN101771122A - AlGaInP system LED with electron hole dual limitation and preparation method thereof - Google Patents
AlGaInP system LED with electron hole dual limitation and preparation method thereof Download PDFInfo
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- CN101771122A CN101771122A CN201010011342A CN201010011342A CN101771122A CN 101771122 A CN101771122 A CN 101771122A CN 201010011342 A CN201010011342 A CN 201010011342A CN 201010011342 A CN201010011342 A CN 201010011342A CN 101771122 A CN101771122 A CN 101771122A
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Abstract
The invention provides an AlGaInP system LED with the electron hole dual limitation and a preparation method thereof. An upper electrode, an ITO conductive light transmission layer, a GaP window layer, an upper limiting layer, an active region, a lower limiting layer, a Bragg reflecting layer, a buffer layer, a substrate and a lower electrode vertically and sequentially grow in a laminated way on a chip structure of the LED from top to bottom, wherein the ITO conductive light transmission layer extends from the GaP window layer to the upper surface of the upper limiting layer, and both sides of the Bragg reflecting layer are provided with oxidizing insulation regions. The preparation method comprises the following steps: (1) growing epitaxial materials; (2) etching current baffle regions; (3) carrying out vapor deposition on ITO transparent conductive films; (4) manufacturing the upper electrode and the lower electrode; (5) carrying out oxidization; and (6) separating pipe cores and carrying out encapsulation. The invention forms the Schottky contact with the upper limiting layer through the ITO transparent conductive films, so the current baffle layer is formed. The process is simple, the repetitiveness is high, and in addition, the cost is low, so the luminous efficiency and the light extraction efficiency of the LED are improved.
Description
Technical field
The present invention relates to a kind of AlGaInP (AlGaInP) is structure of LED (light-emitting diode) and preparation method thereof, belongs to the photoelectron technology field.
Background technology
LED has advantages such as volume is little, the life-span long, low in energy consumption, the AlGaInP system LED that wherein prepares on the GaAs substrate is in yellowish green, yellow, orange and red wave band superior performance, and the fields such as RGB three primary colors full color display, white light source, traffic lights, city lighting engineering, automobile lamp that are widely used at present have broad application prospects.
At present, common AlGaInP be led chip structure as shown in Figure 1, comprise bottom electrode 10, substrate 9, resilient coating 8, Bragg reflecting layer 7, lower limit layer 6, active area 5, upper limiting layer 4, current extending (GaP Window layer) 3 and top electrode 1 from bottom to top, behind the electrode injection current, radiation recombination take place at active area 5 in electronics and hole, and electric energy is converted into photon and emits from the upper surface of LED.The subject matter that the LED of this structure exists has three aspects: the one, and,, cause the lateral current of current extending 3 indifferent because present growth technology is difficult to obtain the current extending highly doped, that thickness is thicker 3.Therefore, from power on the electric current overwhelming majority injected of the utmost point 1 collect in top electrode 1 under.And P type electrode is generally non-transparent electrode, and the photon major part that counter electrode area active district radiation recombination produces is absorbed; The 2nd,, N face electronic current extended capability is higher, and surface electronic hole, tube core side ratio is increased, and forms non-radiative compoundly, and this also can reduce the LED light efficiency; In addition, the GaAs substrate absorbs visible light, and is though the introducing of DBR can be with most descending light reflection, owing to its reflectance spectrum half-breadth is narrower, relatively poor to the light reflective properties of non-perpendicular direction.According to conservation of energy principle, the energy that the electric energy that the problems referred to above cause can't be converted into luminous energy all can be produced heat by absorbed, can have a strong impact on LED light efficiency and life-span.
About the bigger problem of current density under the solution top electrode 1, there is the scholar to propose between upper limiting layer 4 and current extending 3, to make current barrier layer, a kind of " light-emitting diode that the distribution of current barrier layer is corresponding with top electrode and preparation method thereof " disclosed as Chinese patent literature CN101388431, its structure comprises top electrode, current extending, upper limiting layer, active area, lower limit layer, resilient coating, substrate, bottom electrode, also include the current barrier layer that is positioned under the top electrode, the distribution of current barrier layer is corresponding with top electrode, is provided with the conductive light antireflection layer between top electrode and current extending; And current barrier layer is arranged on conductive light antireflection layer or current extending or upper limiting layer or active area the inside, or adjacent two-layer, three layers, four layers the inside; Wherein current barrier layer is realized by back technology.This method has stopped that effectively electric current extremely directly transports from power on downwards, increases the expansion of electric current, has improved luminous efficiency.The also useful secondary epitaxy technology of industry prepares the method for current barrier layer, just once be extended to extension one deck N type thin layer behind the P type upper limiting layer, behind the P type of perhaps the having grown upper limiting layer, take out epitaxial wafer, utilize the growth of other materials deposition technology to go up heat insulating lamina, then by photoetching process between upper limiting layer 4 and current extending 3, the electrode corresponding region forms the current blocking layer region down, again epitaxial wafer is put into the current extending of growing for the second time in the MOCVD equipment, after secondary epitaxy is finished, on the current extending of current barrier layer correspondence, prepare top electrode, to reach the problem of restriction electric current concentrations to the electrode below.It is low that this technology has complexity, cost height, rate of finished products.The method that also has the people to inject by ion, on the thick current extending that current extending and contact layer constituted, carry out the ion injection or diffuse to form the barrier layer, current blocking layer thickness in the method is difficult to accurately control, still there is current expansion its below, thereby can not block current flow converging below electrode, and thick current extending (8-50um) and ion inject and the diffusion technology complexity, but reduce process controllability and rate of finished products, thereby increase product cost.
Summary of the invention
The present invention is directed to low, the problems such as luminous power is less, thermal characteristics difference of luminous efficiency that AlGaInP (AlGaInP) is the structure existence of LED that have now, the AlGaInP with the dual restriction in electron hole that provides a kind of luminous efficiency and light extraction efficiency to be improved simultaneously is LED, can significantly improve the chip internal CURRENT DISTRIBUTION, make electric current more, more be evenly distributed in the bright dipping zone, can improve simultaneously the light output of tube core side, the light efficiency of LED and life-span are increased substantially.It is the preparation method of LED that the present invention provides a kind of AlGaInP that this has the dual restriction in electron hole simultaneously.
AlGaInP with the dual restriction in electron hole of the present invention is LED, its chip structure comprises from top to bottom the top electrode of the storied length of longitudinal layer, ITO (tin indium oxide) conductive euphotic zone, GaP Window layer, upper limiting layer, active area, lower limit layer, Bragg reflecting layer, resilient coating, substrate and bottom electrode successively, it is characterized in that: the thickness of GaP Window layer be 500 dusts (
)～10000 dust (
), the GaP Window layer is provided with the corresponding consistent corrosion area of shape and position with top electrode, this corrosion area is deep to the upper surface of upper limiting layer, the corrosion area of ITO conductive euphotic zone on the GaP Window layer prepares in the Bragg reflecting layer of correspondence to have around the electrode and can limit the oxide isolated district that electronics flows until the upper surface of upper limiting layer.
Comprise the Al that is easy to oxidation in the Bragg reflecting layer
xGa
1-xAs/AlAs structural material, wherein 0＜x＜0.7.
AlGaInP (the Al that upper limiting layer mixes for the p type
xGa
1-xInP, x＞0.7) material, its doping content is 1 * 10
17Cm
-3～1 * 10
18m
-3
The doping content of GaP Window layer is 1 * 10
18m
-3～5 * 10
19Cm
-3
ITO conductive euphotic zone upper surface direct and upper limiting layer forms Schottky contacts in the above-mentioned led chip, and the zone beyond this zone is an ohmic contact, Schottky contact region has formed the current blocking effect, thereby both can expand to the peripheral region of electrode from the electric current that electrode injects easily, can stop electric current under the p type top electrode again directly toward current downflow.Above-mentioned current blocking mechanism does not use N type or similar SiO
2Insulating barrier, do not need secondary epitaxy technology, technology is simple; In addition, the thickness of GaP Window layer is than conventional LED thin a lot (thickness of GaP Window layer is generally 8um-10um in the conventional led chip), the ITO conductive layer electric current current expansion ability of using is strong and once can the large tracts of land evaporation, thereby has improved the growth efficiency of epitaxy technique, has saved cost.
Bragg reflecting layer includes the AlAs layer of the high Al component that is easy to oxidation, adopts the lateral oxidation technology easy oxide layer can be become the Al of non-conductive state
2O
3, it can produce constraint to the electronics flow path, avoids the side non-radiative compound, simultaneously Al
xGa
1-xAs/Al
2O
3Compare Al
xGa
1-xThe As/AlAs bragg structure has wideer spectral reflectance half-breadth, can improve the light output of tube core side, thereby improve light output efficiency.
AlGaInP with the dual restriction in electron hole of the present invention is the preparation method of LED, may further comprise the steps:
(1) epitaxial material growth: by the existing AlGaInP conventional preparation method that is led chip on GaAs (GaAs) n type substrate, with MOCVD (metallochemistry organic vapor phase deposition) method epitaxial growth GaAs resilient coating, Bragg reflecting layer, lower limit layer, active area, upper limiting layer and GaP Window layer successively.Wherein, upper limiting layer is the AlGaInP (Al of p type doping
xGa
1-xInP, x＞0.7) material, Bragg reflecting layer is Al
xGa
1-xAs/AlAs (gallium aluminium arsenic/aluminium arsenic) material (wherein 0＜x＜0.7);
(2) etching current barrier region: the epitaxial wafer that makes cleaned according to a conventional method and whirl coating with protection upper surface (GaP Window layer one side), the caustic solution of employing routine then is in the upper surface photoetching and erode away the zone that will do the barrier layer, the control corrosion depth is to upper limiting layer, and should the zone corresponding consistent with the shape and the position of top electrode, remove photoresist and clean;
(3) evaporation ITO nesa coating: utilize the ITO filming equipment to steam ITO (tin indium oxide) nesa coating at the epitaxial wafer upper surface;
(4) upper and lower electrode preparation: adopt the electron beam evaporation platform at epitaxial wafer upper surface evaporation layer of Au Be metal level, and make the top electrode of required form and position by lithography, to 150um-200um, the substrate lower surface evaporation layer of Au GeNi at attenuate forms bottom electrode then with substrate thinning;
(5) oxidation: adopt the lateral oxidation method that the AlAs of subregion around the Bragg reflecting layer is oxidized to Al
2O
3Insulating barrier forms the oxide isolated district around the Bragg reflecting layer.
(6) tube core separates and encapsulation: utilize the die separation machine that chip is separated the epitaxial wafer after the oxidation, utilize conventional LED packaging technology to prepare the LED device then.
The present invention adopts the disposable growth of finishing each epitaxial structure in epitaxial growth of metal organic chemical vapor deposition (MOCVD) method, can be easily with THICKNESS CONTROL to dust (
) precision, than deposited by electron beam evaporation or CVD method better precision is arranged.Form current blocking by the Schottky contacts between ITO nesa coating and the upper limiting layer, did the current blocking layer process and compare with prepare N type or insulating barrier in the past, technology of the present invention is simple, and repeatability is high, and cost is low, has realistic meaning for industrialization production.In addition, realized the electronics flow restriction, and improved the side direction bright dipping ability of tube core by lateral oxidation Bragg reflecting layer technology.
Description of drawings
Fig. 1 is that existing AlGaInP is the structural representation of led chip.
Fig. 2 is that AlGaInP of the present invention is the structural representation of led chip.
Fig. 3 is the structural representation of the epitaxial wafer of AlGaInP of the present invention (AlGaInP) LED.
Fig. 4 is the schematic diagram that forms the current blocking district.
Fig. 5 is the current expansion schematic diagram with light-emitting diode of current blocking plot structure.
Fig. 6 is a led current expansion schematic diagram of the present invention.
Wherein: 1, top electrode, 2, the ITO conductive euphotic zone, 3, the GaP Window layer, 4, upper limiting layer, 5, active area, 6, lower limit layer, 7, Bragg reflecting layer, 8, resilient coating, 9, substrate, 10 bottom electrodes, 11, the current blocking district, 12, the oxide isolated district.
Embodiment
AlGaInP with the dual restriction in electron hole of the present invention is LED, the structure of its chip comprises top electrode 1, ITO conductive euphotic zone 2, GaP Window layer 3, upper limiting layer 4, active area 5, lower limit layer 6, Bragg reflecting layer 7, resilient coating 8, substrate 9 and bottom electrode 10 from top to bottom as shown in Figure 2.GaP Window layer 3 is provided with the corresponding consistent corrosion area of shape and position with top electrode 1, this corrosion area is deep to the upper surface of upper limiting layer 4, the corrosion area of ITO conductive euphotic zone 2 on GaP Window layer 3 is until the upper surface of upper limiting layer 4, form Schottky contacts, formed current blocking district 11.The maximum carrier concentration of ITO conductive euphotic zone 2 reaches 10
21Cm
-3The order of magnitude, its thickness be 1000 dusts (
)～10000 dust (
).AlGaInP (the Al that upper limiting layer 4 mixes for the p type
xGa
1-xInP, x＞0.7) material, its doping content is 1 * 10
17Cm
-3～1 * 10
18Cm
-3The thickness of GaP Window layer 3 is 500A～10000A, and its doping content is 1 * 10
18Cm
-3～5 * 10
19Cm
-3Comprise the Al that is easy to oxidation in the Bragg reflecting layer 7
xGa
1-xThe As/AlAs structural material, 0＜x＜0.7 wherein, aluminium arsenic is easy oxide layer, and gallium aluminium arsenic is for being difficult for oxide layer, and oxide layer has much bigger oxidation rate than being difficult for oxide layer.The peripheral regions of Bragg reflecting layer is provided with oxide isolated district 12.
The preparation method that above-mentioned AlGaInP with the dual restriction in electron hole is LED is as follows:
(1) on the n type substrate 9 that GaAs (GaAs) material with AlGaInP (AlGaInP) coupling forms, with metallochemistry organic vapor phase deposition (MOCVD) method epitaxial growth buffer 8, Bragg reflecting layer 7, lower limit layer 6, active area 5, upper limiting layer 4 and GaP Window layer 3 successively, obtained the epitaxial wafer of AlGaInP (AlGaInP) LED, as shown in Figure 3.
Parameters such as the growth temperature of each epitaxial loayer, growth atmosphere, growth pressure are all identical, and Bragg reflecting layer 7 is gallium aluminium arsenic/aluminium arsenic (Al
xGa
1-xAs/AlAs) material, x can be controlled in 0.40; Upper limiting layer 4 thickness be 6000 dusts (
)～10000 dust (
), doping content is 7～9 * 10
17Cm
-3The thickness of GaP Window layer 3 is 500A～10000A, and doping content is 1～5 * 10
19Cm
-3
(2) by conventional way with epitaxial wafer clean and whirl coating with the protection upper surface; then in the position of the corresponding top electrode 1 of upper surface; GaP with thin layer GaP Window layer 3 respective regions erodes by photoetching; the control corrosion depth is to upper limiting layer 4; and should the zone consistent with top electrode 1, remove photoresist and clean.
(3) adopt the ITO filming equipment to steam ITO (tin indium oxide) nesa coating at the epitaxial wafer upper surface, its thickness is 1000～10000A.
The counter electrode position, ITO nesa coating and upper limiting layer material form Schottky barrier, thereby can form current blocking district 11 as shown in Figure 4.
(4) adopt the electron beam evaporation platform at ITO nesa coating upper surface evaporation layer of Au Be metal level, and make the top electrode of required form and position by lithography, with substrate thinning to 150um～200um, substrate lower surface evaporation layer of Au GeNi at attenuate forms bottom electrode then, has finished the making of upper and lower electrode.
Fig. 5 has provided the current expansion schematic diagram of the light-emitting diode with current blocking district 11 structures, both can from the electric current that electrode injects very natural expand to electrode around, can stop electric current under the p type top electrode 1 directly toward current downflow again.
(5) adopt the lateral oxidation method that the AlAs of subregion around the Bragg reflecting layer is oxidized to Al
2O
3Insulating barrier forms the oxide isolated district around the Bragg reflecting layer.
Fig. 6 has provided the current expansion schematic diagram of the led chip of the present invention's preparation, forms oxide isolated district 12 around Bragg reflecting layer 7.
(6) utilize the die separation machine that chip is separated the epitaxial wafer after the oxidation, utilize conventional LED packaging technology to prepare the LED device then.
Claims (5)
1. the AlGaInP with the dual restriction in electron hole is LED, its chip structure comprises from top to bottom the top electrode of the storied length of longitudinal layer successively, the tin indium oxide conductive euphotic zone, the GaP Window layer, upper limiting layer, active area, lower limit layer, Bragg reflecting layer, resilient coating, substrate and bottom electrode, it is characterized in that: the thickness of GaP Window layer is 500 dusts～10000 dusts, the GaP Window layer is provided with the corresponding consistent corrosion area of shape and position with top electrode, this corrosion area is deep to the upper surface of upper limiting layer, the corrosion area of ITO conductive euphotic zone on the GaP Window layer prepares in the Bragg reflecting layer of correspondence to have around the electrode and can limit the oxide isolated district that electronics flows until the upper surface of upper limiting layer.
2. the AlGaInP with the dual restriction in electron hole according to claim 1 is LED, it is characterized in that: comprise the Al that is easy to oxidation in the described Bragg reflecting layer
xGa
1-xAs/AlAs structural material, wherein 0＜x＜0.7.
3. the AlGaInP with the dual restriction in electron hole according to claim 1 is LED, it is characterized in that: the AlGaInP materials A l that described upper limiting layer mixes for the p type
xGa
1-xInP, x＞0.7, its doping content is 1 * 10
17Cm
-3～1 * 10
18Cm
-3
4. the AlGaInP with the dual restriction in electron hole according to claim 1 is LED, it is characterized in that: the doping content of described GaP Window layer is 1 * 10
18Cm
-3～5 * 10
19Cm
-3
5. the preparation method that the described AlGaInP with the dual restriction in electron hole of claim 1 is LED is characterized in that, may further comprise the steps:
(1) epitaxial material growth: by the existing AlGaInP conventional preparation method that is led chip on GaAs n type substrate, with MOCVD (metallochemistry organic vapor phase deposition) method epitaxial growth GaAs resilient coating, Bragg reflecting layer, lower limit layer, active area, upper limiting layer and GaP Window layer successively, wherein, upper limiting layer is the AlGaInP materials A l of p type doping
xGa
1-xInP, x＞0.7, Bragg reflecting layer is Al
xGa
1-xAs/AlAs material, wherein 0＜x＜0.7;
(2) etching current barrier region: with the epitaxial wafer that makes clean according to a conventional method and whirl coating with the protection upper surface, the caustic solution of employing routine then is in the upper surface photoetching and erode away the zone that will do the barrier layer, the control corrosion depth is to upper limiting layer, and should the zone corresponding consistent with the shape and the position of top electrode 1, remove photoresist and clean;
(3) evaporation ITO nesa coating: utilize the ITO filming equipment to steam the indium tin oxide transparent conducting film at the epitaxial wafer upper surface, its thickness is 1000 dusts～10000 dusts;
(4) upper and lower electrode preparation: adopt the electron beam evaporation platform at epitaxial wafer upper surface evaporation layer of Au Be metal level, and make the top electrode of required form and position by lithography, to 150um-200um, the substrate lower surface evaporation layer of Au GeNi at attenuate forms bottom electrode then with substrate thinning;
(5) oxidation: adopt the lateral oxidation method that the AlAs of subregion around the Bragg reflecting layer is oxidized to Al
2O
3Insulating barrier forms the oxide isolated district around the Bragg reflecting layer;
(6) tube core separates and encapsulation: utilize the die separation machine that chip is separated the epitaxial wafer after the oxidation, utilize conventional LED packaging technology to prepare the LED device then.
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|---|---|---|---|
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|---|---|---|---|
| CN201010011342A CN101771122A (en) | 2010-01-18 | 2010-01-18 | AlGaInP system LED with electron hole dual limitation and preparation method thereof |
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Family
ID=42503837
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Application publication date: 20100707 |