CN110088922A - A kind of LED chip construction and preparation method thereof - Google Patents
A kind of LED chip construction and preparation method thereof Download PDFInfo
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- CN110088922A CN110088922A CN201880004805.XA CN201880004805A CN110088922A CN 110088922 A CN110088922 A CN 110088922A CN 201880004805 A CN201880004805 A CN 201880004805A CN 110088922 A CN110088922 A CN 110088922A
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- 238000002360 preparation method Methods 0.000 title abstract description 7
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- 239000004065 semiconductor Substances 0.000 claims abstract description 41
- 239000000758 substrate Substances 0.000 claims abstract description 36
- 238000000059 patterning Methods 0.000 claims abstract description 18
- 238000004519 manufacturing process Methods 0.000 claims description 24
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- 125000004122 cyclic group Chemical group 0.000 claims description 4
- PCHJSUWPFVWCPO-UHFFFAOYSA-N gold Chemical compound [Au] PCHJSUWPFVWCPO-UHFFFAOYSA-N 0.000 claims description 4
- 229910052737 gold Inorganic materials 0.000 claims description 4
- 239000010931 gold Substances 0.000 claims description 4
- 238000000407 epitaxy Methods 0.000 claims description 2
- 229910002601 GaN Inorganic materials 0.000 description 17
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- 229910001218 Gallium arsenide Inorganic materials 0.000 description 5
- 230000005611 electricity Effects 0.000 description 5
- 238000005530 etching Methods 0.000 description 5
- 239000000377 silicon dioxide Substances 0.000 description 5
- 238000010586 diagram Methods 0.000 description 4
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- OKTJSMMVPCPJKN-UHFFFAOYSA-N Carbon Chemical compound [C] OKTJSMMVPCPJKN-UHFFFAOYSA-N 0.000 description 2
- 229910005540 GaP Inorganic materials 0.000 description 2
- JMASRVWKEDWRBT-UHFFFAOYSA-N Gallium nitride Chemical compound [Ga]#N JMASRVWKEDWRBT-UHFFFAOYSA-N 0.000 description 2
- 229910052782 aluminium Inorganic materials 0.000 description 2
- 230000008859 change Effects 0.000 description 2
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- GYHNNYVSQQEPJS-UHFFFAOYSA-N Gallium Chemical compound [Ga] GYHNNYVSQQEPJS-UHFFFAOYSA-N 0.000 description 1
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Classifications
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- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L33/00—Semiconductor devices having potential barriers specially adapted for light emission; Processes or apparatus specially adapted for the manufacture or treatment thereof or of parts thereof; Details thereof
- H01L33/02—Semiconductor devices having potential barriers specially adapted for light emission; Processes or apparatus specially adapted for the manufacture or treatment thereof or of parts thereof; Details thereof characterised by the semiconductor bodies
- H01L33/04—Semiconductor devices having potential barriers specially adapted for light emission; Processes or apparatus specially adapted for the manufacture or treatment thereof or of parts thereof; Details thereof characterised by the semiconductor bodies with a quantum effect structure or superlattice, e.g. tunnel junction
- H01L33/06—Semiconductor devices having potential barriers specially adapted for light emission; Processes or apparatus specially adapted for the manufacture or treatment thereof or of parts thereof; Details thereof characterised by the semiconductor bodies with a quantum effect structure or superlattice, e.g. tunnel junction within the light emitting region, e.g. quantum confinement structure or tunnel barrier
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- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L33/00—Semiconductor devices having potential barriers specially adapted for light emission; Processes or apparatus specially adapted for the manufacture or treatment thereof or of parts thereof; Details thereof
- H01L33/36—Semiconductor devices having potential barriers specially adapted for light emission; Processes or apparatus specially adapted for the manufacture or treatment thereof or of parts thereof; Details thereof characterised by the electrodes
- H01L33/40—Materials therefor
- H01L33/405—Reflective materials
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- H01L33/02—Semiconductor devices having potential barriers specially adapted for light emission; Processes or apparatus specially adapted for the manufacture or treatment thereof or of parts thereof; Details thereof characterised by the semiconductor bodies
- H01L33/10—Semiconductor devices having potential barriers specially adapted for light emission; Processes or apparatus specially adapted for the manufacture or treatment thereof or of parts thereof; Details thereof characterised by the semiconductor bodies with a light reflecting structure, e.g. semiconductor Bragg reflector
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- H01L33/00—Semiconductor devices having potential barriers specially adapted for light emission; Processes or apparatus specially adapted for the manufacture or treatment thereof or of parts thereof; Details thereof
- H01L33/02—Semiconductor devices having potential barriers specially adapted for light emission; Processes or apparatus specially adapted for the manufacture or treatment thereof or of parts thereof; Details thereof characterised by the semiconductor bodies
- H01L33/14—Semiconductor devices having potential barriers specially adapted for light emission; Processes or apparatus specially adapted for the manufacture or treatment thereof or of parts thereof; Details thereof characterised by the semiconductor bodies with a carrier transport control structure, e.g. highly-doped semiconductor layer or current-blocking structure
- H01L33/145—Semiconductor devices having potential barriers specially adapted for light emission; Processes or apparatus specially adapted for the manufacture or treatment thereof or of parts thereof; Details thereof characterised by the semiconductor bodies with a carrier transport control structure, e.g. highly-doped semiconductor layer or current-blocking structure with a current-blocking structure
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- H01L33/00—Semiconductor devices having potential barriers specially adapted for light emission; Processes or apparatus specially adapted for the manufacture or treatment thereof or of parts thereof; Details thereof
- H01L33/36—Semiconductor devices having potential barriers specially adapted for light emission; Processes or apparatus specially adapted for the manufacture or treatment thereof or of parts thereof; Details thereof characterised by the electrodes
- H01L33/38—Semiconductor devices having potential barriers specially adapted for light emission; Processes or apparatus specially adapted for the manufacture or treatment thereof or of parts thereof; Details thereof characterised by the electrodes with a particular shape
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- H01L33/36—Semiconductor devices having potential barriers specially adapted for light emission; Processes or apparatus specially adapted for the manufacture or treatment thereof or of parts thereof; Details thereof characterised by the electrodes
- H01L33/38—Semiconductor devices having potential barriers specially adapted for light emission; Processes or apparatus specially adapted for the manufacture or treatment thereof or of parts thereof; Details thereof characterised by the electrodes with a particular shape
- H01L33/382—Semiconductor devices having potential barriers specially adapted for light emission; Processes or apparatus specially adapted for the manufacture or treatment thereof or of parts thereof; Details thereof characterised by the electrodes with a particular shape the electrode extending partially in or entirely through the semiconductor body
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- H01L33/36—Semiconductor devices having potential barriers specially adapted for light emission; Processes or apparatus specially adapted for the manufacture or treatment thereof or of parts thereof; Details thereof characterised by the electrodes
- H01L33/40—Materials therefor
- H01L33/42—Transparent materials
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- H01L33/46—Reflective coating, e.g. dielectric Bragg reflector
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- H01L33/62—Arrangements for conducting electric current to or from the semiconductor body, e.g. lead-frames, wire-bonds or solder balls
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Abstract
The present invention provides a kind of LED chip construction and preparation method thereof, and structure includes: substrate；Epitaxial light emission structure is located on the substrate, including the first conductive type semiconductor layer, quantum well layer and the second conductive type semiconductor layer stacked gradually；Current extending is formed in the part of the surface of the epitaxial structure；Insulating layer, wraps up the side wall of the current extending, and the insulating layer has a series of patterning through-hole structures；Metal layer is formed in the surface of insulating layer, and a part of metal layer is contacted by partial through holes structure with the transparency conducting layer, and another part metal layer is contacted by partial through holes structure with the epitaxial light emission structure.
Description
Technical field
The invention belongs to field of semiconductor illumination, more particularly to a kind of LED chip construction and its production side
Method.
Background technique
Semiconductor lighting has the remarkable advantages such as service life length, energy-saving and environmental protection, safety as new and effective solid light source, will
Another leap after Shi Shangji incandescent lamp, light lamp is illuminated as the mankind, application field is expanding rapidly, and positive drive passes
The upgrading of the industries such as system illumination, display, economic benefit and social benefit are huge.Just because of this, semiconductor lighting is general
All over regarding one of 21 century new industry most with prospects and the most important commanding elevation of coming years optoelectronic areas as
One of.Light emitting diode (English abbreviation LED) be usually by such as GaN(gallium nitride), GaAs(GaAs), GaP(gallium phosphide),
GaAsP(gallium arsenide phosphide) etc. made of semiconductors, core is the PN junction with the characteristics of luminescence, and under forward voltage, electronics is by N
The area P is injected in area, and the area N is injected by the area P in hole, and minority carrier a part and majority carrier into other side region are compound and send out
Light.
Under the raised once again background of worry of Present Global energy shortage, energy saving to be that we will face in future important
Problem, in lighting area, LED is referred to as forth generation lighting source or green light source, has energy-saving and environmental protection, service life long, small in size
The features such as, it can be widely applied to the fields such as various instructions, display, decoration, backlight, general lighting and urban landscape.
A kind of existing LED chip structure is usually that reflecting layer is arranged in luminous extension lamination, such as using with height
The biggish distributed Bragg reflecting layer of refringence (DBR) or metal (such as Ag) with high reflectance are used as reflecting layer,
But DBR has centainly angularity, and heat-conducting effect is undesirable, and the reflectivity upper limit of high reflecting metal is typically about 95%, instead
The rate of penetrating is difficult to further be promoted, and is unfavorable for the extraction of LED chip exterior light, so as to cause the promotion system of chip light emitting efficiency
About.
Summary of the invention
In view of the foregoing deficiencies of prior art, it is an object of the invention to: a kind of light-emitting diode chip for backlight unit knot is provided
Structure and preparation method thereof, for solution, light-emitting diode chip for backlight unit exterior light extracts lower and luminous efficiency is caused to drop in the prior art
Low problem.
In order to achieve the above objects and other related objects, the present invention provides a kind of LED chip construction, feature
It is: includes: substrate；Epitaxial light emission structure, be located at the substrate on, including stack gradually the first conductive type semiconductor layer,
Quantum well layer and the second conductive type semiconductor layer；Current extending is formed in the part of the surface of the epitaxial light emission structure；Absolutely
Edge layer, wraps up the side wall of the current extending, and the insulating layer has a series of patterning through-hole structures；Metal layer is formed
In the surface of insulating layer, a part of metal layer is contacted by partial through holes structure with the current extending, another portion
Metal layer is divided to contact by partial through holes structure with the epitaxial light emission structure.
Preferably, further include local defect area, be located on the second conductive type semiconductor layer of part, and extend downward into
The first conductive type semiconductor layer forms mesa structure, and the mesa structure exposing has epitaxial light emission structure side wall.
Preferably, first electrode is formed in the local defect area；And second electrode, it is formed on the metal layer.
Preferably, the patterning through-hole structure of the insulating layer includes the first through hole on the current extending
Structure and the second through-hole structure on epitaxial light emission structure.
Further, the first through hole structure is array, and second through-hole structure is cyclic annular or band-like.
Preferably, the size of first, second through-hole structure is preferably between 1 ~ 20 μm between 1 ~ 50 μm.
Preferably, the ratio of number of the first through hole structure and the second through-hole structure is between 5:1 ~ 50:1, and more preferable the
The ratio of number of one through-hole structure and the second through-hole structure is between 10:1 ~ 30:1.
Preferably, first through hole feature cross-section area summation accounts for the cross-sectional area of the LED chip construction
The 3% ~ 50% of ratio, more preferable first through hole feature cross-section area summation account for the cross section of the LED chip construction
The 5% ~ 20% of area ratio.
Preferably, the insulating layer is covered in the side wall of the epitaxial light emission structure.
Preferably, the insulating layer includes the material layer of low-refraction.
Preferably, the insulating layer includes distributed Bragg reflecting layer.
Preferably, the metal layer is multilayered structure.
Preferably, the metal layer includes metallic reflector and metal barrier.
The present invention also provides a kind of production methods of LED chip construction, comprising: following processing step: (1) mentions
For a substrate, epitaxial light emission structure is formed on Yu Suoshu substrate, the epitaxial light emission structure includes the first conduction stacked gradually
Type semiconductor layer, quantum well layer and the second conductive type semiconductor layer；(2) Yu Suoshu epitaxial light emission structure forms mesa structure,
The mesa structure exposing has epitaxial light emission structure side wall；(3) part of the surface of Yu Suoshu epitaxial light emission structure forms electric current and expands
Open up layer；(4) insulating layer is formed, the side wall of the current extending is wrapped up, the insulating layer has a series of patterning through-hole knots
Structure；(5) metal layer is formed in the surface of insulating layer with patterning through-hole structure, a part of metal layer passes through part
Through-hole structure is contacted with the current extending, and another part metal layer passes through partial through holes structure and the epitaxial light emission structure
Contact.
Preferably, the step (2) includes: that local defect area is etched in the epitaxial light emission structure, forms table top
Structure.
Preferably, the patterning through-hole structure of the insulating layer of the step (4) includes: on the current extending
First through hole structure and the second through-hole structure on epitaxial light emission structure.
Further, the first through hole structure is array, and second through-hole structure is cyclic annular or band-like.
Preferably, the size of first, second through-hole structure is preferably between 1 ~ 20 μm between 1 ~ 50 μm.
Preferably, the ratio of number of the first through hole structure and the second through-hole structure is between 5:1 ~ 50:1, and more preferable the
The ratio of number of one through-hole structure and the second through-hole structure is between 10:1 ~ 30:1.
Preferably, first through hole feature cross-section area summation accounts for the cross-sectional area of the LED chip construction
The 3% ~ 50% of ratio, more preferable first through hole feature cross-section area summation account for the cross section of the LED chip construction
The 5% ~ 20% of area ratio.
Preferably, the insulating layer of the step (4) is also covered in the side wall of the epitaxial light emission structure.
Preferably, the insulating layer includes the material layer of low-refraction.
Preferably, the insulating layer includes distributed Bragg reflecting layer.
Preferably, the metal layer is multilayered structure.
Preferably, the metal layer includes metallic reflector and metal barrier.
Preferably, further include step (6): Yu Suoshu local defect area makes first electrode；And on the metal layer
Make second electrode.
As described above, LED chip construction and preparation method thereof of the invention, including it is following the utility model has the advantages that
(1) comprehensive reflecting layer (ODR) structure is formed by current extending, insulating layer (such as low-refraction), metallic reflector,
Its reflecting effect enhances light-emitting diode chip for backlight unit exterior light better than conventional metallic reflector or distributed Bragg reflecting layer structure
Probability is extracted, the brightness of LED component is improved；
(2) there is patterned first through hole structure by being formed to insulating layer, is connected to metal layer with current extending, thus
The voltage (VF) of LED component is maintained not rise；
(3) there is patterned second through-hole structure by being formed to insulating layer, so that metal layer and epitaxial light emission structure (such as P-
GaN layer) directly contact, so as to improve metal layer (such as metallic reflector) and the bad problem of insulating layer adhesiveness, enhance LED component
Reliability.
Detailed description of the invention
Fig. 1 ~ Figure 10 is shown as the structure that each step of production method of LED chip construction of the invention is presented
Schematic diagram, wherein Fig. 4 is shown as cross-sectional view of the Fig. 5 (LED core blade unit top view) along the direction A-A, and Fig. 8 is shown as the void of Fig. 7
Wire frame partial enlargement structural representation, Figure 10 are shown as LED chip construction schematic diagram of the invention.
Component label instructions:
101 substrates；1021 local defect areas；102 the first conductive type semiconductor layers；103 quantum well layers；104 the second conductive types half
Conductor layer；105 current extendings；106 insulating layers；1061 first through hole structures；1062 second through-hole structures；107 metal layers；
1071 metallic reflectors；1072 coat of metal；108 second insulating layers；The first through hole structure of 1081 second insulating layers；1082
Second through-hole structure of second insulating layer；109 first electrodes；110 second electrodes.
Specific embodiment
Illustrate embodiments of the present invention below by way of specific specific example, those skilled in the art can be by this specification
Other advantages and efficacy of the present invention can be easily understood for disclosed content.The present invention can also pass through in addition different specific realities
The mode of applying is embodied or practiced, the various details in this specification can also based on different viewpoints and application, without departing from
Various modifications or alterations are carried out under spirit of the invention.
Please refer to Fig. 1 ~ Figure 10.It should be noted that diagram provided in the present embodiment only illustrates this in a schematic way
The basic conception of invention, only shown in diagram then with related component in the present invention rather than package count when according to actual implementation
Mesh, shape and size are drawn, when actual implementation kenel, quantity and the ratio of each component can arbitrarily change for one kind, and its
Assembly layout kenel may also be increasingly complex.
As shown in Fig. 1 ~ Figure 10, the present embodiment provides a kind of production method of LED chip construction, the production
Method the following steps are included:
As shown in Figure 1, carrying out processing step (1) first, a substrate 101 is provided, forms the epitaxy junction that shines on Yu Suoshu substrate 101
Structure, the epitaxial structure include the first conductive type semiconductor layer 102, quantum well layer 103 and the second conductive type stacked gradually
Semiconductor layer 104.
The substrate 101 includes plane Sapphire Substrate, graphical sapphire substrate, silicon substrate, silicon carbide substrates, nitridation
Gallium substrate, gallium arsenide substrate etc..In the present embodiment, it is graphical sapphire substrate that the substrate, which is selected,.
As an example, can wrap using MOCVD technique in forming epitaxial structure, the epitaxial structure on the substrate 101
(not shown) containing buffer layer, the first conductive type semiconductor layer 102, quantum well layer 103 and the second conductive type semiconductor layer
104, electronic barrier layer (EBL) etc., wherein the first conductive type semiconductor layer 102 can be N-type GaN layer, the Quantum Well
Layer 103 can be GaN base quantum well layer, and the second conductive type semiconductor layer 104 can be p-type GaN layer.It is of course also possible to
The epitaxial structure of other types is selected according to actual demand, however it is not limited to example recited herein.
As shown in Fig. 2, then carrying out processing step (2), in Yu Suoshu epitaxial structure from top to bottom, several numbers are etched
The local defect area 1021 of amount, forms mesa structure, and the mesa structure exposing has the epitaxial structure side wall, specifically, institute
Stating mesa structure and appearing has 102 table top of the first conductive type semiconductor layer and the first conductive type semiconductor layer 102, quantum well layer
103 and the second conductive type semiconductor layer 104 side wall.
For example, ICP etching or RIE etching technics can be used, mesa structure is etched in Yu Suoshu epitaxial structure, so that
The mesa structure, which appears, 102 table top of the first conductive type semiconductor layer and the first conductive type semiconductor layer 102, quantum well layer
103 and the second conductive type semiconductor layer 104 side wall, the first conductive type semiconductor layer table top is in subsequent first electrode
Electrical connection.The quantity in local defect area 1021 at least one, can also be according to the structure, purposes, size etc. of LED chip
Increased, so that the quantity in local defect area is suitable with the quantity of the second through-hole structure of subsequent production.It needs especially
Illustrate, when LED structure is vertical structure, it is also not necessary to make local defect area, and first electrode is made in
The back side of the first conductive type semiconductor layer 102 or substrate 101.
As shown in figure 3, then carrying out processing step (3), electric current is formed in the part of the surface of Yu Suoshu epitaxial light emission structure
Extension layer 105.
For example, the current extending 105 can be the transparent conductive layer for using vapor deposition or sputtering process to be formed,
Other materials, such as ZnO, graphene can also be selected, and makes the P- of itself and epitaxial light emission structure of current extending by fusion
GaN layer forms Ohmic contact.The current extending of processing step (4) production further includes by yellow light, etch process etching part
Current extending drapes over one's shoulders so that being located at the current extending " inside contracting " on the light emitting epitaxial layer surface convenient for subsequent insulating layer
It is overlying on the side wall of the current extending.
As shown in Figures 4 and 5, processing step (4) then are carried out, in making insulating layer 106 on above structure, wraps up the electricity
It flows the side wall of extension layer 105 and is covered in the side wall of the adjacent epitaxial light emission structure, wherein wrapping up the current expansion
The insulating layer 106 of the side wall of layer 105 is mainly used for constituting comprehensive reflecting layer with the metal layer of current extending, subsequent production
(ODR) structure is covered in effect of the insulating layer 106 mainly as electrical isolation of the side wall of the adjacent epitaxial light emission structure；
Further, the insulating layer has a series of patterning through-hole structures.
For example, chemical vapor deposition process can be used, the part of the surface of Yu Suoshu epitaxial structure forms insulating layer 106,
The insulating layer 106 can be low-index material, such as silicon dioxide layer, magnesium fluoride, or high-index material, such as
Titanium dioxide etc. or insulating layer be also possible to include high and low refractive index material distributed Bragg reflecting layer (DBR), and not
It is limited to example recited herein.The patterning through-hole structure, it is preferred to use etching technics is formed.As insulating layer selects SiO2
Going out for light can be enhanced by the refringence of low-index material insulating layer and transparent conductive layer in low-index material
It penetrates.
As an example, the patterning through-hole structure includes: the first through hole structure on the current extending
1061 and the second through-hole structure 1062 on epitaxial light emission structure.Further, the first through hole structure is battle array
Column, second through-hole structure are ring-type or band-like, and the present embodiment is preferably closed hoop.The first, second through-hole knot
The size of structure is preferably between 1 ~ 20 μm between 1 ~ 50 μm.The ratio of number of the first through hole structure and the second through-hole structure is situated between
In 5:1 ~ 50:1, preferably the ratio of number of first through hole structure and the second through-hole structure is between 10:1 ~ 30:1.In general,
The quantity of two through-holes is suitable with the quantity in local defect area, and shape is similar.The first through hole feature cross-section area summation accounts for
The 3% ~ 50%, preferably 5% ~ 20% of the cross-sectional area ratio K of the LED chip construction (LED core blade unit), it is more excellent
10% is selected, if K value is too low, the area that metal layer is contacted with current extending by first through hole is too small, is unfavorable for control electricity
It presses (VF), and if K value is too high, it will affect current extending, insulating layer (such as low-refraction), metallic reflector and form full side
The reflecting effect of position reflecting layer (ODR) structure.
As shown in Fig. 6 ~ Fig. 8, processing step (5) then are carried out, in the insulating layer table with patterning through-hole structure
Face forms metal layer, and a part of metal layer is contacted by first through hole structure 1061 with the current extending 105, another
Partial metal layers are contacted by the second through-hole structure 1061 with the epitaxial light emission structure, so as to improve metal layer 107 and insulation
The layer bad problem of adhesiveness, enhances the reliability of LED component.
For example, can be using vapor deposition or sputtering process, in the surface of insulating layer shape with patterning through-hole structure
At metal layer 107, the metal layer may include multilayered structure, such as metallic reflector 1071, coat of metal 1072, not
It is limited to example recited herein.
As an example, when as reflecting mirror (mirror), metal is protected when metallic reflector selects Al or Ag high reflecting metal
Sheath (Barrier) selects TiW, Cr, Pt, Ti etc., and coat of metal 1071 can be fully wrapped around metallic reflector 1071, uses
In protection metallic reflector.
As shown in Figures 9 and 10, processing step (6) then are carried out, Yu Suoshu local defect area makes first electrode 109；With
And in production second electrode 110 on the metal layer.Before making first, second electrode, optionally, in step (4)
Second insulating layer 108 is formed in structure obtained.
As an example, chemical vapor deposition process can be used, second insulating layer 108, the second insulating layer 108 are formed
It can be low-index material, such as silicon dioxide layer, magnesium fluoride, or high-index material, such as titanium dioxide, or
Insulating layer is also possible to distributed Bragg reflecting layer (DBR), and is not limited to example recited herein.
The first through hole knot of second insulating layer is formed in the second insulating layer 108 using photoetching process and etching technics
Second through-hole structure 1082 of structure 1081 and second insulating layer.Wherein reservation window of the first through hole structure 1081 as first electrode
Mouthful, reserved window of second through-hole structure 1082 as second electrode.
As shown in Figure 10, first electrode 109, the first electrode are then formed in the reserved window of the first electrode
N electrode is selected, to realize that N electrode and N-type GaN layer are electrically connected；The second electricity is formed in the reserved window of the second electrode
Pole 110, the second electrode select P electrode, to realize that P electrode and metal layer, current extending, p-type GaN layer are electrically connected.
Finally, the substrate 101 is thinned and is cut to obtain independent light-emitting diode chip for backlight unit.
As shown in Figure 10, the present embodiment also provides a kind of LED chip construction, the light-emitting diode chip for backlight unit knot
Structure includes: substrate 101, epitaxial light emission structure, local defect area 1021, current extending 105, the insulating layer with through-hole structure
106, metal layer 107, second insulating layer 108, first electrode 109 and second electrode 110.
As shown in Figure 10, the substrate 101 includes plane Sapphire Substrate, graphical sapphire substrate, silicon substrate, carbonization
Silicon substrate, gallium nitride substrate, gallium arsenide substrate etc..In the present embodiment, it is graphical sapphire substrate that the substrate 101, which is selected,.
As shown in Figure 10, the epitaxial light emission structure is located on the substrate 101, including the first conductive type stacked gradually
Semiconductor layer 102, quantum well layer 103 and the second conductive type semiconductor layer 104.
For example, the first conductive type semiconductor layer 102 can be N-type GaN layer, the quantum well layer 103 can be GaN
Based quantum well layer 103, the second conductive type semiconductor layer 104 can be p-type GaN layer.It is of course also possible to according to actual demand
Select the epitaxial structure of other types, however it is not limited to example recited herein.
As shown in Figure 10, several described local defect areas 1021 are located at the part the second conductive type semiconductor layer 104
On, and extend downward into the first conductive type semiconductor layer 102 and form mesa structure, the mesa structure exposing has described outer
Prolong structure side wall, specifically, the mesa structure, which appears, 102 table top of the first conductive type semiconductor layer and the first conductive type half
The side wall of conductor layer 102, quantum well layer 103 and the second conductive type semiconductor layer 104.
As shown in Figure 10, the current extending 105 is formed in the part of the surface of the epitaxial light emission structure, and with portion
The epitaxial light emission structure surface engagement divided.
For example, the current extending 105 can select transparent conductive layer, other materials can also be selected, as ZnO,
Graphene etc..In structure, the current extending " inside contracting " being preferably placed on the light emitting epitaxial layer surface is convenient for subsequent insulation
Layer is coated in the side wall of the current extending.
As shown in Figure 10, the insulating layer 106 wraps up the side wall of the current extending 105 and is covered in the phase
The side wall of adjacent epitaxial light emission structure, wherein the insulating layer 106 for wrapping up the side wall of the current extending 105 is mainly used for and electricity
Extension layer, comprehensive reflecting layer (ODR) structure of metal layer composition are flowed, the side wall of the adjacent epitaxial light emission structure is covered in
Effect of the insulating layer 106 mainly as electrical isolation；Further, the insulating layer has a series of patterning through-hole structures.
For example, the part of the surface in the epitaxial structure forms the insulating layer 106 with patterning through-hole structure, it is described exhausted
Edge layer 106 can be low-index material, such as silicon dioxide layer, magnesium fluoride, or high-index material, such as titanium dioxide
Titanium etc. or insulating layer be also possible to include high and low refractive index material distributed Bragg reflecting layer (DBR), and be not limited to this
The example that place is enumerated.As an example, the through-hole structure that patterns includes: that first on the current extending is led to
Pore structure 1061 and the second through-hole structure 1062 on epitaxial light emission structure.Further, the first through hole knot
Structure is array, and second through-hole structure is ring-type or band-like, and the present embodiment is preferably closed hoop.Described first, second
The size of through-hole structure is preferably between 1 ~ 20 μm between 1 ~ 50 μm.The quantity of the first through hole structure and the second through-hole structure
The ratio between 5:1 ~ 50:1, preferably the ratio of number of first through hole structure and the second through-hole structure is between 10:1 ~ 30:1.It is general next
It says, the quantity of the second through-hole is suitable with the quantity in local defect area, and shape is similar.The first through hole feature cross-section area is total
With the 3% ~ 50%, preferably 5% ~ 20% of the cross-sectional area ratio K for accounting for the LED chip construction (LED core blade unit),
More preferable 10%, if K value is too low, the area that metal layer is contacted with current extending by first through hole is too small, is unfavorable for controlling
Voltage (VF) processed, and if K value is too high, it will affect current extending, insulating layer (such as low-refraction), metallic reflector and formed
The reflecting effect of comprehensive reflecting layer (ODR) structure.
As shown in Figure 10, the metal layer 107 is formed in 106 surface of insulating layer, a part of metal layer first
Through-hole structure 1061 is contacted with the current extending 105, another part metal layer by the second through-hole structure 1061 with it is described
Epitaxial light emission structure contact, so as to improve metal layer 107 and the bad problem of insulating layer adhesiveness, enhances the reliability of LED component.
For example, the metal layer 107 may include multilayered structure, such as metallic reflector 1071, coat of metal 1072,
It is not limited to example recited herein.As an example, when metallic reflector selects Al or Ag high reflecting metal, as reflecting mirror
(mirror) when, coat of metal (Barrier) selects TiW alloy etc., and coat of metal 1071 can be fully wrapped around metal
Reflecting layer 1071, for protecting metallic reflector.
As shown in Figure 10, second insulating layer 108 are formed in metal layer 107, in local defect area 1021, and absolutely in second
The first through hole structure 1081 of second insulating layer and the second through-hole structure 1082 of second insulating layer are formed in edge layer 108.Wherein
Reserved window of the first through hole structure 1081 as first electrode, reservation window of second through-hole structure 1082 as second electrode
Mouthful.First electrode 109 is formed in the reserved window of the first electrode, and the first electrode selects N electrode, to realize N electricity
Pole and N-type GaN layer are electrically connected；Second electrode 110 is formed in the reserved window of the second electrode, the second electrode choosing
With P electrode, to realize that P electrode and metal layer, current extending, p-type GaN layer are electrically connected.
As an example, the second insulating layer 108 can be low-index material, such as silicon dioxide layer, magnesium fluoride,
It can be high-index material, such as titanium dioxide or insulating layer are also possible to distributed Bragg reflecting layer (DBR), and not
It is limited to example recited herein.
It should be noted that as needed, can also make the first, second electrode and then in first, second it is electric
Third insulating layer (not shown) is formed on pole, and forms through-hole structure, as electrode window through ray, finally in electrode window through ray
Form third, the 4th electrode.
The present embodiment forms comprehensive reflecting layer (ODR) by current extending, low-refraction insulating layer, metallic reflector
Structure, reflecting effect enhance light-emitting diode chip for backlight unit better than conventional metallic reflector or distributed Bragg reflecting layer structure
Exterior light extracts probability, improves the brightness of LED component；There is patterned first through hole structure by being formed to insulating layer, make
Metal layer is connected to current extending, so that the voltage (VF) of LED component be maintained not rise；There is figure by being formed to insulating layer
Second through-hole structure of case, so that metal layer is directly contacted with epitaxial light emission structure (such as P-GaN layers), so as to improve metal layer
(such as metallic reflector) and the bad problem of insulating layer adhesiveness, enhances the reliability of LED component.
As described above, LED chip construction and preparation method thereof of the invention, has the advantages that
The present invention forms comprehensive reflecting layer (ODR) structure by current extending, low-refraction insulating layer, metallic reflector,
Its reflecting effect enhances light-emitting diode chip for backlight unit exterior light better than conventional metallic reflector or distributed Bragg reflecting layer structure
Probability is extracted, the brightness of LED component is improved；There is patterned first through hole structure by being formed to insulating layer, make metal layer
It is connected to current extending, so that the voltage (VF) of LED component be maintained not rise；By forming insulating layer with patterned
Second through-hole structure, so that metal layer is directly contacted with epitaxial light emission structure (such as P-GaN layers), so as to improve metal layer (such as gold
Belong to reflecting layer) and the bad problem of insulating layer adhesiveness, enhance the reliability of LED component.So the present invention effectively overcome it is existing
Various shortcoming in technology and have high industrial utilization value.
LED chip construction provided by the invention and preparation method thereof is suitable for production inverted structure LED component,
Also it is suitable for production vertical structure or membrane structure or high voltage structures LED component.The present invention is applicable not only to make visible
Light LED is also applied for production UV-LED etc..
The above-described embodiments merely illustrate the principles and effects of the present invention, and is not intended to limit the present invention.It is any ripe
The personage for knowing this technology all without departing from the spirit and scope of the present invention, carries out modifications and changes to above-described embodiment.Cause
This, institute is complete without departing from the spirit and technical ideas disclosed in the present invention by those of ordinary skill in the art such as
At all equivalent modifications or change, should be covered by the claims of the present invention.
Claims (24)
1. a kind of LED chip construction characterized by comprising
Substrate；
Epitaxial light emission structure, be located at the substrate on, including stack gradually the first conductive type semiconductor layer, quantum well layer and
The second conductive type semiconductor layer；
Current extending is formed in the part of the surface of the epitaxial light emission structure；
Insulating layer, wraps up the side wall of the current extending, and the insulating layer has a series of patterning through-hole structures；
Metal layer, is formed in the surface of insulating layer, and a part of metal layer is expanded by partial through holes structure and the electric current
Layer contact is opened up, another part metal layer is contacted by partial through holes structure with the epitaxial light emission structure.
2. a kind of LED chip construction according to claim 1, it is characterised in that: the patterning of the insulating layer
Through-hole structure includes the first through hole structure on the current extending and second on epitaxial light emission structure
Through-hole structure.
3. a kind of LED chip construction according to claim 2, it is characterised in that: the first through hole structure is
Array, second through-hole structure are cyclic annular or band-like.
4. a kind of LED chip construction according to claim 2, it is characterised in that: the first through hole structure with
The ratio of number of second through-hole structure is between 5:1 ~ 50:1.
5. a kind of LED chip construction according to claim 2, it is characterised in that: the first through hole structure is horizontal
Area of section summation accounts for the 3% ~ 50% of the cross-sectional area of the LED chip construction.
6. a kind of LED chip construction according to claim 1, it is characterised in that: the insulating layer is covered in institute
State the side wall of epitaxial light emission structure.
7. a kind of LED chip construction according to claim 1, it is characterised in that: the insulating layer includes low folding
Penetrate the material layer of rate.
8. a kind of LED chip construction according to claim 1, it is characterised in that: the insulating layer includes distribution
Bragg reflecting layer.
9. a kind of LED chip construction according to claim 1, it is characterised in that: the metal layer is multilayer knot
Structure.
10. a kind of LED chip construction according to claim 1, it is characterised in that: the metal layer includes gold
Belong to reflecting layer and metal barrier.
11. a kind of LED chip construction according to claim 1, it is characterised in that: further include: local defect
Area is located on the second conductive type semiconductor layer of part, and extends downward into the first conductive type semiconductor layer and form platform
Face structure, the mesa structure exposing have epitaxial light emission structure side wall.
12. a kind of LED chip construction according to claim 11, it is characterised in that: the first electrode, shape
Local defect area described in Cheng Yu；The second electrode is formed on the metal layer.
13. a kind of production method of LED chip construction, which is characterized in that including processing step:
(1) substrate is provided, forms epitaxial light emission structure on Yu Suoshu substrate, the epitaxial light emission structure includes stacking gradually
The first conductive type semiconductor layer, quantum well layer and the second conductive type semiconductor layer；
(2) Yu Suoshu epitaxial light emission structure forms mesa structure, and the mesa structure exposing has epitaxial light emission structure side wall；
(3) part of the surface of Yu Suoshu epitaxial light emission structure forms current extending；
(4) insulating layer is formed, the side wall of the current extending is wrapped up, the insulating layer has a series of patterning through-hole knots
Structure；
(5) metal layer is formed in the surface of insulating layer with patterning through-hole structure, a part of metal layer passes through portion
Through-hole structure is divided to contact with the current extending, another part metal layer passes through partial through holes structure and the luminous epitaxy junction
Structure contact.
14. a kind of production method of LED chip construction according to claim 13, it is characterised in that: the step
Suddenly the patterning through-hole structure of the insulating layer of (4) includes: first through hole structure on the current extending and is located at
The second through-hole structure on epitaxial light emission structure.
15. a kind of production method of LED chip construction according to claim 14, it is characterised in that: described
One through-hole structure is array, and second through-hole structure is cyclic annular or band-like.
16. a kind of production method of LED chip construction according to claim 14, it is characterised in that: described
The ratio of number of one through-hole structure and the second through-hole structure is between 5:1 ~ 50:1.
17. a kind of production method of LED chip construction according to claim 14, it is characterised in that: described
One through-hole structure cross-sectional area summation accounts for the 3% ~ 50% of the cross-sectional area of the LED chip construction.
18. a kind of production method of LED chip construction according to claim 13, it is characterised in that: the step
Suddenly the insulating layer of (4) is also covered in the side wall of the epitaxial light emission structure.
19. a kind of production method of LED chip construction according to claim 13, it is characterised in that: described exhausted
Edge layer includes the material layer of low-refraction.
20. a kind of production method of LED chip construction according to claim 13, it is characterised in that: described exhausted
Edge layer includes distributed Bragg reflecting layer.
21. a kind of production method of LED chip construction according to claim 13, it is characterised in that: the gold
Category layer is multilayered structure.
22. a kind of production method of LED chip construction according to claim 13, it is characterised in that: the gold
Belonging to layer includes metallic reflector and metal barrier.
23. a kind of production method of LED chip construction according to claim 13, it is characterised in that: the step
Suddenly (2) include: that local defect area is etched in the epitaxial light emission structure, form mesa structure.
24. a kind of production method of LED chip construction according to claim 23, it is characterised in that: further include
Step (6): Yu Suoshu local defect area makes first electrode；And in making second electrode on the metal layer.
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| CN113555484A (en) * | 2021-07-06 | 2021-10-26 | 华南师范大学 | High-light-efficiency flip LED chip with high light extraction rate and preparation method thereof |
| CN113555484B (en) * | 2021-07-06 | 2023-01-06 | 华南师范大学 | High-luminous-efficiency flip LED chip and preparation method thereof |
| CN113644180A (en) * | 2021-08-05 | 2021-11-12 | 厦门士兰明镓化合物半导体有限公司 | Flip LED chip and preparation method thereof |
| CN113644180B (en) * | 2021-08-05 | 2023-01-06 | 厦门士兰明镓化合物半导体有限公司 | Flip LED chip and preparation method thereof |
| CN113921676A (en) * | 2021-09-14 | 2022-01-11 | 厦门三安光电有限公司 | Light emitting diode and light emitting module |
| CN114141925A (en) * | 2021-12-01 | 2022-03-04 | 厦门三安光电有限公司 | Light emitting diode |
| CN114141925B (en) * | 2021-12-01 | 2023-06-09 | 厦门三安光电有限公司 | Light emitting diode |
| CN114899290A (en) * | 2022-06-07 | 2022-08-12 | 淮安澳洋顺昌光电技术有限公司 | Light emitting diode chip and light emitting diode package |
Also Published As
| Publication number | Publication date |
|---|---|
| CN114695609B (en) | 2024-06-14 |
| WO2019195960A1 (en) | 2019-10-17 |
| CN110088922B (en) | 2022-04-15 |
| CN114695609A (en) | 2022-07-01 |
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Effective date of registration: 20231026 Address after: Yuanqian village, Shijing Town, Nan'an City, Quanzhou City, Fujian Province Patentee after: QUANZHOU SAN'AN SEMICONDUCTOR TECHNOLOGY Co.,Ltd. Address before: 361009 no.1721-1725, Luling Road, Siming District, Xiamen City, Fujian Province Patentee before: XIAMEN SANAN OPTOELECTRONICS TECHNOLOGY Co.,Ltd. |