JP2012019153A - Semiconductor light-emitting device and semiconductor package having the same - Google Patents

Abstract

PROBLEM TO BE SOLVED: To provide a semiconductor light-emitting device capable of uniforming the density of injection current into an active layer and capable of improving light extraction efficiency, and to provide a semiconductor package having the semiconductor light-emitting device.SOLUTION: A semiconductor light-emitting device 1 comprises: a sapphire substrate 11; an n-type semiconductor layer 12 provided under the sapphire substrate 11; an active layer 13 that is provided under the n-type semiconductor layer 12 and emits light; a p-type semiconductor layer 14 provided under the active layer 13; a transparent conductive film 15 that is provided under the p-type semiconductor layer 14 and transmits the light; an interlayer insulating film 16 that is provided under the transparent conductive film 15 and includes a plurality of first openings 16a of an island-shaped; a reflection film 17 that is provided under the interlayer insulating film 16, includes a plurality of second openings 17a of an island-shaped overlapping the first openings 16a, and reflects the light; and a connection electrode 18 that is provided under the reflection film 17 and is connected to the transparent conductive film 15 by a portion of the electrode entering the first openings 16a and the second openings 17a.

Description

  The present invention relates to a semiconductor light emitting device which is made of a gallium nitride compound used for an optical device such as a blue light emitting diode, and is mounted by, for example, flip chip bonding, and a semiconductor including such a semiconductor light emitting device. Regarding packages.

In recent years, the progress of semiconductor light emitting devices has been remarkable, and in particular, LEDs (Light Emitting Diodes) have features such as small size, low power consumption, and high reliability, and are widely used as display light sources. One of the LED materials in practical use is a III-V compound semiconductor. Among these III-V group compound semiconductors, gallium nitride compound semiconductors (Al _x Ga _y In _1-xy N (0 ≦ x ≦ 1, 0 ≦ y ≦ 1, 0 ≦ x + y ≦ 1) are from the ultraviolet region. It is a direct transition type semiconductor that covers the orange gamut, and is currently used mainly as a material for blue and green LEDs, which are widely used for outdoor displays and traffic lights. It has been.

  In addition, LEDs have a great potential to be used as excitation light sources for phosphors used in fluorescent lamps by further increasing efficiency, including in the ultraviolet region, and are environmentally friendly to mercury (Hg). Together with the expectations, development is being pursued energetically.

  Recently, the flip-chip connection of LEDs has attracted attention especially as the output of semiconductor light-emitting elements has increased. At present, in the WB (wire bond) structure having the highest market penetration rate, as shown in FIG. 19, a sapphire substrate 1002 with a semiconductor layer group 1003 is mounted on a mounting substrate 1001, and the sapphire substrate 1002 is a semiconductor. It is located between the layer group 1003 and the mounting substrate 1001. In this case, the p-type electrode 1004 exists in the middle of the path in which the light emitted from the active layer in the semiconductor layer group 1003 travels upward. That is, the light is blocked by the p-type electrode 1004. For this reason, ITO (indium tin oxide) having high transparency is frequently used as the material of the p-type electrode 1004. This ITO is often a thin film of about 140 nm in order to reduce light absorption, but the sheet resistance of ITO increases due to the relationship between the film thickness and trade-off. For this reason, in the current WB-mounted LED chip, there is a variation in the density of the current flowing in the active layer. In particular, under a condition where the injection current is large, the ratio of the voltage drop in ITO to the total voltage drop increases, so that the variation in the density of the current flowing in the active layer is further increased. In other words, the density of the current injected into the active layer becomes significantly non-uniform.

  The non-uniformity of the injection current density is regarded as a problem as a factor that lowers the internal quantum efficiency, which means the rate at which injected carriers are converted into light. For example, in a region where high current is injected, crystal defects are thermally activated by locally increasing the temperature, and injected carriers are consumed as heat by these defects, resulting in a decrease in internal quantum efficiency. In the region where the injection current density is high, light with higher energy is emitted than in the region where the injection current is low due to the band filling effect. As a result, the light is absorbed in the low current injection region, thereby reducing the internal quantum efficiency. Such a decrease in internal quantum efficiency appears as an increase in applied voltage (Vf) or a decrease in light emission.

  On the other hand, in the FC (flip chip) structure shown in FIG. 20, the sapphire substrate with the semiconductor layer group 2003 on the mounting substrate 2001 so that the semiconductor layer group 2003 is positioned between the mounting substrate 2001 and the sapphire substrate 2002. 2002 is implemented. Thereby, the p-type electrode 2004 is located under the sapphire substrate 2002, and light from the active layer included in the semiconductor layer group 2003 is not blocked by the p-type electrode 2004. Therefore, since the p-type electrode 2004 does not need to be transparent, it is possible to select the material of the p-type electrode 2004 with priority on electric conductivity. Here, if a highly conductive material is used as the material of the p-type electrode 2004, it is possible to inject current uniformly into the active layer. For this reason, the LED FC junction is positioned as a technology capable of realizing high internal quantum efficiency.

  In the FC structure, it is necessary to make the p-type electrode 2004 used as a conductive film highly reflective in order to efficiently extract light from the active layer to the outside. This is because the refractive index of the sapphire substrate 1002 is closer to the refractive index of the sealing resin than the refractive index of the semiconductor layer 1003, and thus light from the active layer is more easily extracted from the sapphire substrate 1002 side. is there.

  From the above, it is important to make the injection current density into the active layer uniform and to increase the reflection of the p-type electrode 2004 used as the conductive film in order to improve the light emission efficiency of the FC structure.

  By the way, various methods have already been proposed for improving the light extraction efficiency of the FC structure. Among them, a great effect is expected by forming a p-type electrode with a metal having high reflectivity such as Ag (silver), Al (aluminum), Rh (rhodium) or Pd (palladium). There is a method for improving the light extraction efficiency. However, although Ag, Al, Pd, and Rh are materials having high reflectivity from the ultraviolet region to the visible region, direct formation on the semiconductor layer is not desirable from the viewpoint of adhesion to the semiconductor layer and ohmic properties. .

  Patent Document 1 (Japanese Patent Application Laid-Open No. 2007-103690) discloses that an electrode is formed from Ag on a p-type semiconductor layer via an ITO film, thereby providing good adhesion of the electrode to the p-type semiconductor layer, A structure intended to be compatible with the high reflectivity of the electrode is shown. However, this structure has a problem that Ag constituting the electrode migrates into the ITO film and combines with oxygen in the ITO film to form AgO (silver oxide), resulting in a decrease in the reflectivity of the electrode. Arise. In addition, there is a problem that the adhesion of the electrode to the p-type semiconductor layer is reduced at a location where AgO is interposed between the electrode made of Ag and the ITO film.

On the other hand, Patent Document 2 (Japanese Patent Laid-Open No. 2006-108161) discloses a structure for suppressing oxidation of Ag. This structure is formed on the p-type semiconductor layer, the ITO film formed on the p-type semiconductor layer, the SiO ₂ (silicon oxide) film formed on the ITO film, and the SiO ₂ film. An Ag reflective film and a p-type electrode formed on the reflective film are provided. In this case, since both the ITO film and the SiO ₂ film are translucent materials, light from the active layer reaches the reflection film without being absorbed in the middle, and is reflected by the reflection film. It is possible to obtain. However, in this case, although the sheet resistance of the ITO film is high, the ITO film is insulated from the reflective film by the SiO ₂ film, and no attempt is made to reduce the sheet resistance of the p-type electrode. Therefore, the above structure has a problem that current cannot be uniformly injected into the active layer.

  In Patent Document 3 (Japanese Patent Application Laid-Open No. 2007-318157), a thin film is formed between the p-type semiconductor layer and the Ag film in order to achieve both uniformity of the current density in the chip surface and high light extraction efficiency. A Ni film is formed. However, even when the Ni film is formed, it is shown that the light reflectance is reduced to 80% or less due to light absorption by the Ni film even under the condition that the thickness of the Ni film is suppressed to about 2 nm. In practice, it is difficult to say that a high reflectance is obtained. Moreover, it cannot be said that high light extraction efficiency is obtained.

  As another method, Patent Document 4 (Japanese Patent Laid-Open No. 2005-129907) describes a structure in which a contact material such as Pd or ITO is sandwiched between a p-type semiconductor layer and an Ag film. It is shown. More specifically, in the above structure, as shown in FIG. 21, a contact metal structure 3002 is formed in a dot shape with Pd, ITO, or the like on a p-type semiconductor layer 3001, and the contact metal structure 3002 is further formed as a reflective layer. Covered with 3003. In this structure, since the resistance of the p-type semiconductor layer 3001 is very high, the dot pattern of the contact metal structure 3002 is formed with a high area ratio in order to spread the current uniformly in the in-plane direction in the p-type semiconductor layer 3001. Must. As a result, the light absorption by the contact metal structure 3002 causes a problem that the light extraction efficiency is lowered. In addition, the above structure has a problem that reliability is not excellent because the adhesion between the p-type semiconductor layer 3001 and the reflective layer 3003 is poor.

  As described above, it is the actual situation that no structure has been shown so far that makes it possible to obtain a uniform density of injection current into the active layer and a high light extraction efficiency.

Japanese Patent Laying-Open No. 2007-103690 (FIG. 8) JP 2006-108161 A (FIG. 1) JP 2007-318157 A (FIGS. 1 and 2) Japanese Patent Laying-Open No. 2005-129907 (FIG. 3A)

  SUMMARY OF THE INVENTION An object of the present invention is to provide a semiconductor light emitting device and a semiconductor package including the semiconductor light emitting device that can make the density of the injection current into the active layer uniform and improve the light extraction efficiency.

In order to solve the above problems, a semiconductor light-emitting device of the present invention includes:
A growth substrate;
A first conductivity type semiconductor layer provided on the growth substrate;
An active layer provided on the first conductive semiconductor layer and emitting light;
A second conductivity type semiconductor layer provided on the active layer;
A transparent conductive film provided on the second conductive semiconductor layer and transmitting the light;
An interlayer insulating film provided on the transparent conductive film, having a plurality of island-like first openings and transmitting the light;
A reflective film that is provided on the interlayer insulating film and has a plurality of island-like second openings, at least a portion of which overlaps the first opening, and reflects the light;
And a connection electrode that is provided on the reflective film and partially enters the first opening and the second opening and is connected to the transparent conductive film.

  Here, the first conductivity type means p-type or n-type. The second conductivity type means n-type when the first conductivity type is p-type, and p-type when the first conductivity type is n-type.

  The interlayer insulating film is an insulating film having electrical insulating properties and translucency, or a translucent barrier film made of a material that forms a barrier against carriers injected into the connection electrode. . In addition, the said translucency means the property which permeate | transmits the light which the active layer emitted.

  According to the above configuration, by forming the transparent conductive film, the interlayer insulating film, the reflective film, and the connection electrode, it is possible to achieve uniform injection current density into the active layer and improve light extraction efficiency.

  First, the uniformization of the density of current injected into the active layer will be described.

  In the transparent conductive film, the injected current can be sufficiently expanded, so that the density of the injected current into the active layer can be made uniform.

  Further, in the current path between the connection electrode and the second conductivity type semiconductor layer, the path in which the current flows through the transparent conductive film along the plane direction (direction perpendicular to the film thickness direction) has the highest resistivity. . Accordingly, it is important to make the current density uniform by reducing the voltage drop in the path through which the current flows in the plane direction through the transparent conductive film.

  In the configuration of the present invention, since the current injected into each first opening of the interlayer insulating film is small, even if the thickness of the interlayer insulating film is as thin as 10 nm and the sheet resistance of the interlayer insulating film is high, the current is transparent The voltage drop in the path flowing along the surface direction of the film is small. Therefore, the current injected into the active layer can be sufficiently uniformed.

  Moreover, in the structure of this invention, since the interlayer insulation film is pinched | interposed between the transparent conductive film and the reflective film, the reflectance fall and adhesiveness fall of a reflective film with time can be prevented.

  As described in Patent Document 2, it is known that the reflective film deteriorates on the contact surface between the transparent conductive film and the reflective film. Ag, Al, Pd, Rh, or an alloy thereof used as a material for the reflective film has a relatively high reactivity. In particular, Ag has a high reflectivity, but has a high migration property and is therefore easily diffused to the surroundings. It is known that Ag is a factor that causes a decrease in reflectivity due to electrical leakage or uneven surface of the reflective film. In particular, in an environment where a high current is injected like an electrode of an LED chip, such a problem is more likely to be accelerated and occur. However, this is a problem that occurs only when there is a path that diffuses around.

  On the other hand, in the configuration of the present invention, since the interlayer insulating film and the connection electrode are provided around the reflective film, even if the reflective film contains, for example, Ag, the Ag is prevented from diffusing to the surroundings. Can do. Accordingly, it is possible to prevent an electrical leak around the reflection film and a decrease in reflectivity due to uneven surface of the reflection film.

  In addition, the reflective film is naturally easy to oxidize in the vicinity of air or moisture, but in the configuration of the present invention, since the connection electrode is provided on the reflective film, the reflective film can be prevented from being oxidized. As a result, it is possible to prevent a decrease in reflectance due to oxidation of the reflective film.

  Next, the improvement of the light extraction efficiency will be described.

  The light emitted from the active layer and traveling in the direction opposite to the growth substrate mainly passes through the transparent conductive film, and is the interface between the interlayer insulating film and the reflective film or the interface between the transparent conductive film and the connection electrode. Reflected by. Regarding the former reflection, the interlayer insulating film located in the path until the light reaches the reflective film is transparent to the light emitted from the active layer. As a result, the light is hardly absorbed until it reaches the reflection film, so that the amount of light reflected by the interface between the interlayer insulating film and the reflection film is large, and the reflectance of the light at the interface is high. On the other hand, the latter reflection can be made so small that the area of the interface between the transparent conductive film and the connection electrode can be ignored relative to the area of the interface between the interlayer insulating film and the reflection film.

  Therefore, even if the light reflectivity at the interface between the transparent conductive film and the connection electrode is low, the effective reflectivity at the reflection film and the connection electrode is determined by the reflectivity of the reflection film, so that it can be increased.

In the semiconductor light emitting device of one embodiment,
The first opening and the second opening have the same shape or substantially the same shape,
All of the second opening overlaps the first opening.

  According to the embodiment, the first opening and the second opening have the same shape or substantially the same shape, and the entire second opening overlaps the first opening, so that the reflective film contacts the transparent conductive film. As a result, reliability can be improved.

  The first opening and the second opening have the same shape or substantially the same shape, and the entire second opening is overlapped with the first opening, so that the reflective film is formed in the interlayer insulating film. Since it does not become too narrow with respect to the formation region, it is possible to prevent the connection electrode from protruding onto the interlayer insulating film and reducing the reflectance of light from the active layer.

  In addition, the first opening and the second opening have the same shape or substantially the same shape, and the entire second opening is overlapped with the first opening. It can be simplified. The process of forming the connection electrode will be described in more detail. An interlayer insulating film and a reflective film are laminated in this order on the entire surface of the transparent conductive film, and a resist pattern is formed on the reflective film using a single photomask. After the formation, the interlayer insulating film and the reflective film are patterned with the same or different etchants, whereby an interlayer insulating film having a plurality of first openings and a reflective film having a plurality of second openings can be formed.

For example, when the interlayer insulating film is SiO ₂ and the reflective film is Ag, after patterning the resist, the Ag is etched with nitric acid, and the SiO ₂ is etched with buffered hydrofluoric acid. Can be patterned.

In the semiconductor light emitting device of one embodiment,
The interval between the first openings is the same or substantially the same in one direction, and the interval between the second openings is the same or substantially the same in one direction.

  According to the above embodiment, the interval between the first openings is the same or substantially the same in one direction, and the interval between the second openings is the same or substantially the same in one direction. The electric current can be spread more uniformly in the surface direction.

  If the distance between the first openings in the interlayer insulating film is mixed with a portion close to the first opening, a large amount of current flows under a portion closer to the far portion.

In the semiconductor light emitting device of one embodiment,
The connection electrode is a film made of Ni, W, Ta, Ti, Pd or Pt, a laminated film in which the films are laminated, or an alloy containing at least one of Ni, W, Ta, Ti, Pd and Pt. It is a membrane.

  According to the embodiment, by using at least one of Ni, W, Ta, Ti, Pd, and Pt as the material of the connection electrode, the time-lapse due to diffusion of constituent elements of the reflective film to the surroundings. The effect which prevents the reflectance fall and adhesiveness fall of a simple reflecting film can be heightened.

  Further, the material characteristics of the connection electrode are that it is difficult to form an alloy with Ag, Al, Pd, Rh or the like that can be used as the material of the reflective film, and that the connection electrode does not oxidize. Furthermore, since it is necessary to electrically connect the reflective film to the transparent conductive film, the electrical conductivity of the connection electrode is required. From these viewpoints, the connection electrode is a film made of Ni, W, Ta, Ti, Pd or Pt, a laminated film in which the films are laminated, or at least of Ni, W, Ta, Ti, Pd and Pt. An alloy film including one is desirable.

In the semiconductor light emitting device of one embodiment,
The reflective film is a film made of Ag, Al, Rh, or Pd, or an alloy film containing at least one of Ag, Al, Rh, and Pd, and has a thickness of 1000 nm or more.

  According to the embodiment, by using at least one of Ag, Al, Rh, and Pd as the material of the reflective film, the light emitted from the active layer can be efficiently extracted to the outside.

  Also, few metals have a high reflectivity of 90% or more with respect to light having a short wavelength of about 460 nm, but Ag has a reflectivity of 98% and Al has a reflectivity of 92%. Yes. Therefore, if the reflective film contains at least one of Ag and Al, it can be a highly reflective film for light having a short wavelength of about 460 nm.

  The film thickness required for the reflective film is calculated using factors including the dielectric constant. If the film thickness is 100 nm or more, the reflective film can be easily made a high reflective film.

In the semiconductor light emitting device of one embodiment,
The interlayer insulating film is a silicon nitride film or a silicon oxide film and has a thickness of less than 115 nm.

According to the embodiment, by using a SiN (silicon nitride) film or a SiO ₂ film as the interlayer insulating film, it is possible to prevent the reflection film from being oxidized and suppress a decrease in reflectance of the reflection film.

Further, when the wavelength of light emitted from the active layer is about 460 nm, both SiN and SiO ₂ are transparent to the light, so that absorption of the light by SiN and SiO ₂ can be prevented. Here, although SiO ₂ possesses oxygen in the molecule, since the bonding force between Si (silicon) and O (oxygen) is large, it is rare that O is associated with the reflective film. That is, even if a SiO ₂ film is used as the interlayer insulating film, the reflection film rarely oxidizes. Therefore, long-term reliability of the reflective film can be ensured.

In the semiconductor light emitting device of one embodiment,
The transparent conductive film is made of ITO (indium tin oxide) or ZnO (zinc oxide) and has a thickness of 60 nm or less.

  According to the embodiment, the transparent conductive film is made of ITO or ZnO and has a thickness of 60 nm or less. Therefore, the transparent conductive film absorbs light emitted from the active layer to the extent that the light extraction efficiency is not affected. Can be suppressed.

  The transparent conductive film is required to have a high light transmittance, and in order to suppress the transparent conductive film from absorbing light from the active layer, it is desirable to use ITO or ZnO as a material of the transparent conductive film, The film thickness of the transparent conductive film is desirably 60 nm or less. For example, when ITO is used as the material of the transparent conductive film, the light from the active layer is normally absorbed at a rate of 1% every 60 nm, although it depends on the concentration of Sn doped in the ITO. Therefore, when the thickness of the transparent conductive film is 60 nm, the light that exits the active layer and is once reflected by the reflective film passes through the 60 nm transparent conductive film and leaves the reflective film as it approaches the reflective film. Sometimes it passes through the 60 nm transparent conductive film, so that it receives the same light absorption as when it passes through the 120 nm transparent conductive film. As a result, approximately 2% of the light is lost. In this case, even if the transparent conductive film is reciprocated several times before the light exits to the outside, the influence on the decrease in light extraction efficiency is small.

The semiconductor package of the present invention is
A mounting board;
The semiconductor light emitting device according to any one of claims 1 to 3, wherein the semiconductor light emitting device is flip-chip mounted on the mounting substrate via a bump.
The semiconductor light emitting device is sealed and a resin containing a phosphor is provided.

  According to the above configuration, since the semiconductor light emitting device of the present invention is flip-chip mounted on the mounting substrate via bumps such as solder bumps or gold bumps, a semiconductor package with high luminous efficiency can be obtained.

In one embodiment of a semiconductor package,
The bump is a solder bump or a gold bump.

According to the embodiment, since the bump is a solder bump or a gold bump, the thermal conductivity is high. Therefore, the heat of the semiconductor light emitting device can be efficiently released through the bumps. That is, the semiconductor package is excellent from the viewpoint of heat dissipation.

  According to the semiconductor light emitting device of the present invention, the transparent conductive film that is provided on the second conductive type semiconductor layer and transmits light from the active layer, and the island-shaped first opening is provided on the transparent conductive film. A plurality of interlayer insulating films, and a reflective film that is provided on the interlayer insulating film and has a plurality of island-like second openings at least partially overlapping the first openings, and reflects light from the active layer; The first and second openings are formed at a lower density by providing a connection electrode provided on the reflective film and partially connected to the transparent conductive film through the first opening and the second opening. However, since the current can be diffused by the transparent conductive film, the density of the current injected into the active layer can be made uniform, and the light from the active layer can be reflected by the reflective film, so that the light extraction efficiency can be increased.

FIG. 1 is a schematic cross-sectional view of a semiconductor light emitting device according to a first embodiment of the present invention. FIG. 2 is a schematic sectional view taken along line F2-F2 in FIG. FIG. 3 is a schematic cross-sectional view of a modification of the semiconductor light emitting device of the first embodiment. FIG. 4 is a schematic cross-sectional view of a modification of the semiconductor light emitting device of the first embodiment. FIG. 5 is an enlarged view of a main part of FIG. FIG. 6 is a graph showing the relationship between the effective reflectance of the p-type electrode and the light extraction efficiency. FIG. 7 is a graph showing the relationship between the opening size of the interlayer insulating film and the reflective film and the distance between the openings. FIG. 8 is a schematic cross-sectional view of the semiconductor package of the first embodiment of the present invention. FIG. 9 is a schematic cross-sectional view of the semiconductor package of the first embodiment of the present invention. FIG. 10 is a process diagram of a method for manufacturing a semiconductor light emitting device according to the second embodiment of the present invention. FIG. 11 is a process diagram of the method for manufacturing the semiconductor light emitting device subsequent to FIG. FIG. 12 is a process diagram of the method for manufacturing the semiconductor light emitting device subsequent to FIG. 11. FIG. 13 is a schematic plan view of the sapphire substrate of FIG. FIG. 14 is a process diagram of the method for manufacturing the semiconductor light emitting device subsequent to FIG. FIG. 15 is a process diagram of the method for manufacturing the semiconductor light emitting device subsequent to FIG. FIG. 16 is a process diagram of the manufacturing method of the semiconductor light emitting device following FIG. FIG. 17 is a schematic cross-sectional view of a semiconductor light emitting device according to the second embodiment of the present invention. FIG. 18 is a schematic plan view of a sapphire substrate in one step of the method for manufacturing a semiconductor light emitting device according to the third embodiment of the present invention. FIG. 19 is a schematic sectional view of a conventional semiconductor light emitting device. FIG. 20 is a schematic sectional view of another conventional semiconductor light emitting device. FIG. 21 is a schematic sectional view of another conventional semiconductor light emitting device.

  Hereinafter, the semiconductor light emitting device of the present invention will be described in detail with reference to the illustrated embodiments.

[First Embodiment]
FIG. 1 is a schematic sectional view of a semiconductor light emitting device 1 according to the first embodiment of the present invention. FIG. 2 is a schematic sectional view taken along line F2-F2 in FIG. In the following description, “upper” corresponds to “lower” in FIG. 1, and “lower” corresponds to “upper” in FIG.

  As shown in FIG. 1, the semiconductor light emitting device (LED chip) 1 includes a sapphire substrate 11, a semiconductor layer group 30, an n-type electrode 40, and a p-type electrode 80. Here, the size of the sapphire substrate 11 is 500 μm × 250 μm, but is not limited to that size, and may be, for example, a size of 1 mm □ generally called a large size. The sapphire substrate 11 is an example of the growth substrate of the present invention.

  The semiconductor layer group 30 is a structure composed of a plurality of semiconductor layers grown on the sapphire substrate 11 using GaN as a base material. The plurality of semiconductor layers are an n-type semiconductor layer 12, an active layer 13, and a p-type semiconductor layer 14 from the sapphire substrate 11 side. The active layer 13 emits light having a wavelength of 460 nm. The n-type semiconductor layer 12 is an example of the first conductivity type semiconductor layer of the present invention, the active layer 13 is an example of the active layer of the present invention, and the p-type semiconductor layer 14 is the second conductivity type of the present invention. It is an example of a semiconductor layer.

  The n-type electrode 40 is formed by sequentially stacking Ti, Ni, and Au on the n-type semiconductor layer 12. That is, the n-type electrode 40 is composed of a Ti layer, a Ni layer, and an Au layer.

  The p-type electrode 80 includes a transparent conductive film 15 provided on substantially the entire top surface of the p-type semiconductor layer 14, an interlayer insulating film 16 provided in a partial region on the transparent conductive film 15, and the interlayer The reflective film 17 is provided on the insulating film 16, and the connection electrode 18 is provided on the reflective film 17 and on the transparent conductive film 15.

  As the material of the transparent conductive film 15, ITO is used in order to achieve both translucency and electrical conductivity. Besides this ITO, for example, ZnO can also be used as the material of the transparent conductive film 15.

The interlayer insulating film 16 is provided on the transparent conductive film 15, and has a plurality of island-shaped first openings 16a. As a material of the interlayer insulating film 16, SiO ₂ is used from the viewpoint of translucency and barrier properties, but SiN or the like may be used. Originally, the term “insulating film” refers to a film having electrical insulating properties, but the interlayer insulating film of the present invention is a film having translucency and barrier properties even if it does not have electrical insulating properties. Any film can be used.

  The reflective film 17 is provided on the interlayer insulating film 16 and has a plurality of island-shaped second openings 17a. The shape of the second opening 17 a is the same as that of the first opening 16 a, and the second opening 17 a entirely overlaps the first opening 16 a of the interlayer insulating film 16. Further, the reflective film 17 has the same shape as the interlayer insulating film 16, and the entire reflective film 17 overlaps the interlayer insulating film 16. The reflective film 17 plays a role of efficiently reflecting the light emitted from the active layer 13. The material of the reflection film 17 is Ag having a high reflectance of about 98% with respect to the wavelength of light (about 460 nm). Further, the material of the reflection film 17 includes Al, Pd, and Rh. That is, the reflective film 17 may be a single layer film made of Ag, Al, Rh, or Pd, or an alloy film containing at least one of Ag, Al, Rh, or Pd. The reflective film 17 may be formed so that a part of the second opening 17 a overlaps the first opening 16 a of the interlayer insulating film 16. The shape of the second opening 17a may be substantially the same as the shape of the first opening 16a. The film thickness of the reflective film 17 may be 100 nm or more.

  The connection electrode 18 is provided on the reflective film 17 so as to be electrically connected to the surface of the transparent conductive film 15 exposed in an island shape. Thereby, a part of the connection electrode 18 enters the first opening 16 a of the interlayer insulating film 16 and the second opening 17 a of the reflective film 17.

  The above is the basic configuration of the p-type electrode 80, and the specific design of each element of the p-type electrode 80 will be described below.

  The transparent conductive film 15 is required to have a high light transmittance, and is desirably about 60 nm or less in order to suppress absorption of light emitted from the active layer 13. Although depending on the concentration of Sn doped in ITO, light is normally absorbed at a rate of 1% for every 60 nm. Therefore, when the transparent conductive film 15 has a thickness of 60 nm, the light that exits the active layer 13 and is once reflected by the reflective film 17 passes through the 60 nm transparent conductive film 15 as it approaches the reflective film 17. When passing away from the reflective film 17, the transparent conductive film 15 passes through the 60 nm transparent conductive film 15, so that approximately 2% of light is lost by the transparent conductive film 15. In this case, even if the light emitted from the active layer 13 is reflected by the reflective film 17 a plurality of times before exiting the semiconductor light emitting device 1, the light extraction efficiency is not greatly reduced.

  Next, regarding the design of the interlayer insulating film 16, the thickness is one of important factors. The distance from the interface between the transparent conductive film 15 and the interlayer insulating film 16 to the interface between the interlayer insulating film 16 and the reflective film 17, that is, the thickness of the interlayer insulating film 16 is 1 at an emission wavelength of 460 nm of the active layer 13. If the thickness is / 4 or more, multiple reflection of light tends to occur. In order to suppress the attenuation of light due to this, it is desirable that the thickness of the interlayer insulating film 16 is less than 115 nm, which is 1/4 of the emission wavelength 460 nm of the active layer 13. In the first embodiment, in consideration of the above, the thickness of the interlayer insulating film 16 is set to 100 nm.

  In addition, the cross-sectional shape of the island-shaped first opening 16a provided in the interlayer insulating film 16 is preferably a line-symmetric shape. For example, a regular triangle, a square, a regular hexagon, a circle, or the like is in view of performance. Although it is desirable, it is not particularly limited thereto. In the first embodiment, the first opening 16a has a square cross-sectional shape.

  As shown in FIG. 2, the first opening 16a is arranged such that a virtual line connecting four adjacent first openings 16a draws a square. There is no particular limitation on this arrangement. However, it is desirable to increase the symmetry of a figure drawn by a virtual line connecting a plurality of adjacent first openings 16 a from the viewpoint of equalizing the injection current into the active layer 13. For example, the arrangement of the first openings 16a may be such that the imaginary line connecting the three adjacent first openings 16a draws an equilateral triangle, as shown in FIG. 3, or the six adjacent ones as shown in FIG. It is also effective to improve the performance of the semiconductor light emitting device 1 so that the imaginary line connecting the first openings 16a draws a regular hexagon. However, even arrangements other than those described above can be used because there is no extreme variation in the density of the injected current into the active layer 13.

  The distance between the first openings 16 a is an important factor for injecting current uniformly into the active layer 13, and determines the amount of current spreading in the transparent conductive film 15. The distance between the first openings 16a is the same in the left-right direction in FIG. 2 and is the same in the up-down direction in FIG. That is, the first openings 16a are arranged at regular intervals in the left-right direction in FIG. 2 and are arranged at regular intervals in the vertical direction in FIG. Further, the distance between the first openings 16a in the left-right direction in FIG. 2 is the same as the distance between the first openings 16a in the up-down direction in FIG. The distance between the first openings 16a coincides with the distance between the second openings 17a. Note that the distances between the first openings 16a in the left-right direction in FIG. 2 may be substantially the same. Also, the distance between the first openings 16a in the vertical direction in FIG. 2 may be substantially the same.

  FIG. 5 shows an enlarged portion near the transparent conductive film 15 of FIG.

  In the current path B in FIG. 5, a current flows from the interface between the connection electrode 18 and the transparent conductive film 15 in each first opening 16 a of the interlayer insulating film 16 toward the active layer 13. This current flows through the transparent conductive film 15 in the film thickness direction (vertical direction in FIG. 5) and flows through the n-type semiconductor layer 12 having a low sheet resistance along the surface direction (horizontal direction in FIG. 5). This is the route with the lowest resistance.

  On the other hand, the current flowing in the current path A in FIG. 5 passes through the p-type semiconductor layer 14 in the film thickness direction after the carriers travel along the transparent conductive film 15 having a high sheet resistance. The path with the greatest resistance.

  Therefore, in order to uniformly inject current into the active layer 13, that is, in order that the current flowing through the current path A does not become extremely small with respect to the current flowing through the current path B, the transparent conductive film 15 is It is necessary to reduce the distance that the carrier travels along.

  Since the voltage drop in the transparent conductive film 15 occupies about 3 V which is the operating voltage of the semiconductor light emitting device 1 in proportion to the injection current to the connection electrode 18, the voltage drop is injected into the active layer 13. The direction of the current density is uneven.

  By the way, in order to make the current density uniform, the voltage drop in the transparent conductive film 15 in the current path A is 0.6 V as a guide when all currents pass through the current path A. In this current path A, a condition for suppressing the voltage drop to 0.6 V or less is calculated under the following assumptions.

First, the distance between the adjacent first openings 16a and the distance between the adjacent second openings 17a are 40 μm, and the opening size (the length of one side of the square of the cross section of the first opening 16a and the second opening 17a). When the thickness of the transparent conductive film 15 is 2 nm, the sheet resistance Rs of the transparent conductive film 15 is 80Ω / □, the current flowing from the contact surfaces of the connection electrode 18 and the transparent conductive film 15 to the transparent conductive film 16 , The surface resistance ρ is expressed by the following equation.
ρ = π (D + d) / (D−d) × Rs

  In this equation, D is the current spreading distance (distance between openings), and d is the opening size (the length of one side of the square of the opening cross section).

Since D >> d, the above equation can be regarded as ρ = π × Rs.
ρ ≒ 251.2Ω
It becomes.

Further, the injection current value into the semiconductor light emitting device 1 is set to 100 mA which is a high current condition, and the chip size of the semiconductor light emitting device 1 is set to 500 μm × 250 μm. The distance between the first openings 16a and the distance between the second openings 17a is 40 μm, and the number of openings of each of the first openings 16a and the second openings 17a is 44 (see FIG. 2). And the current I flowing into each of the second openings 17a is
I = 0.1 [A] / 44
It becomes.

Therefore, the voltage drop V in the transparent conductive film 15 in the current path B is
V = ρ [Ω] × 0.1 [A] /44≈0.571 [V]
The conditions of the chip size, the distance between the openings, the opening size, and the numerical aperture are referred to as “condition A”.

Since this calculation result satisfies the standard of a voltage drop of 0.6 V, it can be seen that the above "condition A" is a sufficient condition. This calculation result also applies to chip sizes other than 500 μm × 250 μm. In addition, about the different film thickness of the said transparent conductive film 15, the following relational expressions hold based on the said calculation result.
V = (ρ when the film thickness of the transparent conductive film 15 is 60 nm) / (ρ when the film thickness of the transparent conductive film 15 is other than 60 nm) × injection current / numerical aperture.

This relational expression can be rewritten as follows because the distance between the openings is approximately proportional to the square of the numerical aperture.
V = (ρ when the film thickness of the transparent conductive film 15 is 60 nm) / (ρ when the film thickness of the transparent conductive film 15 is other than 60 nm) × injection current / ((distance between adjacent openings) ² × L)

  In this relational expression, L is a constant. From the above relational expression, when the film thickness of the transparent conductive film 15 is not 60 nm, for example, 15 nm, the distance between the openings is not 40 μm but 20 μm. The opening size is determined in combination with the distribution of the first opening 16a and the second opening 17a because it is related to the substantial reflectance of the p-type electrode 80.

  In FIG. 6, the experimental result about the relationship between the effective reflectance of the p-type electrode 80 and light extraction efficiency is shown.

  When an LED chip having a semiconductor layer group similar to the semiconductor layer group 30 is mounted on the WB, the light extraction efficiency is 65%. Therefore, in order to make the FC structure superior to at least this, the light exceeding 65% Extraction efficiency is required. It can be seen from FIG. 6 that the reflectance of the p-type electrode 80 is 85% or more.

  The arrangement of the first opening 16a and the second opening 17a is the arrangement shown in FIG. 2, and the connection electrode 18 is formed of Ni having a reflectance of 60% for light having a wavelength of 460 nm, and the light having a wavelength of 460 nm is used. When the reflective film 17 is formed of Ag having a reflectance of 98%, the relationship between the opening size and the distance between the openings becomes a relationship shown in FIG. 7 by simple arithmetic calculation. From FIG. 7, when the distance between the openings is 40 μm, the opening size of 15 μm □ is sufficient. However, when the reflective film 17 is formed of a material with a slightly low reflectance such as Al, Pd, Rh, or the like, or the reflective film 17 is formed of Ag, the surface of the reflective film 17 has severe irregularities. Therefore, when the reflectance is low, it is necessary to further reduce the opening size. FIG. 7 also shows, as an example of such a case, the relationship between the opening size and the distance between the openings in order to set the reflectance of the reflective film 17 to 92% or 88%. From this relationship, when the reflectance is 92%, an aperture size of 10 μm is sufficient, and when the reflectance is 88%, 5 μm is sufficient.

  The lower limit of the opening size largely depends on the accuracy of the resist exposure process in the patterning process of the interlayer insulating film 16. Depending on the exposure time of the resist formed on the interlayer insulating film 16, the shape of the bottom of the resist changes, resulting in a variation of several tens of nanometers. In order to ensure a stable electrical connection between the connection electrode 18 and the transparent conductive film 15, it is desirable that at least the opening width of the resist is 100 nm or more.

  Finally, the design of the connection electrode 18 will be described. The physical properties most required for the connection electrode 18 are the diffusion preventing property and adhesion of the reflective film 17. The connection electrode 18 satisfying these physical properties is a film made of Ni, W, Ta, Ti, Pd or Pt, a laminated film in which the films are laminated, or at least one of Ni, W, Ta, Ti, Pd and Pt. It is obtained with an alloy film containing two. These films are known as excellent diffusion preventing films and high adhesion. In addition to these properties, it is necessary to electrically connect the transparent conductive film 15 and the reflective film 17, but the resistance value is not a problem because the thickness of the interlayer insulating film 16 is as short as 100 nm. Therefore, a thickness of 10 nm is sufficient for the connection electrode 18, but it is desirable that the thickness be 100 nm or less in terms of material cost.

The above is the design of the p-type electrode 80 which is the main trunk of the first embodiment of the present invention. In practice, an Au plating film or an Au ball bump is formed on the p-type electrode 80 or the n-type electrode 40 before FC mounting connection. Further, a protective film 19 made of SiO ₂ , SiN or the like is provided on the p-type electrode 80 or the n-type electrode 40 and on the side surface of the semiconductor layer group 30, and between the electrodes or between the electrode and the semiconductor layer group 30. A structure in which leakage due to surface current flows does not occur.

  As described above, since the p-type electrode 80 is formed on the semiconductor layer group 30, it is possible to achieve a uniform density of current injected into the active layer 13 and an improvement in light extraction efficiency.

  The first opening 16a and the second opening 17a have the same shape, and the second opening 17a entirely overlaps the first opening 16a, so that the reflective film 17 comes into contact with the transparent conductive film 15. Since it can prevent, reliability can be made high.

  Further, the first opening 16a and the second opening 17a have the same shape, and the second opening 17a is entirely overlapped with the first opening 16a, so that the reflective film 17 is formed in an interlayer insulating film. Since it does not become too narrow with respect to the formation region of 16, it is possible to prevent the reflectance of light from the active layer 13 from being lowered.

  The first opening 16a and the second opening 17a have the same shape, and the entire second opening 17a overlaps the first opening 16a. The process can be simplified.

  Further, since the first opening 16a and the second opening 17a are arranged as shown in FIG. 2, the current can be spread more uniformly in the surface direction in the transparent conductive film 15.

  Hereinafter, a method for mounting the semiconductor light emitting device 1 on the mounting substrate 21 will be described with an example. Here, the role of the mounting substrate 21 is to connect the p-type electrode 80 and the n-type electrode 40 to the external extraction electrode, and any substrate having at least two types of electrodes may be used. Since the mounting substrate 21 is exposed to light emitted from the active layer 13, it is preferable to have a high reflectance. However, in the case of FC mounting, the reflectance is not as important for the mounting substrate 21 as in the case of WB mounting because the back surface of the chip has reflectivity.

  In the first embodiment, an alumina substrate having a thickness of 600 μm is used as the mounting substrate 21, and this alumina substrate can reflect light emitted from the semiconductor light emitting device 1. The material of the mounting substrate 21 is not particularly limited to alumina, and any insulating material such as a white resin substrate can be used as the material of the mounting substrate 21. A wiring 70 is provided on the surface of the mounting substrate 21 as a path for flowing current to the semiconductor light emitting device 1. As the material of the wiring 70, a material containing at least one of Ag paste, Ni, Au, and Pd can be used. And the junction part 20 is used in order to connect the semiconductor light-emitting device 1 and the mounting board | substrate 21, and the solder material containing Au, AuSn solder, or SnAg can be used. In this way, the semiconductor light emitting device 1 is provided on the mounting substrate 21. The semiconductor light emitting device 1 is whitened by sealing with a silicone resin 51 containing a phosphor as shown in FIG. 8 or sealing with a glass 52 containing a phosphor as shown in FIG. It is actually used in a form that improves reliability. That is, the semiconductor package of the first embodiment includes a mounting substrate 21, a semiconductor light emitting device 1 that is FC-mounted on the mounting substrate 21 via a joint 20, and a silicone resin 51 that seals the semiconductor light emitting device 1. Or glass 52 is provided.

  As described above, the semiconductor light emitting device 1 provided on the mounting substrate 21 includes LED chips mounted with WB such as LED bulb modules, LED backlights, LED fluorescent lamps, LED lamps, LED street lamps, and bullet-type LED packages. It can be used for all modules that have been installed.

[Second Embodiment]
Hereinafter, a method for manufacturing the semiconductor light emitting device 101 and the semiconductor package according to the second embodiment of the present invention will be described.

<Crystal growth of gallium nitride compound semiconductor>
In the manufacture of the semiconductor light emitting device 101 of the second embodiment of the present invention, a 2-inch sapphire substrate is used as a substrate on which a gallium nitride compound semiconductor is grown. This sapphire substrate is cleaned and vapor-phase etched to obtain a sapphire substrate 121 shown in FIG. This sapphire substrate 121 is an example of the growth substrate of the present invention.

  Next, on the sapphire substrate 121, an n-type layer made of about 4 μm of GaN doped with Si, an active layer having a multiple quantum well structure made of GaN and GaInN, and Mg by MOCVD (metal organic chemical vapor deposition). A p-type layer composed of doped 60 nm AlGaN and Mg doped 150 nm GaN is sequentially formed.

  Next, a mask (not shown) that covers a predetermined region of the p-type layer is formed, and a portion where the mask is not formed is etched and removed to the middle of the n-type layer by a dry etching method. The layer 122, the active layer 123, and the p-type layer 124 are obtained. Thereafter, the mask is removed. The n-type layer 122 is an example of the first conductivity type semiconductor layer of the present invention, the active layer 123 is an example of the active layer of the present invention, and the p-type layer 124 is an example of the second conductivity type semiconductor layer of the present invention. It is.

<Transparent conductive film formation on p-type layer>
Next, an ITO film having a thickness of 15 nm is formed on the entire surface of the n-type layer 122 and the p-type layer 124 by a sputtering method, and then annealed for 1 hour under conditions of 500 ° C. and N ₂ atmosphere. Ohmicization of the p-type layer 124 and the ITO film is performed.

  Next, after a resist mask (not shown) covering a predetermined region of the ITO film is formed, the resist film is dipped in aqua regia for 20 minutes, and the ITO film on the n-type layer 122 is wet-etched. The ITO film 125 shown in FIG. Thereafter, the resist mask is peeled off with sodium carbonate. The ITO film 125 is an example of the transparent conductive film of the present invention.

<Formation of interlayer insulating film and reflective film>
Next, an SiO ₂ film is formed with a thickness of 50 nm by an MOCVD apparatus on the entire area of the sapphire substrate 121, and then an Ag film is formed on the SiO ₂ film with a thickness of 200 nm using a vapor deposition machine. To do.

  Next, a resist pattern (not shown) having a plurality of openings with an opening size of 2 μm □ is formed on the Ag film. This opening is arranged so that a virtual line connecting three adjacent openings draws a regular triangle with a side of 30 μm.

Next, the sapphire substrate 121 is immersed in a 5% nitric acid solution for 10 minutes. Thereby, the Ag film exposed from the opening of the resist pattern is etched, and the SiO ₂ film is exposed from the opening of the resist pattern.

Next, the sapphire substrate 121 is immersed in 5% buffered hydrofluoric acid for 5 minutes. Thereby, the SiO ₂ film exposed from the opening of the resist pattern is etched.

  Next, when the resist mask is peeled off with sodium carbonate, a network-like laminated structure including an interlayer insulating film 126 and a reflective film 127 is formed on the ITO film 125 as shown in FIG. The interlayer insulating film 126 has a plurality of island-shaped first openings 126a. The reflective film 127 has a plurality of island-shaped second openings 127a that overlap all of the first openings 126a. Moreover, the schematic which looked at the sapphire substrate 121 just after the said laminated structure was formed from upper direction is shown in FIG.

<Formation of connection electrode>
Next, Ni is formed to a thickness of 30 nm by EB (electron beam) deposition over the entire region on the sapphire substrate 121.

  Next, after forming a resist mask (not shown) so as to cover Ni on the p-type layer 124, the portion not covered with the resist mask is immersed in a 30 wt% iron chloride solution for etching removal. To do. Thereby, the connection electrode 128 shown in FIG. 14 is disposed only on the p-type layer 124. 14 denotes a p-type electrode including the ITO film 125, the interlayer insulating film 126, the reflective film 127, and the connection electrode 128.

<Formation of electrode for connection to p-type region>
Next, an Au plating film is formed in a predetermined region on the n-type layer 122 and the connection electrode 128 to a thickness of 100 nm by vapor deposition for mounting on a mounting substrate 131 described later.

<Electrode formation on n-type layer>
Next, a mask (not shown) for exposing the Au plating film on the n-type layer 122 is formed, and an Al film is about 100 nm, a Ti film is about 5 nm, and an Au film is about 10 nm thick by vapor deposition. Form. As a result, an n-type electrode 129 made of an Au plating film, an Al film, a Ti film, and an Au film is formed on the n-type layer 122 as shown in FIG.

  Next, after removing the gold plating film on the connection electrode 128 and the mask, in order to remove the Schottky barrier existing at the interface between the n-type layer 122 and the n-type electrode 129 and obtain ohmic characteristics, Heat treatment is performed at about 600 ° C. in nitrogen for about 30 minutes.

<Au plating film formation in p-type region>
Next, after forming a mask (not shown) for exposing a predetermined region on the p-type layer 124 (portion electrically connected to the mounting substrate 131), an Au plating film of 10 nm is formed on the entire region of the sapphire substrate 121. And the mask is removed. Thereby, the Au plating film 130 shown in FIG. 16 is obtained.

<Production of LED package>
Next, when the sapphire substrate 121 is divided by a normal scribing method, a plurality of semiconductor light emitting devices (LED chips) 101 are obtained.

  Next, as shown in FIG. 17, a white resin plate is used as the mounting substrate 131, and solder bumps 134 made of AuSn are formed on the wiring 132 existing on one surface of the mounting substrate 131 by screen printing.

  Next, the n-type electrode 129 and the p-type electrode 150 are reflow bonded to the wiring 132 with the solder bumps 134. At this time, the reflow conditions follow a profile in which the atmosphere is air, the peak temperature is 300 ° C., and the holding time is 10 seconds.

  Next, when the semiconductor light emitting device 101 is sealed with a silicone resin containing a phosphor (not shown), packaging of the semiconductor light emitting device 101 is completed. That is, a semiconductor package (LED package) is obtained.

<Production of LED bulb>
Finally, a semiconductor package is provided in an LED bulb (not shown).

[Third Embodiment]
Hereinafter, a method for manufacturing a semiconductor light emitting device and a semiconductor package according to a third embodiment of the present invention will be described.

<Crystal growth of gallium nitride compound semiconductor>
The same process as described in the second embodiment is followed.

<Transparent conductive film formation on p-type layer>
As shown in FIG. 18, the same process as described in the second embodiment is followed except that a 40 nm-thickness ZnO film 225 is used as an example of the transparent conductive film of the present invention.

<Formation of interlayer insulating film and reflective film>
Similar to the second embodiment, an interlayer insulating film 226 made of SiO ₂ and a reflective film 227 made of Ag are formed. The interlayer insulating film 226 has a plurality of island-shaped first openings 226a. The reflective film 227 has a plurality of island-like second openings 227a that overlap the entire first opening 226a. The first opening 226a and the second opening 227a have an opening size of 2 μm □. The first opening 226a is arranged so that a virtual line connecting the six adjacent first openings 226a draws a regular hexagon having a side of 30 μm. The second opening 227a is also arranged so that a virtual line connecting six adjacent second openings 227a draws a regular hexagon having a side of 30 μm. Note that the etching process for forming the interlayer insulating film 226 is performed with a 10 wt% oxalic acid solution for 5 minutes. The resist mask for forming the first opening 226a and the second opening 227a is removed with sodium carbonate.

<Formation of connection electrode> to <Formation of Au plating film on p-type region>
The same process as described in the second embodiment is followed.

<Production of LED package>
Next, the sapphire substrate 121 on which the reflective film 227 and the like are formed is divided into a normal scribing method to obtain a plurality of semiconductor light emitting devices (LED chips).

  Next, although not shown in the drawing, after the electrodes on the mounting substrate and the electrodes on the semiconductor light emitting device are connected by ultrasonic bonding of gold and gold, the semiconductor light emitting device is sealed with glass containing a phosphor. ) Is obtained.

<Production of LED backlight>
Finally, a semiconductor package is arranged on the entire back surface of the casing of the liquid crystal module (not shown) and incorporated as a direct type backlight module.

  In the first to third embodiments, the semiconductor light emitting device may be manufactured by reversing the conductivity type. For example, in the first embodiment, a p-type semiconductor layer may be used instead of the n-type semiconductor layer 12, and an n-type semiconductor layer may be used instead of the p-type semiconductor layer 14.

  The present invention is not limited to the above-described embodiment, and various modifications may be added to this embodiment, and various modifications can be made within the scope of the present invention.

1,101 ... Semiconductor light emitting device (LED chip)
DESCRIPTION OF SYMBOLS 11, 121 ... Sapphire substrate 12 ... N-type semiconductor layer 13, 123 ... Active layer 14 ... P-type semiconductor layer 15 ... Transparent conductive film 16, 126, 226 ... Interlayer insulating film 16a, 126a, 226a ... First opening 17, 127 , 227... Reflective film 17a, 127a, 227a ... Second opening 18 ... Connection electrode 19 ... Protective film 20 ... Junction portion 21, 131 ... Mounting substrate 30 ... Semiconductor layer group 40, 129 ... N-type electrode 51 ... Silicone resin 52 ... Glass 70, 132 ... Wiring 80, 150 ... p-type electrode 122 ... n-type layer 124 ... p-type layer 125 ... ITO film 225 ... ZnO film

Claims (5)

A growth substrate;
A first conductivity type semiconductor layer provided on the growth substrate;
An active layer provided on the first conductive semiconductor layer and emitting light;
A second conductivity type semiconductor layer provided on the active layer;
A transparent conductive film provided on the second conductive semiconductor layer and transmitting the light;
An interlayer insulating film provided on the transparent conductive film, having a plurality of island-like first openings and transmitting the light;
A reflective film that is provided on the interlayer insulating film and has a plurality of island-like second openings, at least a portion of which overlaps the first opening, and reflects the light;
A semiconductor light emitting device, comprising: a connection electrode provided on the reflective film, a part of which is in the first opening and the second opening and connected to the transparent conductive film. The semiconductor light-emitting device according to claim 1.
The first opening and the second opening have the same shape or substantially the same shape,
A semiconductor light-emitting device, wherein the second opening entirely overlaps the first opening. The semiconductor light-emitting device according to claim 1 or 2,
2. The semiconductor light emitting device according to claim 1, wherein the distance between the first openings is the same or substantially the same in one direction, and the distance between the second openings is the same or substantially the same in one direction. A mounting board;
The semiconductor light emitting device according to any one of claims 1 to 3, wherein the semiconductor light emitting device is flip-chip mounted on the mounting substrate via a bump.
A semiconductor package comprising: the semiconductor light emitting device sealed; and a resin containing a phosphor. The semiconductor package according to claim 4,
A semiconductor package, wherein the bump is a solder bump or a gold bump.

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