CN101711414B - 非易失性存储器和用于预测编程的方法 - Google Patents

非易失性存储器和用于预测编程的方法 Download PDF

Info

Publication number
CN101711414B
CN101711414B CN2008800195746A CN200880019574A CN101711414B CN 101711414 B CN101711414 B CN 101711414B CN 2008800195746 A CN2008800195746 A CN 2008800195746A CN 200880019574 A CN200880019574 A CN 200880019574A CN 101711414 B CN101711414 B CN 101711414B
Authority
CN
China
Prior art keywords
programming
memory
threshold voltage
checkpoint
volatile memory
Prior art date
Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
Active
Application number
CN2008800195746A
Other languages
English (en)
Chinese (zh)
Other versions
CN101711414A (zh
Inventor
劳尔-阿德里安·塞尔尼亚
Current Assignee (The listed assignees may be inaccurate. Google has not performed a legal analysis and makes no representation or warranty as to the accuracy of the list.)
SanDisk Technologies LLC
Original Assignee
SanDisk Corp
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Priority claimed from US11/733,706 external-priority patent/US7551483B2/en
Priority claimed from US11/733,694 external-priority patent/US7643348B2/en
Application filed by SanDisk Corp filed Critical SanDisk Corp
Publication of CN101711414A publication Critical patent/CN101711414A/zh
Application granted granted Critical
Publication of CN101711414B publication Critical patent/CN101711414B/zh
Active legal-status Critical Current
Anticipated expiration legal-status Critical

Links

Images

Classifications

    • G—PHYSICS
    • G11—INFORMATION STORAGE
    • G11C—STATIC STORES
    • G11C16/00—Erasable programmable read-only memories
    • G11C16/02—Erasable programmable read-only memories electrically programmable
    • G11C16/06—Auxiliary circuits, e.g. for writing into memory
    • G11C16/10—Programming or data input circuits
    • G—PHYSICS
    • G11—INFORMATION STORAGE
    • G11C—STATIC STORES
    • G11C11/00—Digital stores characterised by the use of particular electric or magnetic storage elements; Storage elements therefor
    • G11C11/56—Digital stores characterised by the use of particular electric or magnetic storage elements; Storage elements therefor using storage elements with more than two stable states represented by steps, e.g. of voltage, current, phase, frequency
    • G—PHYSICS
    • G11—INFORMATION STORAGE
    • G11C—STATIC STORES
    • G11C11/00—Digital stores characterised by the use of particular electric or magnetic storage elements; Storage elements therefor
    • G11C11/56—Digital stores characterised by the use of particular electric or magnetic storage elements; Storage elements therefor using storage elements with more than two stable states represented by steps, e.g. of voltage, current, phase, frequency
    • G11C11/5621—Digital stores characterised by the use of particular electric or magnetic storage elements; Storage elements therefor using storage elements with more than two stable states represented by steps, e.g. of voltage, current, phase, frequency using charge storage in a floating gate
    • G11C11/5628—Programming or writing circuits; Data input circuits
    • G—PHYSICS
    • G11—INFORMATION STORAGE
    • G11C—STATIC STORES
    • G11C16/00—Erasable programmable read-only memories
    • G11C16/02—Erasable programmable read-only memories electrically programmable
    • G11C16/04—Erasable programmable read-only memories electrically programmable using variable threshold transistors, e.g. FAMOS
    • G11C16/0483—Erasable programmable read-only memories electrically programmable using variable threshold transistors, e.g. FAMOS comprising cells having several storage transistors connected in series
    • G—PHYSICS
    • G11—INFORMATION STORAGE
    • G11C—STATIC STORES
    • G11C16/00—Erasable programmable read-only memories
    • G11C16/02—Erasable programmable read-only memories electrically programmable
    • G11C16/06—Auxiliary circuits, e.g. for writing into memory
    • G11C16/10—Programming or data input circuits
    • G11C16/12—Programming voltage switching circuits
    • G—PHYSICS
    • G11—INFORMATION STORAGE
    • G11C—STATIC STORES
    • G11C16/00—Erasable programmable read-only memories
    • G11C16/02—Erasable programmable read-only memories electrically programmable
    • G11C16/06—Auxiliary circuits, e.g. for writing into memory
    • G11C16/34—Determination of programming status, e.g. threshold voltage, overprogramming or underprogramming, retention
    • G11C16/3436—Arrangements for verifying correct programming or erasure
    • G11C16/3454—Arrangements for verifying correct programming or for detecting overprogrammed cells
    • G—PHYSICS
    • G11—INFORMATION STORAGE
    • G11C—STATIC STORES
    • G11C2211/00—Indexing scheme relating to digital stores characterized by the use of particular electric or magnetic storage elements; Storage elements therefor
    • G11C2211/56—Indexing scheme relating to G11C11/56 and sub-groups for features not covered by these groups
    • G11C2211/562—Multilevel memory programming aspects
    • G11C2211/5621—Multilevel programming verification

Landscapes

  • Engineering & Computer Science (AREA)
  • Microelectronics & Electronic Packaging (AREA)
  • Computer Hardware Design (AREA)
  • Read Only Memory (AREA)
  • For Increasing The Reliability Of Semiconductor Memories (AREA)
CN2008800195746A 2007-04-10 2008-04-09 非易失性存储器和用于预测编程的方法 Active CN101711414B (zh)

Applications Claiming Priority (5)

Application Number Priority Date Filing Date Title
US11/733,706 2007-04-10
US11/733,694 2007-04-10
US11/733,706 US7551483B2 (en) 2007-04-10 2007-04-10 Non-volatile memory with predictive programming
US11/733,694 US7643348B2 (en) 2007-04-10 2007-04-10 Predictive programming in non-volatile memory
PCT/US2008/059740 WO2008124760A2 (en) 2007-04-10 2008-04-09 Non-volatile memory and method for predictive programming

Publications (2)

Publication Number Publication Date
CN101711414A CN101711414A (zh) 2010-05-19
CN101711414B true CN101711414B (zh) 2013-06-26

Family

ID=39712596

Family Applications (1)

Application Number Title Priority Date Filing Date
CN2008800195746A Active CN101711414B (zh) 2007-04-10 2008-04-09 非易失性存储器和用于预测编程的方法

Country Status (6)

Country Link
EP (1) EP2135252A2 (enExample)
JP (1) JP2010524147A (enExample)
KR (1) KR20100028019A (enExample)
CN (1) CN101711414B (enExample)
TW (1) TWI371041B (enExample)
WO (1) WO2008124760A2 (enExample)

Families Citing this family (79)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
WO2007132452A2 (en) 2006-05-12 2007-11-22 Anobit Technologies Reducing programming error in memory devices
WO2007132457A2 (en) 2006-05-12 2007-11-22 Anobit Technologies Ltd. Combined distortion estimation and error correction coding for memory devices
CN103280239B (zh) 2006-05-12 2016-04-06 苹果公司 存储设备中的失真估计和消除
US8239735B2 (en) 2006-05-12 2012-08-07 Apple Inc. Memory Device with adaptive capacity
US8060806B2 (en) 2006-08-27 2011-11-15 Anobit Technologies Ltd. Estimation of non-linear distortion in memory devices
WO2008053472A2 (en) 2006-10-30 2008-05-08 Anobit Technologies Ltd. Reading memory cells using multiple thresholds
WO2008053473A2 (en) 2006-10-30 2008-05-08 Anobit Technologies Ltd. Memory cell readout using successive approximation
US7924648B2 (en) 2006-11-28 2011-04-12 Anobit Technologies Ltd. Memory power and performance management
US7706182B2 (en) 2006-12-03 2010-04-27 Anobit Technologies Ltd. Adaptive programming of analog memory cells using statistical characteristics
WO2008068747A2 (en) 2006-12-03 2008-06-12 Anobit Technologies Ltd. Automatic defect management in memory devices
US7593263B2 (en) 2006-12-17 2009-09-22 Anobit Technologies Ltd. Memory device with reduced reading latency
US7900102B2 (en) 2006-12-17 2011-03-01 Anobit Technologies Ltd. High-speed programming of memory devices
US7751240B2 (en) 2007-01-24 2010-07-06 Anobit Technologies Ltd. Memory device with negative thresholds
US8151166B2 (en) 2007-01-24 2012-04-03 Anobit Technologies Ltd. Reduction of back pattern dependency effects in memory devices
US8369141B2 (en) 2007-03-12 2013-02-05 Apple Inc. Adaptive estimation of memory cell read thresholds
US8001320B2 (en) 2007-04-22 2011-08-16 Anobit Technologies Ltd. Command interface for memory devices
US8234545B2 (en) 2007-05-12 2012-07-31 Apple Inc. Data storage with incremental redundancy
US8429493B2 (en) 2007-05-12 2013-04-23 Apple Inc. Memory device with internal signap processing unit
US7925936B1 (en) 2007-07-13 2011-04-12 Anobit Technologies Ltd. Memory device with non-uniform programming levels
US8259497B2 (en) 2007-08-06 2012-09-04 Apple Inc. Programming schemes for multi-level analog memory cells
US8174905B2 (en) 2007-09-19 2012-05-08 Anobit Technologies Ltd. Programming orders for reducing distortion in arrays of multi-level analog memory cells
US7773413B2 (en) 2007-10-08 2010-08-10 Anobit Technologies Ltd. Reliable data storage in analog memory cells in the presence of temperature variations
US8068360B2 (en) 2007-10-19 2011-11-29 Anobit Technologies Ltd. Reading analog memory cells using built-in multi-threshold commands
US8000141B1 (en) 2007-10-19 2011-08-16 Anobit Technologies Ltd. Compensation for voltage drifts in analog memory cells
US8527819B2 (en) 2007-10-19 2013-09-03 Apple Inc. Data storage in analog memory cell arrays having erase failures
US8270246B2 (en) 2007-11-13 2012-09-18 Apple Inc. Optimized selection of memory chips in multi-chips memory devices
US8225181B2 (en) 2007-11-30 2012-07-17 Apple Inc. Efficient re-read operations from memory devices
US8209588B2 (en) 2007-12-12 2012-06-26 Anobit Technologies Ltd. Efficient interference cancellation in analog memory cell arrays
US8456905B2 (en) 2007-12-16 2013-06-04 Apple Inc. Efficient data storage in multi-plane memory devices
US8085586B2 (en) 2007-12-27 2011-12-27 Anobit Technologies Ltd. Wear level estimation in analog memory cells
US8156398B2 (en) 2008-02-05 2012-04-10 Anobit Technologies Ltd. Parameter estimation based on error correction code parity check equations
US7924587B2 (en) 2008-02-21 2011-04-12 Anobit Technologies Ltd. Programming of analog memory cells using a single programming pulse per state transition
US7864573B2 (en) 2008-02-24 2011-01-04 Anobit Technologies Ltd. Programming analog memory cells for reduced variance after retention
US8230300B2 (en) 2008-03-07 2012-07-24 Apple Inc. Efficient readout from analog memory cells using data compression
US8400858B2 (en) 2008-03-18 2013-03-19 Apple Inc. Memory device with reduced sense time readout
US8059457B2 (en) 2008-03-18 2011-11-15 Anobit Technologies Ltd. Memory device with multiple-accuracy read commands
EP2289069B1 (en) * 2008-06-12 2016-12-28 SanDisk Technologies LLC Nonvolatile memory and method with index programming and reduced verify
US8498151B1 (en) 2008-08-05 2013-07-30 Apple Inc. Data storage in analog memory cells using modified pass voltages
US7924613B1 (en) 2008-08-05 2011-04-12 Anobit Technologies Ltd. Data storage in analog memory cells with protection against programming interruption
US8169825B1 (en) 2008-09-02 2012-05-01 Anobit Technologies Ltd. Reliable data storage in analog memory cells subjected to long retention periods
US8949684B1 (en) 2008-09-02 2015-02-03 Apple Inc. Segmented data storage
US8482978B1 (en) 2008-09-14 2013-07-09 Apple Inc. Estimation of memory cell read thresholds by sampling inside programming level distribution intervals
US8000135B1 (en) 2008-09-14 2011-08-16 Anobit Technologies Ltd. Estimation of memory cell read thresholds by sampling inside programming level distribution intervals
US8239734B1 (en) 2008-10-15 2012-08-07 Apple Inc. Efficient data storage in storage device arrays
US8713330B1 (en) 2008-10-30 2014-04-29 Apple Inc. Data scrambling in memory devices
US8208304B2 (en) 2008-11-16 2012-06-26 Anobit Technologies Ltd. Storage at M bits/cell density in N bits/cell analog memory cell devices, M>N
US8397131B1 (en) 2008-12-31 2013-03-12 Apple Inc. Efficient readout schemes for analog memory cell devices
US8248831B2 (en) 2008-12-31 2012-08-21 Apple Inc. Rejuvenation of analog memory cells
US8924661B1 (en) 2009-01-18 2014-12-30 Apple Inc. Memory system including a controller and processors associated with memory devices
US8228701B2 (en) 2009-03-01 2012-07-24 Apple Inc. Selective activation of programming schemes in analog memory cell arrays
US8259506B1 (en) 2009-03-25 2012-09-04 Apple Inc. Database of memory read thresholds
US8832354B2 (en) 2009-03-25 2014-09-09 Apple Inc. Use of host system resources by memory controller
US8238157B1 (en) 2009-04-12 2012-08-07 Apple Inc. Selective re-programming of analog memory cells
US8479080B1 (en) 2009-07-12 2013-07-02 Apple Inc. Adaptive over-provisioning in memory systems
US8495465B1 (en) 2009-10-15 2013-07-23 Apple Inc. Error correction coding over multiple memory pages
US8223556B2 (en) * 2009-11-25 2012-07-17 Sandisk Technologies Inc. Programming non-volatile memory with a reduced number of verify operations
US8677054B1 (en) 2009-12-16 2014-03-18 Apple Inc. Memory management schemes for non-volatile memory devices
US8694814B1 (en) 2010-01-10 2014-04-08 Apple Inc. Reuse of host hibernation storage space by memory controller
US8677203B1 (en) 2010-01-11 2014-03-18 Apple Inc. Redundant data storage schemes for multi-die memory systems
US8694853B1 (en) 2010-05-04 2014-04-08 Apple Inc. Read commands for reading interfering memory cells
US8572423B1 (en) 2010-06-22 2013-10-29 Apple Inc. Reducing peak current in memory systems
US8595591B1 (en) 2010-07-11 2013-11-26 Apple Inc. Interference-aware assignment of programming levels in analog memory cells
US9104580B1 (en) 2010-07-27 2015-08-11 Apple Inc. Cache memory for hybrid disk drives
US8645794B1 (en) 2010-07-31 2014-02-04 Apple Inc. Data storage in analog memory cells using a non-integer number of bits per cell
US8856475B1 (en) 2010-08-01 2014-10-07 Apple Inc. Efficient selection of memory blocks for compaction
US8493781B1 (en) 2010-08-12 2013-07-23 Apple Inc. Interference mitigation using individual word line erasure operations
US8694854B1 (en) 2010-08-17 2014-04-08 Apple Inc. Read threshold setting based on soft readout statistics
US9021181B1 (en) 2010-09-27 2015-04-28 Apple Inc. Memory management for unifying memory cell conditions by using maximum time intervals
US8681562B2 (en) 2011-01-10 2014-03-25 Micron Technology, Inc. Memories and methods of programming memories
JP2014053060A (ja) 2012-09-07 2014-03-20 Toshiba Corp 半導体記憶装置及びその制御方法
KR102449196B1 (ko) 2016-01-15 2022-09-29 삼성전자주식회사 비휘발성 메모리 장치 및 비휘발성 메모리 장치의 프로그램 방법
JP6539608B2 (ja) * 2016-03-15 2019-07-03 東芝メモリ株式会社 半導体記憶装置
CN110556150A (zh) * 2018-06-01 2019-12-10 北京兆易创新科技股份有限公司 一种存储单元的编程方法、装置、电子设备及存储介质
CN110556145A (zh) * 2018-06-01 2019-12-10 北京兆易创新科技股份有限公司 一种存储单元的编程方法、装置、电子设备及存储介质
CN110556146A (zh) * 2018-06-01 2019-12-10 北京兆易创新科技股份有限公司 一种存储单元的编程方法、装置、电子设备及存储介质
KR102700420B1 (ko) * 2018-09-17 2024-08-30 에스케이하이닉스 주식회사 메모리 시스템 및 그것의 동작방법
CN110610739B (zh) * 2019-09-17 2021-06-18 珠海创飞芯科技有限公司 一种阈值电压调节方法
US11556416B2 (en) 2021-05-05 2023-01-17 Apple Inc. Controlling memory readout reliability and throughput by adjusting distance between read thresholds
US11847342B2 (en) 2021-07-28 2023-12-19 Apple Inc. Efficient transfer of hard data and confidence levels in reading a nonvolatile memory

Citations (2)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
US5729489A (en) * 1995-12-14 1998-03-17 Intel Corporation Programming flash memory using predictive learning methods
EP0913832A1 (en) * 1997-11-03 1999-05-06 STMicroelectronics S.r.l. Method for multilevel programming of a nonvolatile memory, and a multilevel nonvolatile memory

Family Cites Families (4)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JPH0453096A (ja) * 1990-06-19 1992-02-20 Toshiba Corp アナログ記憶装置
DE69927967T2 (de) * 1999-08-03 2006-07-27 Stmicroelectronics S.R.L., Agrate Brianza Programmierungverfahren eines nichtflüchtigen Multibit Speichers durch Regelung der Gatespannung
US6504760B1 (en) * 2001-06-22 2003-01-07 Intel Corporation Charging a capacitance of a memory cell and charger
US7042766B1 (en) * 2004-07-22 2006-05-09 Spansion, Llc Method of programming a flash memory device using multilevel charge storage

Patent Citations (2)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
US5729489A (en) * 1995-12-14 1998-03-17 Intel Corporation Programming flash memory using predictive learning methods
EP0913832A1 (en) * 1997-11-03 1999-05-06 STMicroelectronics S.r.l. Method for multilevel programming of a nonvolatile memory, and a multilevel nonvolatile memory

Also Published As

Publication number Publication date
WO2008124760A3 (en) 2008-11-27
KR20100028019A (ko) 2010-03-11
JP2010524147A (ja) 2010-07-15
TWI371041B (en) 2012-08-21
WO2008124760A2 (en) 2008-10-16
CN101711414A (zh) 2010-05-19
TW200907975A (en) 2009-02-16
EP2135252A2 (en) 2009-12-23

Similar Documents

Publication Publication Date Title
CN101711414B (zh) 非易失性存储器和用于预测编程的方法
US7965562B2 (en) Predictive programming in non-volatile memory
CN101399083B (zh) 非易失性存储装置及其操作方法
US7551483B2 (en) Non-volatile memory with predictive programming
KR100332001B1 (ko) 반도체불휘발성기억장치
CN113284539B (zh) 循环期间的编程电压调制
US20090310421A1 (en) Nonvolatile Memory with Correlated Multiple Pass Programming
TWI494930B (zh) 記憶體裝置之數個操作
CN102177555A (zh) 具有通过忽略最快和/或最慢编程位减少编程验证的非易失性存储器和方法
US20130176777A1 (en) Charge Cycling By Equalizing and Regulating the Source, Well, and Bit Line Levels During Write Operations for NAND Flash Memory: Verify to Program Transition
CN101512666A (zh) 非易失性存储器和用于线性估计初始编程电压的方法
US8432752B2 (en) Adaptive write procedures for non-volatile memory using verify read
US7881115B2 (en) Method of programming nonvolatile memory device
US8995188B2 (en) Sharing support circuitry in a memory
US20090310420A1 (en) Method for Correlated Multiple Pass Programming in Nonvolatile Memory
US20140204694A1 (en) Systems and methods for adaptive soft programming for non-volatile memory using temperature sensor
KR20110036884A (ko) 확인 단계가 감소하고 인덱스 프로그래밍을 이용하는 비휘발성 메모리와 방법
EP2297739B1 (en) Nonvolatile memory and method for correlated multiple pass programming
US8509001B2 (en) Adaptive write procedures for non-volatile memory
US7872918B2 (en) Nonvolatile memory device and program or erase method using the same
US8750045B2 (en) Experience count dependent program algorithm for flash memory
US11887674B2 (en) Utilizing data pattern effect to control read clock timing and bit line kick for read time reduction
JP2013127827A (ja) 不揮発性半導体記憶装置
KR100255955B1 (ko) 플래시 메모리 장치 및 그것의 프로그램 방법
KR20120078839A (ko) 반도체 메모리 장치 및 이를 이용한 소거방법

Legal Events

Date Code Title Description
C06 Publication
PB01 Publication
C10 Entry into substantive examination
SE01 Entry into force of request for substantive examination
ASS Succession or assignment of patent right

Owner name: SANDISK CORPORATION

Free format text: FORMER OWNER: SANDISK CORP.

Effective date: 20120625

C41 Transfer of patent application or patent right or utility model
TA01 Transfer of patent application right

Effective date of registration: 20120625

Address after: Texas, USA

Applicant after: SANDISK TECHNOLOGIES Inc.

Address before: California, USA

Applicant before: Sandisk Corp.

C14 Grant of patent or utility model
GR01 Patent grant
C56 Change in the name or address of the patentee
CP01 Change in the name or title of a patent holder

Address after: Texas, USA

Patentee after: SANDISK TECHNOLOGIES LLC

Address before: Texas, USA

Patentee before: SANDISK TECHNOLOGIES Inc.

TR01 Transfer of patent right
TR01 Transfer of patent right

Effective date of registration: 20250318

Address after: U.S.A.

Patentee after: SANDISK TECHNOLOGIES Inc.

Country or region after: U.S.A.

Address before: texas

Patentee before: SANDISK TECHNOLOGIES LLC

Country or region before: U.S.A.