CN101697355A - Evenly-triggered semiconductor silicon-controlled rectifier controller for ESD - Google Patents
Evenly-triggered semiconductor silicon-controlled rectifier controller for ESD Download PDFInfo
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- CN101697355A CN101697355A CN 200910233695 CN200910233695A CN101697355A CN 101697355 A CN101697355 A CN 101697355A CN 200910233695 CN200910233695 CN 200910233695 CN 200910233695 A CN200910233695 A CN 200910233695A CN 101697355 A CN101697355 A CN 101697355A
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- 239000004065 semiconductor Substances 0.000 title claims abstract description 135
- XUIMIQQOPSSXEZ-UHFFFAOYSA-N Silicon Chemical compound [Si] XUIMIQQOPSSXEZ-UHFFFAOYSA-N 0.000 title claims abstract description 30
- 229910052710 silicon Inorganic materials 0.000 title claims abstract description 30
- 239000010703 silicon Substances 0.000 title claims abstract description 30
- 230000001960 triggered effect Effects 0.000 title claims abstract description 18
- 229910052751 metal Inorganic materials 0.000 claims abstract description 21
- 239000002184 metal Substances 0.000 claims abstract description 21
- 239000000758 substrate Substances 0.000 claims abstract description 10
- 239000002019 doping agent Substances 0.000 claims description 30
- VYPSYNLAJGMNEJ-UHFFFAOYSA-N Silicium dioxide Chemical compound O=[Si]=O VYPSYNLAJGMNEJ-UHFFFAOYSA-N 0.000 claims description 3
- 230000002349 favourable effect Effects 0.000 abstract 1
- 238000002347 injection Methods 0.000 abstract 1
- 239000007924 injection Substances 0.000 abstract 1
- 238000000034 method Methods 0.000 description 9
- 230000015556 catabolic process Effects 0.000 description 6
- 230000015572 biosynthetic process Effects 0.000 description 3
- 238000005755 formation reaction Methods 0.000 description 3
- 238000001259 photo etching Methods 0.000 description 3
- 230000003068 static effect Effects 0.000 description 3
- 239000004411 aluminium Substances 0.000 description 2
- 229910052782 aluminium Inorganic materials 0.000 description 2
- XAGFODPZIPBFFR-UHFFFAOYSA-N aluminium Chemical compound [Al] XAGFODPZIPBFFR-UHFFFAOYSA-N 0.000 description 2
- 238000000137 annealing Methods 0.000 description 2
- 238000005468 ion implantation Methods 0.000 description 2
- 229910052581 Si3N4 Inorganic materials 0.000 description 1
- QVGXLLKOCUKJST-UHFFFAOYSA-N atomic oxygen Chemical compound [O] QVGXLLKOCUKJST-UHFFFAOYSA-N 0.000 description 1
- 230000007812 deficiency Effects 0.000 description 1
- 230000000694 effects Effects 0.000 description 1
- 238000005530 etching Methods 0.000 description 1
- 230000005669 field effect Effects 0.000 description 1
- 238000010438 heat treatment Methods 0.000 description 1
- 238000004519 manufacturing process Methods 0.000 description 1
- 229910044991 metal oxide Inorganic materials 0.000 description 1
- 150000004706 metal oxides Chemical class 0.000 description 1
- 229910052760 oxygen Inorganic materials 0.000 description 1
- 239000001301 oxygen Substances 0.000 description 1
- 238000002161 passivation Methods 0.000 description 1
- 238000002360 preparation method Methods 0.000 description 1
- 230000001012 protector Effects 0.000 description 1
- HQVNEWCFYHHQES-UHFFFAOYSA-N silicon nitride Chemical compound N12[Si]34N5[Si]62N3[Si]51N64 HQVNEWCFYHHQES-UHFFFAOYSA-N 0.000 description 1
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- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L29/00—Semiconductor devices specially adapted for rectifying, amplifying, oscillating or switching and having potential barriers; Capacitors or resistors having potential barriers, e.g. a PN-junction depletion layer or carrier concentration layer; Details of semiconductor bodies or of electrodes thereof ; Multistep manufacturing processes therefor
- H01L29/66—Types of semiconductor device ; Multistep manufacturing processes therefor
- H01L29/86—Types of semiconductor device ; Multistep manufacturing processes therefor controllable only by variation of the electric current supplied, or only the electric potential applied, to one or more of the electrodes carrying the current to be rectified, amplified, oscillated or switched
- H01L29/861—Diodes
- H01L29/87—Thyristor diodes, e.g. Shockley diodes, break-over diodes
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- Engineering & Computer Science (AREA)
- Microelectronics & Electronic Packaging (AREA)
- Power Engineering (AREA)
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- Ceramic Engineering (AREA)
- Condensed Matter Physics & Semiconductors (AREA)
- General Physics & Mathematics (AREA)
- Computer Hardware Design (AREA)
- Thyristors (AREA)
- Metal-Oxide And Bipolar Metal-Oxide Semiconductor Integrated Circuits (AREA)
Abstract
The invention relates to an evenly-triggered semiconductor silicon-controlled rectifier controller for an electrostatic discharge (ESD) protection circuit, which comprises a P-type semiconductor substrate, wherein the P-type semiconductor substrate is provided with an N-type trap and a P-type trap respectively which are adjacent; a low concentration N-type semiconductor area and a low concentration P-type semiconductor area are arranged in the N-type trap; the areas beyond the low concentration N-type semiconductor area, the low concentration P-type semiconductor area, an N-type semiconductor area and a P-type semiconductor area are provided with field oxides; the N-type semiconductor area and a P-type doped semiconductor area are connected with metal layers to form a positive electrode of a transverse semiconductor silicon-controlled rectifier controller; and an N-type doped semiconductor area and the P-type semiconductor area are connected with metal layers to form a negative electrode of the transverse semiconductor silicon-controlled rectifier controller. The lower surface of the field oxide at the junction of the P-type trap and the N-type trap is provided with a high concentration P-type field injection layer, and the low concentration N-type semiconductor area is arranged in the N-type trap. The evenly-triggered semiconductor silicon-controlled rectifier controller can acquire a lower trigger voltage, and is favorable for an evenly-triggered transverse silicon-controlled rectifier.
Description
Technical field
The invention belongs to technical field of integrated circuits, relate to a kind of electrostatic discharge protection component, in particular, is about a kind of static discharge (Electrostatic Discharge, ESD) evenly-triggered semiconductor silicon-controlled rectifier controller in the protection circuit of being applicable to.
Background technology
Raising along with the semiconductor integrated circuit integrated level, the corresponding of device size reduces, thereby cause semiconductor integrated circuit generally to be easy to be subjected to static discharge (Electrostatic Discharge, ESD) influence of incident, this static discharge may damage or burn integrated circuit, makes that integrated circuit can't operate as normal.Therefore designing effective electrostatic discharge protection circuit and electrostatic discharge protector, to avoid damage of electrostatic discharge with assembly in the protection integrated circuit and circuit be considerable.
At present, in various semiconductor integrated circuit, laterally (lateral silicon controlrectifier LSCR) has been widely used as the esd protection device to thyristor, has protected integrated circuit to avoid the infringement of esd event effectively.Laterally why thyristor is widely used as the esd protection device; one of them important reasons is exactly that it has the lower voltage of keeping; make power consumption that the ESD leakage current produced esd protection device such as diode less than other on horizontal thyristor; metal oxide field-effect transistor (MOS) and bipolar transistor (BJT); Fig. 1 is the profile of a traditional horizontal thyristor structure; 101 is P type substrate; 102 is N type trap; 103 is P type trap; 104 is N type trap contact semiconductor district; 105 is the p type anode contact zone; 107 is P type trap contact semiconductor district; 106 is N type negative contact zone; 108 is the anode metal electrode, and 109 is the cathodic metal electrode.Simultaneously,, further improve the esd protection performance, adopt a plurality of horizontal thyristors form (list of references) parallel with one another usually in order to obtain higher second breakdown electric current.But, because the restriction of technology controlling and process accuracy, make when esd event takes place, all horizontal thyristors are difficult to triggering and conducting simultaneously, have only certain or certain several horizontal thyristor triggering and conducting to carry out earial drainage, seriously influenced anti-ESD performance, our said inhomogeneous triggering phenomenon that Here it is.
In correlation technique, someone proposes to increase the distance between N type trap contact semiconductor district 104 and the p type anode contact zone 108, thereby increased the conducting resistance between them, when making the PN junction generation avalanche breakdown of N type trap 102 and P type trap 103 formations, the anode metal electrode 108 of device and the voltage between the cathodic metal electrode 109 are greater than avalanche voltage, thereby increased the triggering probability of other structure devices of the same type that is in parallel with this device, thereby increase the probability that evenly triggers, but the effect of this way in high voltage integrated circuit and not obvious.
The somebody proposes an external resistance on anode metal electrode 108, thereby realizes function same as described above, but this has increased the technology cost.
Summary of the invention
The present invention is directed to the deficiencies in the prior art, provide a kind of under the prerequisite that does not increase technology difficulty and cost, can obtain, and help the evenly horizontal thyristor of triggering than low trigger voltage.
The present invention adopts following technical scheme:
A kind of ESD evenly-triggered semiconductor silicon-controlled rectifier controller, comprise: P type dope semiconductor substrates, on P type dope semiconductor substrates, be respectively arranged with adjacent N type dopant well and P type dopant well, in N type dopant well, be provided with low concentration N type doped semiconductor area and P type doped semiconductor area, in low concentration N type doped semiconductor area, be provided with the N type semiconductor district, in P type dopant well, be provided with N type doped semiconductor area and P type semiconductor district, in low concentration N type doped semiconductor area, P type doped semiconductor area, zone beyond N type doped semiconductor area and the P type doped semiconductor area is provided with field oxide, in low concentration N type doped semiconductor area, P type doped semiconductor area, N type doped semiconductor area, the surface of P type doped semiconductor area and field oxide is provided with the silica dioxide medium layer, on N type semiconductor district and P type doped semiconductor area, be connected with metal level, constituted the anode of transverse semiconductor silicon controlled rectifier controller; On N type doped semiconductor area and P type doped semiconductor area, be connected with metal level, constituted the negative electrode of transverse semiconductor silicon controlled rectifier controller.Lower surface place at the field oxide of P type dopant well and N type dopant well intersection is provided with high concentration P type field implanted layer.
Compared with prior art, the present invention has following advantage:
(1) is provided with low concentration N type doped semiconductor area 5 in the N type dopant well 2 among the present invention, this low concentration N type doped semiconductor area 5 makes the resistance of N type semiconductor district 4 semiconductor regions on every side increase, PN junction generation avalanche breakdown when N type dopant well 2 and P type dopant well 3 formations, and laterally thyristor does not trigger when opening, the anode of device and the magnitude of voltage between the negative electrode are greater than the avalanche breakdown voltage value, avalanche breakdown also can take place in feasible other device that is in parallel with this device, trigger the probability of opening thereby increased other device that is in parallel with this device, the final realization evenly triggered.
(2) low concentration N type doped semiconductor area 5 and the P type doped well region 3 among the present invention can realize in same processing step, makes the processing procedure of low concentration N type doped semiconductor area 5 not improve the cost of technology.
(3) the high concentration P type field implanted layer 9 among the present invention can reduce the puncture voltage of the PN junction of N type dopant well 2 and P type dopant well 3 formations, thereby has reduced the avalanche breakdown voltage of horizontal thyristor.
Description of drawings
Fig. 1 is the profile of traditional horizontal silicon controlled rectifier controller structure.
Fig. 2 is the profile of semiconductor silicon-controlled rectifier controller of the present invention.
Fig. 3 is a domain structure of realizing low concentration N type doped semiconductor area 5 of the present invention and P type doped well region 3, and wherein 301 for making the domain shape of P type doped well region 3, and 302 for making the domain shape of low concentration N type doped semiconductor area 5.
Fig. 4 is an another domain structure of realizing low concentration N type doped semiconductor area 5 of the present invention and P type doped well region 3, and wherein 401 for making the domain shape of P type doped well region 3, and 402 for making the domain shape of low concentration N type doped semiconductor area 5.
Embodiment
With reference to Fig. 2, a kind of ESD evenly-triggered semiconductor silicon-controlled rectifier controller, comprise: P type dope semiconductor substrates 1, on P type dope semiconductor substrates 1, be respectively arranged with adjacent N type dopant well 2 and P type dopant well 3, in N type dopant well 2, be provided with low concentration N type doped semiconductor area 5 and P type doped semiconductor area 6, in low concentration N type doped semiconductor area 5, be provided with N type semiconductor district 4, in P type dopant well 3, be provided with N type doped semiconductor area 7 and P type semiconductor district 8, in low concentration N type doped semiconductor area 5, P type doped semiconductor area 6, zone beyond N type doped semiconductor area 7 and the P type doped semiconductor area 8 is provided with field oxide 10, in low concentration N type doped semiconductor area 5, P type doped semiconductor area 6, N type doped semiconductor area 7, the surface of P type doped semiconductor area 8 and field oxide 10 is provided with silica dioxide medium layer 11, on N type semiconductor district 4 and P type doped semiconductor area 6, be connected with metal level 12, constituted the anode metal electrode of transverse semiconductor silicon controlled rectifier controller; On N type doped semiconductor area 7 and P type doped semiconductor area 8, be connected with metal level 13, constituted the cathodic metal electrode of transverse semiconductor silicon controlled rectifier controller.Lower surface place at the field oxide 10 of P type dopant well 2 and N type dopant well 3 intersections is provided with high concentration P type field implanted layer 9.
In the present embodiment:
Described P type field implanted layer 9 does not link to each other with N type doped semiconductor area 7 with P type doped semiconductor area 6, and between them, its size is injected the size decision of window by the field.
The concentration of described P type field implanted layer 9 is higher than the concentration of P type doped well region 3.
The concentration in described low concentration N type semiconductor district 5 is lower than N type semiconductor well region 2 and N type semiconductor district 4.
The present invention adopts following method to prepare:
1, select a P type silicon chip as P type dope semiconductor substrates 1, adopt the conventional laterally manufacture method of silicon controlled rectifier controller then, through photoetching process and N type ion implantation technology, the annealing back forms N type dopant well 2, adopt special mask then, pass through photoetching process and P type ion implantation technology again, the annealing back forms P type dopant well 3 and low concentration N type doped semiconductor area 5.
2, realize the preparation of an oxygen through deposit silicon nitride, photoetching process and heat treatment process, generate field oxide 10.What then carry out is exactly that high concentration ion injects, form N type semiconductor district 4, P type doped semiconductor area 6, N type doped semiconductor area 7 and P type doped semiconductor area 8, be to get fairlead at last, through deposit aluminium and etching aluminium technology, form metal level 12 and metal level 13, wherein metal level 12 is as the anode metal electrode, and metal level 13 carries out follow-up Passivation Treatment at last as the cathodic metal electrode.
Claims (9)
1. ESD evenly-triggered semiconductor silicon-controlled rectifier controller, comprise: P type dope semiconductor substrates (1), on described P type dope semiconductor substrates (1), be respectively arranged with adjacent N type dopant well (2) and P type dopant well (3), in described N type dopant well (2), be provided with low concentration N type doped semiconductor area (5) and P type doped semiconductor area (6), in described low concentration N type doped semiconductor area (5), be provided with N type doped semiconductor area (4), in described P type dopant well (3), be provided with N type doped semiconductor area (7) and P type doped semiconductor area (8), in described low concentration N type doped semiconductor area (5), P type doped semiconductor area (6), N type doped semiconductor area (7) and P type doped semiconductor area (8) zone in addition are provided with field oxide (10), in described low concentration N type doped semiconductor area (5), P type doped semiconductor area (6), N type doped semiconductor area (7), the surface of P type doped semiconductor area (8) and field oxide (10) is provided with silica dioxide medium layer (11), on described N type doped semiconductor area (4) and P type doped semiconductor area (6), be connected with metal level (12), constituted the anode of transverse semiconductor silicon controlled rectifier controller; On described N type doped semiconductor area (7) and P type doped semiconductor area (8), be connected with metal level (13), constituted the negative electrode of transverse semiconductor silicon controlled rectifier controller; Lower surface place at the field oxide (10) of described P type dopant well (2) and N type dopant well (3) intersection is provided with high concentration P type field implanted layer (9), it is characterized in that described low concentration N type doped semiconductor area (5) is surrounded N type doped semiconductor area (4) fully.
2. ESD evenly-triggered semiconductor silicon-controlled rectifier controller according to claim 1, it is characterized in that, the degree of depth of described low concentration N type doped semiconductor area (5) is subjected to the influence of the concentration of described N type dopant well (2), the concentration of described N type dopant well (2) is high more, and the degree of depth of described low concentration N type doped semiconductor area (5) is shallow more.
3. ESD evenly-triggered semiconductor silicon-controlled rectifier controller according to claim 1 is characterized in that, described low concentration N type doped semiconductor area (5) can be made by multiple domain shape.
4. ESD evenly-triggered semiconductor silicon-controlled rectifier controller according to claim 3 is characterized in that, making the used domain of described low concentration N type doped semiconductor area (5) is to be made of a plurality of very little discontinuous domain shapes.
5. ESD evenly-triggered semiconductor silicon-controlled rectifier controller according to claim 1 is characterized in that, is provided with high concentration P type field implanted layer (9) at the lower surface place of the field oxide (10) of described N type dopant well (2) and P type dopant well (3) intersection.
6. ESD evenly-triggered semiconductor silicon-controlled rectifier controller according to claim 1 is characterized in that, the concentration of described low concentration N type doped semiconductor area (5) is lower than described N type dopant well (2) and N type doped semiconductor area (4).
7. ESD evenly-triggered semiconductor silicon-controlled rectifier controller according to claim 1 is characterized in that, the left end of described high concentration P type field implanted layer (9) does not link to each other with described P type doped semiconductor area (6).
8. ESD evenly-triggered semiconductor silicon-controlled rectifier controller according to claim 1 is characterized in that, the right-hand member of described high concentration P type field implanted layer (9) does not link to each other with N type doped semiconductor area (7).
9. ESD evenly-triggered semiconductor silicon-controlled rectifier controller according to claim 1 is characterized in that, the concentration of described implanted layer (9) is higher than described P type doped well region (3).
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| Application Number | Priority Date | Filing Date | Title |
|---|---|---|---|
| CN 200910233695 CN101697355A (en) | 2009-10-28 | 2009-10-28 | Evenly-triggered semiconductor silicon-controlled rectifier controller for ESD |
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| Application Number | Priority Date | Filing Date | Title |
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| CN 200910233695 CN101697355A (en) | 2009-10-28 | 2009-10-28 | Evenly-triggered semiconductor silicon-controlled rectifier controller for ESD |
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Cited By (5)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| CN102290418A (en) * | 2010-06-21 | 2011-12-21 | 慧荣科技股份有限公司 | Electrostatic discharge protection device |
| CN105374868A (en) * | 2015-12-23 | 2016-03-02 | 电子科技大学 | Rapidly-started SCR device used in ESD protection |
| CN107731810A (en) * | 2017-09-06 | 2018-02-23 | 电子科技大学 | A kind of low trigger voltage MLSCR devices for ESD protection |
| CN108807373A (en) * | 2018-06-25 | 2018-11-13 | 湖南大学 | electrostatic protection device |
| CN110085573A (en) * | 2019-05-06 | 2019-08-02 | 德淮半导体有限公司 | Electrostatic protection structure, image sensor structure and preparation method |
-
2009
- 2009-10-28 CN CN 200910233695 patent/CN101697355A/en active Pending
Cited By (7)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| CN102290418A (en) * | 2010-06-21 | 2011-12-21 | 慧荣科技股份有限公司 | Electrostatic discharge protection device |
| CN102290418B (en) * | 2010-06-21 | 2015-12-16 | 慧荣科技股份有限公司 | Electrostatic discharge protective equipment |
| CN105374868A (en) * | 2015-12-23 | 2016-03-02 | 电子科技大学 | Rapidly-started SCR device used in ESD protection |
| CN107731810A (en) * | 2017-09-06 | 2018-02-23 | 电子科技大学 | A kind of low trigger voltage MLSCR devices for ESD protection |
| CN108807373A (en) * | 2018-06-25 | 2018-11-13 | 湖南大学 | electrostatic protection device |
| CN108807373B (en) * | 2018-06-25 | 2021-04-13 | 湖南大学 | Electrostatic protection device |
| CN110085573A (en) * | 2019-05-06 | 2019-08-02 | 德淮半导体有限公司 | Electrostatic protection structure, image sensor structure and preparation method |
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Open date: 20100421 |