CN101631335A - Method and device for inserting overhead into optical channel data unit frame (ODUk) - Google Patents

Method and device for inserting overhead into optical channel data unit frame (ODUk) Download PDF

Info

Publication number
CN101631335A
CN101631335A CN200910163011A CN200910163011A CN101631335A CN 101631335 A CN101631335 A CN 101631335A CN 200910163011 A CN200910163011 A CN 200910163011A CN 200910163011 A CN200910163011 A CN 200910163011A CN 101631335 A CN101631335 A CN 101631335A
Authority
CN
China
Prior art keywords
overhead
unit
optical channel
frame
overhead byte
Prior art date
Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
Granted
Application number
CN200910163011A
Other languages
Chinese (zh)
Other versions
CN101631335B (en
Inventor
鲁传好
覃尉
Current Assignee (The listed assignees may be inaccurate. Google has not performed a legal analysis and makes no representation or warranty as to the accuracy of the list.)
ZTE Corp
Original Assignee
ZTE Corp
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed by ZTE Corp filed Critical ZTE Corp
Priority to CN2009101630110A priority Critical patent/CN101631335B/en
Publication of CN101631335A publication Critical patent/CN101631335A/en
Application granted granted Critical
Publication of CN101631335B publication Critical patent/CN101631335B/en
Expired - Fee Related legal-status Critical Current
Anticipated expiration legal-status Critical

Links

Images

Abstract

The invention discloses a method and a device for inserting an overhead into an optical channel data unit frame (ODUk). The method comprises the following steps: writing an upper-layer appointed overhead byte to be inserted and a processing way of the overhead byte into an address position which corresponds to the position to be inserted of the overhead byte to be inserted in a preset storage module in a field programmable gate array (FPGA) chip; when the position to be inserted of the overhead byte to be inserted in ODU data stream arrives, inquiring the processing way of the overhead byte to be inserted, which is stored in the corresponding address position in the storage module; and if the stored overhead processing way is insertion, inserting the overhead byte to be inserted, which is stored in the address position into the current position of the ODU data stream. The device comprises an upper-layer interface control unit, an overhead processing unit and an overhead inserting unit. The invention can fully save the use quantity of FPGA chip pins and realize the flexible management of upper-layer overhead writing.

Description

A kind of method and device that expense is inserted optical channel data unit frame (ODUk)
Technical field
The present invention relates to the communications field, relate in particular to a kind of method and device that expense is inserted ODUk (Optical Data Unit, Optical Channel Data Unit-k) frame.
Background technology
In OTN (Optical Transport Network, optical transfer network), overhead processing is in occupation of important effect.It to the point-to-point of data passage, section to section and end to end the path carry out performance and malfunction monitoring, can realize the quick location of fault, can also the transport service type and network management information etc., how giving further manages business provides guiding.How to insert in the ODUk frame for expense, prior art adopts mode one to one substantially, be a kind of expense and dispose an independently pin, this expense inserted mode can cause pin to use too much, at FPGA (Field Programmable Gate Array, field programmable gate array) in the chip R﹠D process, caused very big inconvenience for follow-up pin configuration, make follow-up pin configuration process too complicated.
Summary of the invention
The invention provides and a kind of expense is inserted the method and the device of ODUk frame, when expense is inserted the ODUk frame, use chip pin too much in the prior art, cause too complicated problems of follow-up pin configuration process in order to solve.
Technical scheme of the present invention is as follows:
The invention provides and a kind of expense is inserted the method for optical channel data unit frame (ODUk), comprise step:
A, with the processing mode that is inserted into overhead byte and this overhead byte of upper strata appointment write in the fpga chip in the default memory module with described be inserted into overhead byte be inserted into address location one to one, position;
B, when being inserted into being inserted into the position and arriving of overhead byte described in the optical channel data unit data stream, inquire about the processing mode that is inserted into overhead byte of appropriate address location storage in the described memory module, overhead processing mode as if storage is insertion, and then the overhead byte that is inserted into this address location storage inserts the current location that described optical channel data unit data flows.
Preferably, also comprise step between described steps A and the step B:
Flow to when reaching at optical channel data unit data, the frame head position of wherein optical channel data unit frame (ODUk) is positioned, determine the current location of described optical channel data unit data stream according to the frame alignment result.
Preferably, the described detailed process that the frame head position of optical channel data unit frame (ODUk) is positioned is:
Step 1, from the optical channel data unit data stream that arrives the frame head data of monitoring Optical Channel Data Unit-k, after monitoring frame head data, start the frame head testing mechanism, if can both detect described frame head data in the frame head position of an ensuing continuous setting quantity optical channel data unit frame (ODUk), determine that then this frame head data position is the frame head position, otherwise, execution in step 2;
Step 2, close the frame head testing mechanism, return step 1.
Preferably, among the described step B, described when being inserted into being inserted into the position and arriving of overhead byte, if the processing mode that is inserted into overhead byte of appropriate address location storage is a transparent transmission in the described memory module, the described optical channel data unit data stream of transparent transmission then.
The present invention also provides a kind of expense is inserted the device of optical channel data unit frame (ODUk), comprising:
The high-level interface control unit is used for the overhead byte that is inserted into of upper strata appointment, corresponding overhead processing mode and is inserted into the position sending the overhead processing unit to;
The overhead processing unit, be used in the memory module that the processing mode that is inserted into overhead byte and this overhead byte with the upper strata appointment writes self internal preset with described be inserted into overhead byte be inserted into address location one to one, position, and when being inserted into being inserted into the position and arriving of overhead byte described in the optical channel data unit data stream, inquire about the processing mode that is inserted into overhead byte of appropriate address location storage in the described memory module, overhead processing mode as if storage is insertion, then the overhead byte that is inserted into of this address location storage is exported to expense insertion unit;
Expense is inserted the unit, and the overhead byte that is used for that the overhead processing unit is transmitted inserts the current location of optical channel data unit data stream.
Preferably, also comprise:
The frame alignment unit is used for the frame alignment result being sent to expense inserting the unit from the frame head position of the optical channel data unit data stream location optical channel data unit frame (ODUk) of input.
Preferably, described expense is inserted the current location that the unit also is used for determining according to the frame alignment result of frame alignment unit described optical channel data unit data stream, sends it to the overhead processing unit.
Preferably, also comprise:
Clock control cell is used to frame alignment unit, overhead processing unit and expense to insert the unit clock signal is provided.
Preferably, it is characterized in that,
Described overhead processing unit also is used for described when being inserted into being inserted into the position and arriving of overhead byte and the overhead processing mode of upper strata appointment when being transparent transmission, and the control expense is inserted the described optical channel data unit data stream of unit transparent transmission.
Beneficial effect of the present invention is as follows:
Adopt technical scheme of the present invention, compared with prior art, can more effectively utilize the internal resource of fpga chip, the use number of fully having saved the fpga chip pin simultaneously, avoided the too generation of complicated problems of follow-up pin configuration process, improve subsequent development efficient, finally reached the effect that various overhead bytes are managed on the upper strata unifiedly and flexibly.
Description of drawings
Fig. 1 is the flow chart that expense is inserted the method for ODUk frame of the present invention;
Fig. 2 is the structured flowchart that expense is inserted the device of ODUk frame of the present invention.
Embodiment
When expense is inserted the ODUk frame, use chip pin too much in the prior art for overcoming, cause too complicated problems of follow-up pin configuration process, the invention provides a kind of method and device that expense is inserted the ODUk frame.Its core concept is: the memory module of the suitable bit wide of definition and the degree of depth in fpga chip, the overhead byte and the overhead processing mode thereof that are inserted in the ODUk frame structure of upper strata appointment are write earlier in this memory module, and the write address of memory module is corresponding with the expense position of ODUk frame structure.When in the ODUk data flow, being inserted into being inserted into the position and arriving of overhead byte, read the overhead byte that is inserted into of appropriate address location storage in the memory module, be inserted into the current location of ODUk data flow.
Expense is inserted the method for ODUk frame and device gives further detailed explanation below in conjunction with each accompanying drawing to of the present invention.
See also Fig. 1, this figure of the present inventionly inserts the flow chart of the method for ODUk frame with expense, and it mainly comprises the steps:
Step S101, with the processing mode that is inserted into overhead byte and this overhead byte of upper strata appointment write in the fpga chip in the default memory module with described be inserted into overhead byte be inserted into address location one to one, position;
Particularly, default memory module is generally the RAM of the suitable bit wide and the degree of depth in the fpga chip, the processing mode that needs is write overhead byte in the ODUk frame structure and this overhead byte writes earlier among the RAM, the write address of RAM will with the expense position correspondence of ODUk frame structure.As will writing FTFL, this expense is listed as at the 2nd row and the 14th of ODUK frame structure, just can write this overhead byte and processing mode thereof that the address is the position of 01_1110b among the RAM, and 01b represents the line position of FTFL, and 1110b represents the column position of FTFL.
After step S102, the startup that resets, configuration initial work parameter produces reliable and stable ODUk clock signal, waits for the arrival of ODUk data flow.
Step S103, when the ODUk data flow arrives, the frame head position of wherein ODUk frame is positioned, determine the current location of ODUk data flow according to the frame alignment result;
In this step, the detailed process that the frame head position of ODUk frame is positioned is as follows:
According to the G.709 regulation of ITU-T, frame head (FAS) is 6 continuous byte datas, i.e. hexadecimal number " F6F6F6282828 ".When from the ODUk data flow that arrives, detecting for the first time
When " F6F6F6282828 ", start detection FAS testing mechanism confirms further whether this " F6F6F6282828 " is FAS.If can both correctly detect the existence of " F6F6F6282828 " in the FAS position of ensuing continuous 3 ODUk frames, just can conclude that these " F6F6F6282828 " data are FAS, provide the FAS Warning Mark; If after detecting " F6F6F6282828 " for the first time, and do not detect continuous 3 " F6F6F6282828 " data in the FAS position of the ODUk of back data flow, just close the FAS testing mechanism, again from detecting " F6F6F6282828 " for the first time, after detecting " F6F6F6282828 ", start the FAS testing mechanism once more.
Step S104, judge and be inserted into being inserted into the position and whether arriving of overhead byte in the ODUk data flow, if, the current location of determining the ODUk data flow is the position that is inserted into that is inserted into overhead byte, execution in step S105, otherwise, the current location of determining the ODUk data flow is a payload position, execution in step S107.
The processing mode that is inserted into overhead byte of appropriate address location storage in the default memory module in step S105, the inquiry fpga chip, the overhead processing mode of judging the upper strata appointment is for inserting or transparent transmission, if the overhead processing mode of upper strata appointment is for inserting, execution in step S106, if the overhead processing mode of upper strata appointment is a transparent transmission, execution in step S107.
Step S106, read in the fpga chip overhead byte that is inserted into of appropriate address location storage in the default memory module, be inserted in the current location of ODUk data flow, finish an overhead byte and insert operation.
Step S107, the current ODUk data flow of transparent transmission are not done any processing to the overhead byte of default memory module stored in the fpga chip.
Corresponding to said method of the present invention, the present invention and then a kind of device that expense is inserted the ODUk frame is provided, see also Fig. 2, this figure is the structured flowchart that expense is inserted the device of ODUk frame of the present invention, it mainly comprises high-level interface control unit, overhead processing unit and expense insertion unit, wherein
The high-level interface control unit for the transmission of upper strata CPU control lower floor provides an interface, is used for the overhead byte that is inserted into, the corresponding overhead processing mode of upper strata appointment and is inserted into the position sending the overhead processing unit to.
The overhead processing unit, be used in the memory module that the processing mode that is inserted into overhead byte and this overhead byte with the upper strata appointment writes self internal preset with described be inserted into overhead byte be inserted into address location one to one, position, also be used for being inserted into the processing mode that is inserted into overhead byte of inquiring about appropriate address location storage in the described memory module when position arrives that is inserted into of overhead byte in the ODUk data flow, overhead processing mode as if storage is insertion, then the overhead byte that is inserted into of this address location storage is exported to expense insertion unit.
The frame alignment unit is used for the frame alignment result being sent to expense inserting the unit from the frame head position of the ODUk data flow location ODUk frame of input.
Expense is inserted the unit, the overhead byte that is used for that the overhead processing unit is transmitted inserts the current location of ODUk data flow, also be used for determining the current location of ODUk data flow according to the frame alignment result of frame alignment unit, send it to the overhead processing unit, described expense is inserted the unit and can be postponed current ODUk data flow in the process of the current location of determining the ODUk data flow.
Further, described device also comprises:
Clock control cell is used to frame alignment unit, overhead processing unit and expense to insert the unit clock signal is provided.
Further, described overhead processing unit also is used for described when being inserted into being inserted into the position and arriving of overhead byte and the overhead processing mode of upper strata appointment when being transparent transmission, and the control expense is inserted the described ODUk data flow of unit transparent transmission.
Described expense is inserted the unit and can current ODUk data flow be postponed, so that the current location that is inserted into overhead byte insertion ODUk data flow that will send here from the overhead processing unit.
The detailed process of utilizing device realization shown in Figure 2 that expense is inserted the ODUk frame is as follows:
The overhead byte that step S201, upper strata CPU just are inserted into by the high-level interface control unit, corresponding overhead processing mode and be inserted into the position and send the overhead processing unit to.
Step S202, overhead processing unit the processing mode that is inserted into overhead byte and this overhead byte of upper strata appointment is write in the memory module of self internal preset with described be inserted into overhead byte be inserted into address location one to one, position;
Particularly, default memory module is generally the RAM of the suitable bit wide and the degree of depth in the overhead processing unit, the processing mode that needs is write overhead byte in the ODUk frame structure and this overhead byte writes earlier among the RAM, the write address of RAM will with the expense position correspondence of ODUk frame structure.As will writing FTFL, this expense is listed as at the 2nd row and the 14th of ODUk frame structure, just can write this overhead byte and processing mode thereof that the address is the position of 01_1110B among the RAM, and 01B represents the line position of FTFL, and 1110B represents the column position of FTFL.
After step S203, the startup that resets, the high-level interface control unit is each configuration of cells initial work parameter, and the configurable clock generator control unit makes it produce reliable and stable ODUk clock signal, waits for the arrival of ODUk data flow.
Step S204, when the ODUk data flow arrives, the frame alignment unit positions the frame head position of wherein ODUk frame, the frame alignment result is sent to expense insert the unit;
In this step, the frame alignment unit is as follows to the detailed process that the frame head position of ODUk frame positions:
According to the G.709 regulation of ITU-T, frame head (FAS) is 6 continuous byte datas, i.e. hexadecimal number " F6F6F6282828 ".When the frame alignment unit detected " F6F6F6282828 " for the first time from the ODUk data flow that arrives, start detection FAS testing mechanism confirmed further whether this " F6F6F6282828 " is FAS.If can both correctly detect the existence of " F6F6F6282828 " in the frame alignment unit, FAS position of ensuing continuous 3 ODUk frames, just can conclude that these " F6F6F6282828 " data are FAS, provide the FAS Warning Mark; If the frame alignment unit is after detecting " F6F6F6282828 " for the first time, do not detect continuous 3 " F6F6F6282828 " data in the FAS position of the ODUk of back data flow, just close the FAS testing mechanism, again from detecting " F6F6F6282828 " for the first time, after detecting " F6F6F6282828 ", start the FAS testing mechanism once more.
Step S205, expense are inserted the unit according to the current location that the frame alignment result of frame alignment unit determines the ODUk data flow, send it to the overhead processing unit.
Step S206, overhead processing unit judge according to the current location of the ODUk data flow that receives and are inserted into being inserted into the position and whether arriving of overhead byte in the ODUk data flow, if, the current location of determining the ODUk data flow is the position that is inserted into that is inserted into overhead byte, execution in step S207, otherwise, the current location of determining the ODUk data flow is a payload position, execution in step S209.
The processing mode that is inserted into overhead byte of appropriate address location storage in the memory module of step S207, overhead processing unit inquiry self internal preset, the overhead processing mode of judging upper strata CPU appointment is for inserting or transparent transmission, if the overhead processing mode of upper strata CPU appointment is for inserting, execution in step S208, if the overhead processing mode of upper strata appointment is a transparent transmission, execution in step S209.
Step S208, overhead processing unit read the overhead byte that is inserted into of appropriate address location storage in the memory module of self internal preset, send it to expense and insert the unit, in the current location that is inserted into overhead byte insertion ODUk data flow that expense insertion unit will receive, finish an overhead byte and insert operation.
Step S209, overhead processing unit controls expense are inserted the current ODUk data flow of unit transparent transmission, the overhead byte of storing in the memory module are not done any processing.
Obviously, those skilled in the art can carry out various changes and modification to the present invention and not break away from the spirit and scope of the present invention.Like this, if of the present invention these are revised and modification belongs within the scope of claim of the present invention and equivalent technologies thereof, then the present invention also is intended to comprise these changes and modification interior.

Claims (9)

1, a kind of expense is inserted the method for optical channel data unit frame (ODUk), it is characterized in that, comprise step:
A, with the processing mode that is inserted into overhead byte and this overhead byte of upper strata appointment write in the fpga chip in the default memory module with described be inserted into overhead byte be inserted into address location one to one, position;
B, when being inserted into being inserted into the position and arriving of overhead byte described in the optical channel data unit data stream, inquire about the processing mode that is inserted into overhead byte of appropriate address location storage in the described memory module, overhead processing mode as if storage is insertion, and then the overhead byte that is inserted into this address location storage inserts the current location that described optical channel data unit data flows.
2, method according to claim 1 is characterized in that, also comprises step between described steps A and the step B:
Flow to when reaching at optical channel data unit data, the frame head position of wherein optical channel data unit frame (ODUk) is positioned, determine the current location of described optical channel data unit data stream according to the frame alignment result.
3, as method as described in the claim 2, it is characterized in that the described detailed process that the frame head position of optical channel data unit frame (ODUk) is positioned is:
Step 1, from the optical channel data unit data stream that arrives the frame head data of monitoring Optical Channel Data Unit-k, after monitoring frame head data, start the frame head testing mechanism, if can both detect described frame head data in the frame head position of an ensuing continuous setting quantity optical channel data unit frame (ODUk), determine that then this frame head data position is the frame head position, otherwise, execution in step 2;
Step 2, close the frame head testing mechanism, return step 1.
4, method according to claim 1, it is characterized in that, among the described step B, described when being inserted into being inserted into the position and arriving of overhead byte, if the processing mode that is inserted into overhead byte of appropriate address location storage is a transparent transmission in the described memory module, then the described optical channel data unit data of transparent transmission flows.
5, a kind of expense is inserted the device of optical channel data unit frame (ODUk), it is characterized in that, comprising:
The high-level interface control unit is used for the overhead byte that is inserted into of upper strata appointment, corresponding overhead processing mode and is inserted into the position sending the overhead processing unit to;
The overhead processing unit, be used in the memory module that the processing mode that is inserted into overhead byte and this overhead byte with the upper strata appointment writes self internal preset with described be inserted into overhead byte be inserted into address location one to one, position, and when being inserted into being inserted into the position and arriving of overhead byte described in the optical channel data unit data stream, inquire about the processing mode that is inserted into overhead byte of appropriate address location storage in the described memory module, overhead processing mode as if storage is insertion, then the overhead byte that is inserted into of this address location storage is exported to expense insertion unit;
Expense is inserted the unit, and the overhead byte that is used for that the overhead processing unit is transmitted inserts the current location of optical channel data unit data stream.
6, device as claimed in claim 5 is characterized in that, also comprises:
The frame alignment unit is used for the frame alignment result being sent to expense inserting the unit from the frame head position of the optical channel data unit data stream location optical channel data unit frame (ODUk) of input.
7, device as claimed in claim 6 is characterized in that, described expense is inserted the current location that the unit also is used for determining according to the frame alignment result of frame alignment unit described optical channel data unit data stream, sends it to the overhead processing unit.
8, device as claimed in claim 6 is characterized in that, also comprises:
Clock control cell is used to frame alignment unit, overhead processing unit and expense to insert the unit clock signal is provided.
9, device as claimed in claim 6 is characterized in that,
Described overhead processing unit also is used for described when being inserted into being inserted into the position and arriving of overhead byte and the overhead processing mode of upper strata appointment when being transparent transmission, and the control expense is inserted the described optical channel data unit data stream of unit transparent transmission.
CN2009101630110A 2009-08-19 2009-08-19 Method and device for inserting overhead into optical channel data unit frame (ODUk) Expired - Fee Related CN101631335B (en)

Priority Applications (1)

Application Number Priority Date Filing Date Title
CN2009101630110A CN101631335B (en) 2009-08-19 2009-08-19 Method and device for inserting overhead into optical channel data unit frame (ODUk)

Applications Claiming Priority (1)

Application Number Priority Date Filing Date Title
CN2009101630110A CN101631335B (en) 2009-08-19 2009-08-19 Method and device for inserting overhead into optical channel data unit frame (ODUk)

Publications (2)

Publication Number Publication Date
CN101631335A true CN101631335A (en) 2010-01-20
CN101631335B CN101631335B (en) 2011-12-28

Family

ID=41576226

Family Applications (1)

Application Number Title Priority Date Filing Date
CN2009101630110A Expired - Fee Related CN101631335B (en) 2009-08-19 2009-08-19 Method and device for inserting overhead into optical channel data unit frame (ODUk)

Country Status (1)

Country Link
CN (1) CN101631335B (en)

Cited By (2)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
WO2015196682A1 (en) * 2014-06-27 2015-12-30 中兴通讯股份有限公司 Method and device for extracting and inserting oduflex overhead
CN110661745A (en) * 2018-06-28 2020-01-07 中兴通讯股份有限公司 Overhead transmission method, device, equipment and computer readable storage medium

Family Cites Families (5)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
US5257261A (en) * 1990-07-27 1993-10-26 Transwitch Corporation Methods and apparatus for concatenating a plurality of lower level SONET signals into higher level sonet signals
CN100336340C (en) * 2003-06-24 2007-09-05 中兴通讯股份有限公司 Multi-channel network management apparatus and method for transmission equipment
CN100493075C (en) * 2003-11-06 2009-05-27 西安电子科技大学 Method for hybrid transmission of variable-length data packet and fixed length cell, and adaptation device
CN1791057B (en) * 2004-12-15 2011-06-15 华为技术有限公司 Method for transmitting data service in OTN and its device
CN1838575B (en) * 2005-03-21 2010-12-08 中兴通讯股份有限公司 Method for carrying out B3 byte regeneration after high capacity time-division crossing

Cited By (4)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
WO2015196682A1 (en) * 2014-06-27 2015-12-30 中兴通讯股份有限公司 Method and device for extracting and inserting oduflex overhead
RU2647873C1 (en) * 2014-06-27 2018-03-21 ЗетТиИ Корпорейшн Method and device for extracting and inserting of oduflex service information
CN110661745A (en) * 2018-06-28 2020-01-07 中兴通讯股份有限公司 Overhead transmission method, device, equipment and computer readable storage medium
CN110661745B (en) * 2018-06-28 2022-07-08 中兴通讯股份有限公司 Overhead transmission method, device, equipment and computer readable storage medium

Also Published As

Publication number Publication date
CN101631335B (en) 2011-12-28

Similar Documents

Publication Publication Date Title
CN108228513B (en) Intelligent serial port communication device based on FPGA framework
CN101894060B (en) Fault detection method and modular device
JP5213965B2 (en) Controller for multi-bit NAND flash memory per cell emulating single-bit NAND flash memory per cell
CN106326155B (en) A kind of multibus data record and playback reproducer and method
CN105468547A (en) AXI bus based convenient configurable frame data access control system
CN102541458B (en) A kind of method improving data writing speed of electronic hard disk
CN105573239A (en) High speed backboard bus communication control device and method
CN103500154B (en) A kind of serial bus interface chip, serial bus transmission system and method
CN102103565B (en) Advanced high-performance system bus connecting device and method
CN101631335B (en) Method and device for inserting overhead into optical channel data unit frame (ODUk)
CN105573711A (en) Data caching methods and apparatuses
CN101187896A (en) On-spot programmable gate array data cache management method
CN111158633A (en) DDR3 multichannel read-write controller based on FPGA and control method
CN100543873C (en) A kind of apparatus and method that realize data rate transition based on dual port RAM
CN104035731A (en) Storage head node of blade server
CN105788636A (en) EMMC controller based on parallel multichannel structure
CN201149654Y (en) Single-chip I/O mouth time-sharing multiplexing control circuit
CN103560982B (en) Bag apparatus and method is cut for what Interlaken enhancement mode was dispatched
CN104834606A (en) Heterogeneous confusion hierarchical memory device
TW200717234A (en) Programmable memory and accessing method of the same
CN106445679A (en) Control system program space sharing apparatus and method
CN101324863A (en) Device and method for controlling synchronous static memory
CN100561596C (en) The method of accessing semiconductor memory spare and electronic message unit
CN208548147U (en) Four-way solid state hard disk and solid state hard disk system based on PCI-E interface
CN104281546A (en) Wireless communication apparatus and method

Legal Events

Date Code Title Description
C06 Publication
PB01 Publication
C10 Entry into substantive examination
SE01 Entry into force of request for substantive examination
C14 Grant of patent or utility model
GR01 Patent grant
CF01 Termination of patent right due to non-payment of annual fee
CF01 Termination of patent right due to non-payment of annual fee

Granted publication date: 20111228

Termination date: 20170819