CN208548147U - Four-way solid state hard disk and solid state hard disk system based on PCI-E interface - Google Patents
Four-way solid state hard disk and solid state hard disk system based on PCI-E interface Download PDFInfo
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- CN208548147U CN208548147U CN201820912705.4U CN201820912705U CN208548147U CN 208548147 U CN208548147 U CN 208548147U CN 201820912705 U CN201820912705 U CN 201820912705U CN 208548147 U CN208548147 U CN 208548147U
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Abstract
The utility model discloses a kind of four-way solid state hard disk based on PCI-E interface, the solid state hard disk include: include: Flash memory chip, be equipped with several NAND Flash units；Master control Flash interface, connect with the Flash memory chip, and the master control Flash interface is configured to channel 0, channel 1, channel 2 and channel 3 in parallel；Main control chip is connect with the master control Flash interface, passes through the load of the channel 0, channel 1, the parallel allocation data in channel 2 and channel 3 in the Flash memory chip；PCI-E interface is connected with the main control chip.A kind of solid state hard disk system is also disclosed in the utility model.The utility model solves the problems, such as route cabling complexity, the higher cost of solid state hard disk in the prior art.
Description
Technical field
The utility model relates to solid state hard disk technical field, in particular to a kind of four-way solid-state based on PCI-E interface
Hard disk and solid state hard disk system.
Background technique
Solid state hard disk (Solid State Drive), abbreviation solid-state disk (SSD) are with solid-state electronic storage chip array
And manufactured hard disk, including main control chip and storage chip (FLASH chip, dram chip) etc..Entire solid state hard disk structure without
Mechanical device is entirely made of electronic chip and circuit board.Communication channel (Communication Channel) is that data pass
Defeated access generallys use the design of 8 channels, since each channel is all correspondingly arranged on the cabling of multiple pins, leads to line in this way
Road cabling is complicated, and multiple plate layers is needed to realize cabling design.
Utility model content
The main purpose of the utility model is to propose a kind of four-way solid state hard disk and solid state hard disk based on PCI-E interface
System, it is intended to solve the problems, such as route cabling complexity, the higher cost of solid state hard disk in the prior art.
To achieve the above object, the utility model proposes a kind of four-way solid state hard disk based on PCI-E interface, and the solid-state is hard
Disk includes:
Flash memory chip is equipped with several NAND Flash units；
Master control Flash interface, connect with the Flash memory chip, and the master control Flash interface is configured in parallel lead to
Road 0, channel 1, channel 2 and channel 3；
Main control chip is connect with the master control Flash interface, parallel by the channel 0, channel 1, channel 2 and channel 3
Load of the allocation data in the Flash memory chip；
PCI-E interface is connected with the main control chip.
It preferably, further include the cache chip being connected with the main control chip, for data to be stored to be written and is packaged defeated
Out to the Flash memory chip.
It preferably, further include the power supply core being connect respectively with the main control chip, Flash memory chip and cache chip
Piece, for providing operating voltage to the main control chip, Flash memory chip and cache chip.
Preferably, the power supply chip includes: the first power supply chip, second source chip, third power supply chip and the 4th
Power supply chip, first power supply chip, second source chip, third power supply chip and the 4th power supply chip supply voltage point
It Wei not 3.3V, 1.1V, 1.8V and 1.5V；First power supply chip, second source chip and third power supply chip respectively with master control core
Piece connection, the first power supply chip and third power supply chip are also connect with Flash memory chip respectively, the 4th power supply chip and caching
Chip connection.
Preferably, the channel 0, channel 1, channel 2 and channel 3 are equipped with:
Data line, quantity are 8, and the data line is used for transmission data；
Control line, quantity are 7, and the control line is used to control the working condition of each NAND Flash unit；
Chip select line, quantity are 4, and the chip select line is for choosing NAND Flash unit.
Preferably, the cache chip is DDR3 caching.
The utility model also proposes that a kind of solid state hard disk system solid state hard disk system includes host and based on PCI-E interface
Four-way solid state hard disk, the host connect with the PCI-E interface, in which:
The solid state hard disk includes:
Flash memory chip is equipped with several NAND Flash units；
Master control Flash interface, connect with the Flash memory chip, and the master control Flash interface is configured in parallel lead to
Road 0, channel 1, channel 2 and channel 3；
Main control chip is connect with the master control Flash interface, parallel by the channel 0, channel 1, channel 2 and channel 3
Load of the allocation data in the Flash memory chip；
PCI-E interface is connected with the main control chip.
The utility model, which passes through, will be configured to originally the master control in 8 channels in the four-way solid state hard disk based on PCI-E interface
Flash interface is changed to the design of 4 channels, is existed by main control chip by channel 0, channel 1, the parallel allocation data in channel 2 and channel 3
Load in Flash memory chip, due to reducing the quantity in channel, to reduce the complexity of pin wiring and draw
Foot dispersion is more easier PCB circuit drawing board, reduces the cost of solid state hard disk.
Detailed description of the invention
Fig. 1 is the functional block diagram of one embodiment of solid state hard disk system of the utility model；
Fig. 2 is the structural schematic diagram of one embodiment of four-way solid state hard disk based on PCI-E interface of the utility model.
Specific embodiment
The embodiments of the present invention are described more fully below, the example of embodiment is shown in the accompanying drawings, wherein from beginning extremely
Same or similar label indicates same or similar element or element with the same or similar functions eventually.Below with reference to
The embodiment of attached drawing description is exemplary, it is intended to for explaining the utility model, and should not be understood as to the utility model
Limitation, based on the embodiments of the present invention, those of ordinary skill in the art institute without creative efforts
The every other embodiment obtained, fall within the protection scope of the utility model.
In order to solve the above technical problems, the utility model proposes a kind of four-way solid state hard disk based on PCI-E interface.Ginseng
According to Fig. 1 and Fig. 2, which includes: Flash memory chip 10, is equipped with several NAND Flash units.Master control Flash connects
Mouth 20, connect with Flash memory chip 10, and master control Flash interface 20 is configured to channel 0, channel 1, channel 2 and channel in parallel
3.Main control chip 30 is connect with master control Flash interface 20, is existed by channel 0, channel 1, the parallel allocation data in channel 2 and channel 3
Load in Flash memory chip 10.PCI-E interface 40 is connect with main control chip 30.
In the present embodiment, Flash memory chip 10 and main control chip 30 pass through master control Flash interface 20 and main control chip 30
Connection accesses several NAND being arranged in Flash memory chip 10 by master control 40 via master control Flash interface 20
Flash unit.NAND Flash unit is a kind of storage equipment of monolith read-write, can provide high cell density, Ke Yida
To high storage density, and be written and the speed of erasing also quickly.Meanwhile NAND Flash unit also has non-volatile memories
Characteristic, remained to after power-off save data.
In order to reduce the complexity of pin wiring, will be configured originally in the four-way solid state hard disk based on PCI-E interface
It is changed to the design of 4 channels for the master control Flash interface in 8 channels, due to reducing number of channels, so that pin more disperses, is easy
Drawing board, while also reducing the cost of solid state hard disk.
In addition, the size of solid state hard disk can accomplish smaller, it can accomplish 2269 specifications by 2280 original specifications, even
It can accomplish 2242 specifications, i.e. width is 22mm, a length of 42mm, can be adapted for more and more frivolous laptop, plate electricity
Brain is even applied on mobile phone.
It in a preferred embodiment, further include the cache chip 50 being connect with main control chip 30, for number to be stored to be written
According to and be packaged output to Flash memory chip 10.In the present embodiment, the uplink of main control chip 30 passes through cache chip 50 and host
CPU be connected, downlink is connected by channel 0, channel 1, channel 2 and channel 3 with Flash memory chip 10.Work as data to be stored
When very big, cache chip 50 can play the role of adjusting storage pressure.
In a preferred embodiment, as shown in Figure 1, further including gentle with main control chip 30, Flash memory chip 10 respectively
The power supply chip 60 for depositing the connection of chip 50, for providing work to main control chip 30, Flash memory chip 10 and cache chip 50
Voltage.Power supply chip 60 includes: the first power supply chip 61, second source chip 62, third power supply chip 63 and the 4th power supply core
Piece 64, the first power supply chip 61, second source chip 62, third power supply chip 63 and the 4th power supply chip 64 supply voltage point
It Wei not 3.3V, 1.1V, 1.8V and 1.5V.First power supply chip 61, second source chip 62 and third power supply chip 63 respectively with
Main control chip 30 connects, and the first power supply chip 61 and third power supply chip 63 are also connect with Flash memory chip 10 respectively, and the 4th
Power supply chip 64 is connect with cache chip 50.
In the present embodiment, different module on main control chip 30, required operating voltage is different, such as the first power supply chip
61 power for the I/O module to main control chip 30, and second source chip 62 is used to power to the kernel of main control chip 30, third
Power supply chip 63 is then powered for the Flash I/O module to main control chip 30.Likewise, different in Flash memory chip 10
Module, required operating voltage is also different, for example the first power supply chip 61 is also used to supply to the I/O module of Flash memory chip 10
Electricity, third power supply chip 63 are also used to the Flash I/O module power supply of Flash memory chip 10.4th power supply chip 64 is used for
It powers to cache chip 50.In addition, the electric sequence of power supply chip 60 is followed successively by second source chip 62, the first power supply chip
61, third power supply chip 63 and the 4th power supply chip 64.
In a preferred embodiment, channel 0, channel 1, channel 2 and channel 3 are equipped with: data line, and quantity is 8, number
Data are used for transmission according to line；Control line, quantity are 7, and control line is used to control the work shape of each NAND Flash unit
State；Chip select line, quantity are 4, and chip select line is for choosing NAND Flash unit.In the present embodiment, channel 0, leads to channel 1
One or more pins in road 2 and channel 3 are used for transmission several NAND Flash units in instruction Flash memory chip 10
The signal of quantity.
In a preferred embodiment, cache chip is DDR3 caching.In the present embodiment, when data store, DDR3 is first written
Caching, rear disposable packing is to Flash memory chip 10.DDR protocol conversion is realized at Flash agreement by main control chip 30
Direct access of the CPU of host to Flash memory chip 10 improves memory rate so as to reduce system access delays.
The utility model also proposes a kind of solid state hard disk system, which includes that host and aforementioned solid are hard
Disk, host are connect with aforementioned PCI-E interface.The utility model solid state hard disk system technical solution passes through setting host and aforementioned solid
State hard disk contains whole embodiments of aforementioned solid hard disk, whole beneficial effects with aforementioned solid hard disk, herein not
It repeats.
Therefore above part for being only the utility model or preferred embodiment, either text or attached drawing cannot all limit
The range of the utility model protection processed is illustrated under all designs with one entirety of the utility model using the utility model
Equivalent structure transformation made by book and accompanying drawing content, or directly/be used in other related technical areas indirectly and be included in this
In the range of utility model protection.
Claims (7)
1. a kind of four-way solid state hard disk based on PCI-E interface characterized by comprising
Flash memory chip is equipped with several NAND Flash units；
Master control Flash interface, connect with the Flash memory chip, the master control Flash interface be configured to channel 0 in parallel,
Channel 1, channel 2 and channel 3；
Main control chip is connect with the master control Flash interface, is deployed parallel by the channel 0, channel 1, channel 2 and channel 3
Load of the data in the Flash memory chip；
PCI-E interface is connected with the main control chip.
2. the four-way solid state hard disk based on PCI-E interface as described in claim 1, which is characterized in that further include with it is described
The cache chip of main control chip connection, for data to be stored to be written and is packaged output to the Flash memory chip.
3. the four-way solid state hard disk based on PCI-E interface as claimed in claim 2, which is characterized in that further include respectively with
The power supply chip that the main control chip, Flash memory chip and cache chip connect, for being deposited to the main control chip, Flash
It stores up chip and cache chip provides operating voltage.
4. the four-way solid state hard disk based on PCI-E interface as claimed in claim 3, which is characterized in that the power supply chip
It include: the first power supply chip, second source chip, third power supply chip and the 4th power supply chip, first power supply chip,
The supply voltage of two power supply chips, third power supply chip and the 4th power supply chip is respectively 3.3V, 1.1V, 1.8V and 1.5V；The
One power supply chip, second source chip and third power supply chip are connect with main control chip respectively, the first power supply chip and third electricity
Source chip is also connect with Flash memory chip respectively, and the 4th power supply chip is connect with cache chip.
5. the four-way solid state hard disk based on PCI-E interface as described in claim 1, which is characterized in that the channel 0 leads to
Road 1, channel 2 and channel 3 are equipped with:
Data line, quantity are 8, and the data line is used for transmission data；
Control line, quantity are 7, and the control line is used to control the working condition of each NAND Flash unit；
Chip select line, quantity are 4, and the chip select line is for choosing NAND Flash unit.
6. the four-way solid state hard disk based on PCI-E interface as claimed in claim 2, which is characterized in that the cache chip
For DDR3 caching.
7. a kind of solid state hard disk system, which is characterized in that including host and it is as claimed in any one of claims 1 to 6 be based on PCI-E
The four-way solid state hard disk of interface, the host are connect with the PCI-E interface.
Priority Applications (1)
| Application Number | Priority Date | Filing Date | Title |
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| CN201820912705.4U CN208548147U (en) | 2018-06-12 | 2018-06-12 | Four-way solid state hard disk and solid state hard disk system based on PCI-E interface |
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| Application Number | Priority Date | Filing Date | Title |
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| CN201820912705.4U CN208548147U (en) | 2018-06-12 | 2018-06-12 | Four-way solid state hard disk and solid state hard disk system based on PCI-E interface |
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Cited By (1)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| CN110503955A (en) * | 2019-08-30 | 2019-11-26 | 惠州高盛达科技有限公司 | Intelligent sound control system |
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2018
- 2018-06-12 CN CN201820912705.4U patent/CN208548147U/en active Active
Cited By (2)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| CN110503955A (en) * | 2019-08-30 | 2019-11-26 | 惠州高盛达科技有限公司 | Intelligent sound control system |
| CN110503955B (en) * | 2019-08-30 | 2022-06-10 | 惠州高盛达科技有限公司 | Intelligent voice control system |
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Address after: 518000 floors 1-3 and 4 of buildings 4 and 8, zone 2, Zhongguan honghualing Industrial South Zone, No. 1213 Liuxian Avenue, Pingshan community, Taoyuan Street, Nanshan District, Shenzhen, Guangdong Patentee after: BIWIN STORAGE TECHNOLOGY Co.,Ltd. Address before: 518000 1st, 2nd, 4th and 5th floors of No.4 factory building, tongfuyu industrial town, Taoyuan Street, Nanshan District, Shenzhen City, Guangdong Province Patentee before: BIWIN STORAGE TECHNOLOGY Co.,Ltd. |