CN101577269B - 多芯片模块及选择衬垫共用方法 - Google Patents

多芯片模块及选择衬垫共用方法 Download PDF

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CN101577269B
CN101577269B CN2008102112078A CN200810211207A CN101577269B CN 101577269 B CN101577269 B CN 101577269B CN 2008102112078 A CN2008102112078 A CN 2008102112078A CN 200810211207 A CN200810211207 A CN 200810211207A CN 101577269 B CN101577269 B CN 101577269B
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邱显期
魏睿民
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MediaTek Inc
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Abstract

本发明揭示一种多芯片模块及选择衬垫共用方法，所述多芯片模块包含：第一裸晶支持多个预定的功能；第二裸晶耦接第一裸晶，包含用于结合选件技术的至少一选择衬垫；其中，所述结合选件技术使得第一裸晶依据第二裸晶的至少一选择衬垫的结合状态选择性地执行预定的功能中的一个。本发明中，第一裸晶利用第二裸晶的选择衬垫，进而减少多芯片模块中选择衬垫的数目，使得多芯片模块可具有更多的信号衬垫以供使用，也可减小第一裸晶的尺寸大小。

Description

多芯片模块及选择衬垫共用方法
技术领域
本发明涉及一种多芯片模块(Multi-chip Module，MCM)，尤其是关于具有第一裸晶利用第二裸晶的选择衬垫以用于结合选件(Bonding Options)的多芯片模块及相关方法。
背景技术
在集成电路设计中，结合选件技术提供可选择性地致能(Enabling)集成电路的部分功能来选择集成电路中的不同应用。通常，选择衬垫是连接至一高电压电位(供应电源电压)或是连接至一低电压电位(接地电压)来实现功能选择。例如，依据提供至闪存裸晶(Flash Die)的选择衬垫的电压电位，闪存裸晶是可被设置于引导扇区的顶部模式(Top Mode)或者底部模式(Bottom Mode)。
因为选择衬垫所占用的面积是大于芯片所占用的面积，如何减少选择衬垫的数目以达到减少封装尺寸已成为领域中的重要问题。
发明内容
为解决以上存在的技术问题，特提供以下技术方案：
本发明揭示一种多芯片模块，包含：第一裸晶与第二裸晶。第一裸晶支持多个预定的功能；第二裸晶耦接第一裸晶，包含用于结合选件技术的至少一选择衬垫；其中，所述结合选件技术使得第一裸晶依据第二裸晶的至少一选择衬垫的结合状态来选择性地执行多个预定的功能中的一个。
本发明还揭示一种选择衬垫共用方法，应用于多芯片模块，其特征在于，所述选择衬垫共用方法包含：使多芯片模块具有第一裸晶与第二裸晶，其中第一裸晶支持多个预定的功能，第二裸晶耦接至第一裸晶，所述第二裸晶包含为结合选件技术所设定的至少一选择衬垫；以及所述结合选件技术使第一裸晶依据第二裸晶的至少一选择衬垫的结合状态选择性地执行多个预定的功能中的一个，以实现所述第一裸晶与所述第二裸晶共用所述选择衬垫。
第一裸晶利用第二裸晶的选择衬垫，进而减少多芯片模块中选择衬垫的数目，使得多芯片模块可具有更多的信号衬垫以供使用，也可减小第一裸晶的尺寸大小。
附图说明
图1是例示本发明提供实施例多芯片模块的示意图。
图2是例示将图1所示的多芯片模块设置于一封装中的示意图。
具体实施方式
在说明书及权利有要求书当中使用了某些词汇来指称特定的元件。所属领域中具有通常知识者应可理解，硬件制造商可能会用不同的名词来称呼同样的组件。本说明书及权利有要求书并不以名称的差异来作为区分元件的方式，而是以元件在功能上的差异来作为区分的准则。在通篇说明书及后续的请求项当中所提及的“包含”是为一开放式的用语，故应解释成“包含但不限定于”。另外，“耦接”一词在此包含任何直接及间接的电气连接方式。因此，若文中描述第一装置耦接于第二装置，则代表第一装置可直接电气连接于该第二装置，或通过其它装置或连接方式间接地电气连接至第二装置。
请参阅图1，图1是例示本发明提供实施例多芯片模块的示意图。多芯片模块100包括一第一裸晶110与一第二裸晶120。第一裸晶110与第二裸晶120分别包含用于传递信号的多个信号衬垫112与多个信号衬垫122。第一裸晶110的多个信号衬垫112与第二裸晶120的多个信号衬垫122是通过多个焊线130相连接，以使第一裸晶110能够与第二裸晶120进行通信。以下将对多芯片模块100作详细说明。
在本实施例中，第一裸晶110是包含一处理器核心(图未示)的核心裸晶，处理器核心例如：进阶精简指令集机器(Advanced RISCMachine，ARM)、数字信号处理器、微处理器等。第二裸晶120为一存储器裸晶，例如：闪存裸晶、动态随机存储器裸晶等。第二裸晶120包含一选择衬垫124。选择衬垫124的结合状态决定第二裸晶120所处模式。
请参阅图2，图2是例示将图1所示的多芯片模块100设置于一封装200中的示意图。以第二裸晶120是为一快闪裸晶来举例说明，如图2中(a)所示，第二裸晶120的选择衬垫124是连接至供应电源电压VDD，则第二裸晶120是被设置处于顶部模式中。如图2中(b)所示，第二裸晶120的选择衬垫124是连接至接地电压GND，则第二裸晶120是被设置处于底部模式中。
此外，不仅可依据选择衬垫124的结合状态来决定第二裸晶120的模式，而且可基于选择衬垫124的结合状态来决定一装置识别码。因此，第一裸晶110可利用处理器核心来存取第二裸晶120的装置识别码，以获知第二裸晶120的选择衬垫124的结合状态。并且，第一裸晶110能够依据第二裸晶120的选择衬垫124的结合状态来执行预定的功能。例如，第一裸晶110支持两种预定的功能FUN1与FUN2。如果第一裸晶110通过存取第二裸晶120的装置识别码确定选择衬垫124是连接至供应电源电压VDD，则第一裸晶110执行预定的功能FUN1。如果第一裸晶110通过存取第二裸晶120的装置识别码确定第二裸晶120的选择衬垫124是连接至接地电压GND，如图2中(b)所示，则第一裸晶110执行预定的功能FUN2。
需要注意的是，在以上实施方式中，第一裸晶110不具有选择衬垫，但是并非对本发明的限制。在其它实施方式中，第一裸晶110可以包含一个或者多个并不充足的选择衬垫。另外，在以上实施方式中第一裸晶110和第二裸晶120可分别是核心裸晶和存储器裸晶，同样并非对本发明的限制。只要第一裸晶能够依据第二裸晶的选择衬垫的结合状态执行预定的功能，则此多芯片模块符合本发明的精神。
在本发明揭示的多芯片模块中，因为一裸晶(例如：第一裸晶)能够利用另一裸晶(例如：第二裸晶)的选择衬垫，所以可减少多芯片模块中的选择衬垫的数目，甚至减少至零。进而多芯片模块可具有更多的信号衬垫以供使用，也可减小第一裸晶的尺寸大小。
本发明说明书提供不同的实施例来说明本发明不同实施方式的技术特征。其中，实施例中的各元件的配置仅为方便说明本发明，并非用以限制本发明。凡根据本发明所做的均等变化与修饰，都属于本发明的保护范围。

Claims (8)

1.一种多芯片模块，包含：
第一裸晶，支持多个预定的功能；以及
第二裸晶，耦接所述第一裸晶，包含用于结合选件技术的至少一选择衬垫；
其中，所述结合选件技术使得所述第一裸晶依据所述第二裸晶的所述至少一选择衬垫的结合状态来选择性地执行所述多个预定的功能中的一个。
2.如权利要求1所述的多芯片模块，其特征在于，所述第一裸晶不具有用于结合选件技术的选择衬垫，或所述第一裸晶所具有的用于结合选件技术的一个或多个选择衬垫并不充足。
3.如权利要求1所述的多芯片模块，其特征在于，所述第一裸晶包含处理器核心。
4.如权利要求1所述的多芯片模块，其特征在于，所述第二裸晶是具有装置识别码的存储器，所述装置识别码是基于所述至少一选择衬垫的所述结合状态；所述第一裸晶存取所述装置识别码以执行对应所述装置识别码的所述多个预定的功能中的一个。
5.一种选择衬垫共用方法，应用于多芯片模块，其特征在于，所述选择衬垫共用方法包含：
使所述多芯片模块具有第一裸晶与第二裸晶，其中所述第一裸晶支持多个预定的功能，所述第二裸晶耦接至所述第一裸晶，所述第二裸晶包含为结合选件技术所设定的至少一选择衬垫；以及
其中，所述结合选件技术使所述第一裸晶依据所述第二裸晶的所述至少一选择衬垫的结合状态选择性地执行所述多个预定的功能中的一个，以实现所述第一裸晶与所述第二裸晶共用所述选择衬垫。
6.如权利要求5所述的选择衬垫共用方法，其特征在于，所述使所述多芯片模块具有第一裸晶与第二裸晶的步骤包含：使得所述第一裸晶不具有用于结合选件技术的选择衬垫，或使得所述第一裸晶所具有的用于结合选件技术的一个或多个选择衬垫并不充足。
7.如权利要求5所述的选择衬垫共用方法，其特征在于，所述使所述多芯片模块具有第一裸晶与第二裸晶的步骤包含：使得在所述多芯片模块中的所述第一裸晶包含处理器核心。
8.如权利要求5所述的选择衬垫共用方法，其特征在于，所述使所述多芯片模块具有第一裸晶与第二裸晶的步骤包含：使得所述第二裸晶利用具有装置识别码的存储器裸晶，所述装置识别码是基于所述选择衬垫的所述结合状态；以及
所述使所述第一裸晶依据所述第二裸晶的所述至少一选择衬垫的结合状态执行所述预定的功能中的一个的步骤包含：利用所述第一裸晶存取所述装置识别码以执行对应所述装置识别码的所述多个预定的功能中的一个。
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