CN101536183B - 引线框条带、半导体装置以及用于制造该引线框的方法 - Google Patents

引线框条带、半导体装置以及用于制造该引线框的方法 Download PDF

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CN101536183B
CN101536183B CN2006800435613A CN200680043561A CN101536183B CN 101536183 B CN101536183 B CN 101536183B CN 2006800435613 A CN2006800435613 A CN 2006800435613A CN 200680043561 A CN200680043561 A CN 200680043561A CN 101536183 B CN101536183 B CN 101536183B
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layer
base metal
lead frame
gold layer
thickness
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CN101536183A (zh
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唐纳德·C·阿博特
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Texas Instruments Inc
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Texas Instruments Inc
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Abstract

本发明提供一种具有引线框的半导体装置，所述引线框具有由基底金属(105)制成的结构，其中所述结构由芯片安装垫(402)和多个引线区段(403)组成。覆盖所述基底金属的依次是：镍层(301)，其位于所述基底金属上；以及连续的贵金属层，其由位于所述镍层上的金层(201)和位于所述金层上的最外钯层(202)组成。半导体芯片(410)附接到所述芯片安装垫，且导电连接(412)从所述芯片跨接到所述引线区段。聚合包封化合物(420)覆盖所述芯片、所述连接和所述引线区段的部分。在具有直侧边的QFN装置中，所述化合物形成与未经包封的引线框表面上的最外钯层共面的表面(421)。

Description

引线框条带、半导体装置以及用于制造该引线框的方法
技术领域
本发明大体上涉及半导体装置和工艺的领域，且更具体的说，涉及用于集成电路装置和半导体组件的引线框表面精整的材料和制造。
背景技术
半导体装置的引线框提供用于将半导体芯片(通常是集成电路(IC)芯片)稳固地定位在封装内的稳定支撑垫。从较薄(约120μm到250μm)的金属片制造单件引线框已经是常见的实践。出于制造容易的原因，通常选择的起始金属是铜、铜合金、铁镍合金(例如所谓的“合金42”)和铝。从原始片冲压或蚀刻引线框的所需形状。
除芯片衬垫之外，引线框还提供多个导电区段以使各种电导体紧密接近芯片。所述区段的内端与IC表面上的接触衬垫之间的其余间隙通过连接件(通常是个别地接合到IC接触衬垫和引线框区段的薄金属线，例如金)来桥接。因此，内区段端的表面必须在冶金上适合缝合附接到所述连接件。
引线区段的远离IC芯片的末端(“外”端)需要电连接和机械连接到例如印刷电路板的外部电路。此附接通常是通过按照惯例在高于200℃的回焊温度下以锡合金焊料进行焊接来执行的。因此，外区段端的表面需要具有适合回焊附接到外部零件的冶金配置。
最后，所述引线框提供用于包封敏感芯片和脆性连接线的框架。使用塑性材料而非金属罐或陶瓷的包封已经因成本低而成为优选方法。在175℃下用于基于环氧树脂的热固性化合物的转移模制工艺已经实践了多年。用于模制和模型固化(聚合)的175℃的温度与用于低熔点焊料回焊的大于200℃的温度是相容的。
在潮湿环境下的可靠性测试要求模制化合物与引线框和其包封的装置零件具有良好的附着力。对良好附着力的两个主要贡献是：模制化合物与引线框的金属表面精整(metal finish)之间的化学亲合力，以及引线框的表面粗糙度。
近年来，许多技术趋势使为不同需求寻找满意的解决方案变得越来越复杂。举例来说，封装尺寸在缩小，从而为附着提供较少表面。接着，对使用无铅焊料的需求促使回焊温度在约260℃左右的范围内，使得维持模制化合物与引线框的附着力变得更加困难。这种情况对于可用于QFN(四边扁平无引线)和SON(小外型无引线)装置中的非常小的引线框表面来说尤其如此。
发明内容
申请人认识到对使用为高可靠性的半导体装置量身定制的引线框结构来实现低成本装置制造的新概念的需要。所述低成本引线框将提供附着力与模制化合物、连接线的接合力、暴露的引线框区段的可焊性以及无锡枝晶生长风险的组合。
当引线框及其制造方法灵活得足以应用于不同的半导体产品系列和较广范围的设计和组装变化，且实现以经改进的工艺良率和装置可靠性为目标的改进时，存在技术优势。当使用已安装的设备基础来完成这些技术创新以致不需要投资新的制造机器时，存在进一步的技术优势。
本发明的一个实施例是一种具有由基底金属制成的结构的引线框条带，其中所述结构具有多个表面。在所述基底金属表面上的是贵金属层，其包含金层，接着是与所述金层接触的最外钯层。此外，在所述基底金属表面与所述贵金属层之间可存在镍层，使得所述镍层与所述基底金属表面接触且与所述金层接触。
就优选厚度来说，金层的厚度在约2nm与5nm之间，优选约为3nm，钯层的厚度在约5nm与15nm之间，优选约为10nm，且镍层的厚度在约0.5μm与2.0μm之间。贵金属层的厚度和优选的电解敷镀工艺提供低成本引线框。钯提供与模制化合物的极好附着力，且连同下伏的金提供极好的接合力和可焊性。
本发明的另一实施例是一种半导体装置，其具有引线框，所述引线框具有由基底金属制成的结构，其中所述结构包含芯片安装垫和多个引线区段。覆盖所述基底金属的是贵金属层，其由与所述基底金属接触的金层以及与所述金层接触的最外钯层组成。或者，在所述基底金属与所述贵金属层之间可存在镍层，使得所述镍层与所述基底金属接触且与所述金层接触。半导体芯片附接到芯片安装垫，且导电连接从芯片跨接到引线区段。聚合包封材料覆盖所述芯片、所述连接和所述引线区段的部分。
本发明的另一实施例是一种用于制造引线框的方法。提供具有多个表面的基底金属结构。在所述表面中的每一者上敷镀附着到基底金属的金属层堆叠。虽然电解敷镀是优选方法，但无电敷镀(electroless plating)是一种替代方案。这些敷镀步骤由以下步骤依次组成：敷镀金层，优选约3nm厚，以大体上覆盖基底金属；以及敷镀钯层，优选约10nm厚，以大体上覆盖金层。可在基底金属与金层之间敷镀厚度在约0.5μm与2.0μm之间的镍层。所有敷镀步骤都可在无掩蔽或选择性敷镀的情况下执行，且因此成本较低。
属于本发明的技术优势的是：未将有毒或晶须材料用于敷镀步骤、倒装接合能力得到增强、与模制化合物的附着力得到增强且水分含量装置质量(moisture-level devicequality)得到改进。此外，所需的敷镀工艺便宜且容易制造。
附图说明
图1是具有成形的引线框结构的引线框条带的一部分的基底金属结构的示意性横截面图。
图2说明具有基底金属结构和多个表面的引线框条带部分的示意性横截面图，其中所述表面已经敷镀有根据本发明的附着层堆叠。
图3说明本发明的装置实施例的示意性横截面图，其展示根据本发明实施例而制备的引线框条带的一部分，以及组装且包封在一个引线框表面上的多个半导体芯片。
图4说明QFN/SON类型的经单分的装置的示意性横截面图，所述装置包含根据本发明制备的引线框。
具体实施方式
图1说明通常表示为100的引线框部分的示意性横截面图，其意在用于制造半导体装置。所述引线框具有由金属片制成的结构，其中所述结构具有多个表面：第一表面101、第二表面102和许多侧边表面110a，110b…110n。虽然表面101和102源自起始材料片的表面，但侧边表面110a到110n已经由引线框结构的形成工艺产生。在图1的实例中，所描绘的引线框部分含有：多个部分103，其意在成为芯片安装垫；以及多个部分104，其意在成为待建造装置的引线区段。所述引线框由基底金属105制成。
如本文中所定义，引线框的起始材料被称为“基底金属”，其指示金属的类型。因此，不应在电化学意义(如与“贵金属”相对)上或在结构意义上解释术语“基底金属”。
基底金属105通常是铜或铜合金。其它选择包括黄铜、铝、铁镍合金(“合金42”)和镍钴铁合金(“科伐合金Kovar)”)。
基底金属105由厚度优选在100μm到300μm范围内的金属片产生；更薄的片是可能的。此厚度范围的延展性提供5％到15％的伸长率，其促进某些经表面精整的装置(例如，表面安装装置)所需的区段弯曲和成形操作。从起始金属片冲压或蚀刻例如芯片安装垫、引线区段、连接轨道(图1中未展示，但由虚线暗示)的引线框零件。如所陈述，这些冲压或蚀刻工艺产生引线框零件的许多侧边110a，110b…110n。
图2说明根据本发明实施例的引线框条带的示意性横截面图。所述引线框结构具有基底金属105，所述基底金属105具有多个通过冲压或蚀刻工艺而产生的表面。用于基底的优选金属是铜或铜合金。如上文所陈述，或者，基底金属选自由铝、铁镍合金(例如合金42)和科伐合金组成的组。贵金属层210附着到基底金属表面。所述贵金属层210包含与基底金属表面接触的金层201，接着是与所述金层接触的最外钯层202。金层201的厚度在约2nm与5nm之间，优选约为3nm。钯层的厚度在约5nm与15nm之间，优选为10nm。
图3说明根据本发明另一实施例的引线框条带。所述引线框结构具有基底金属105，所述基底金属105具有多个通过冲压或蚀刻工艺而产生的表面。金属层堆叠附着到结构表面中的每一者。所述堆叠由以下层组成：与基底金属105接触的镍层301，其大体上覆盖整个基底金属表面；以及贵金属层，其大体上覆盖整个镍层。镍层的优选厚度范围在约0.5μm与2.0μm之间。
贵金属层大体上无针孔，以便为并入有引线框的经表面精整的装置的均匀且可靠的可焊性提供未氧化的镍表面。贵金属层进一步需要提供与经聚合的模制化合物的牢固且可靠的附着力，所述经聚合的模制化合物优选用于装置包封。钯是用于附着到塑料包封物的优选金属。然而，适合可靠地提供所需附着力的钯层厚度可能是多孔的且可能显示偶然的针孔，除非钯层由另一薄连续贵金属层(优选为金)支持。因此，所得贵金属层实际上由两个薄且(因此)成本较低的贵金属层组成。
如图3中所绘示，紧接在镍层301之后的是与所述镍层接触的金层201。所述金层的优选厚度范围在约2nm与5nm之间；最优选厚度约为3nm。最后，最外层202是与所述金层接触的钯层。所述钯层的优选厚度范围在约5nm与15nm之间；最优选厚度约为10nm。在这些厚度范围中，钯层和金层提供良好的接合力，尤其是对于金接合线来说。另外，钯层和金层提供良好的可焊性。
因为所有引线框表面都由金属层堆叠覆盖，所以优选的层沉积工艺是电解敷镀。使整个引线框条带移动经过连续的敷镀槽阵列(参看下文)，且可避免掩蔽步骤。或者，对于某些装置类型或对于模制后工艺可选择无电敷镀。
本发明的另一实施例是半导体装置，如图4中的四边扁平无引线(QFN)或小外型无引线(SON)装置所示范，其中展示装置单分之前具有多个经组装且经封装的装置的引线框条带。在本发明的实施例中，所述装置具有引线框，所述引线框具有由基底金属片105制成的结构；所述片具有第一表面401a和第二表面401b。基底金属的优选实例是铜或铜合金。图4中的引线框结构包含芯片安装垫402和多个引线区段403。每个引线区段具有接近芯片安装垫402的第一端403a和远离安装垫402的第二端403b。
第一引线框表面401a、第二引线框表面401b和所述结构的所有侧边都由层堆叠覆盖，所述层堆叠向所述引线框提供与聚合材料的可靠附着力以及与接合线金属和回焊金属的冶金亲合力。在图4所展示的实例中，层堆叠由与基底金属105接触的镍层301以及与所述镍层接触的连续贵金属层组成。所述贵金属层包含与所述镍层接触的金层201以及与所述金层接触的最外钯层202。
半导体芯片410(例如硅集成电路芯片)通过附着层411附接到每个芯片安装垫402。导电连接412(例如由金或金合金制成的接合线)从芯片410跨接到引线区段403，且使所述芯片与引线区段的第一端403a互连。将缝合接合件412a压力接合到贵金属层(钯层和金层)以提供可靠的缝合附接。
聚合包封材料420(例如基于环氧树脂的模制化合物)覆盖芯片410、接合线412和位于引线区段的第一引线框表面401a上的最外层202。聚合材料420还填充芯片410与引线区段第一端之间的间隙，且因此覆盖引线框侧边。在QFN/SON装置中，聚合化合物420形成与第二引线框表面401b上的最外钯层202共面(在同一平面内)的表面421。聚合材料420不覆盖第二引线框表面401b上的贵金属。
第二引线框表面的这些暴露部分因此可供与回焊金属接触。举例来说，锡或锡合金可至少覆盖引线区段第二端的部分，或者覆盖所有引线区段和暴露的外芯片衬垫表面。回焊金属用于使所述装置与例如电路板等外部零件在机械及电方面均互连。
在图4中，虚线430指示锯机将完成的引线框条带切割(单分)成QFN/SON封装类型的个别装置的位置。锯机穿过包封材料420且穿过引线框区段切割。图5中绘示具有直侧边501的所得经单分的QFN/SON装置。在表面安装装置中，标准修整/成形步骤代替使用锯机的切割步骤。
本发明的另一实施例是一种用于制造引线框的方法，其开始于提供具有多个表面的结构化基底金属条带的步骤，且接着是在这些表面上敷镀金属层的步骤。对于许多装置类型来说，引线框条带的电解敷镀是优选方法。其它装置类型可能要求无电敷镀。举例来说，为了制造供图4和图5的QFN/SON装置中使用的图3的引线框条带，以下列顺序实施连续敷镀步骤：
在基底金属上敷镀厚度范围从约0.5μm到2.0μm的镍层。
在所述镍层上敷镀厚度范围从约2nm到5nm的金层；优选厚度约为3nm。
在金层上敷镀厚度范围从约5nm到15nm的钯层；优选厚度约为10nm。
电解敷镀允许连续的卷到卷处理，且因此较为便宜且适合高处理量。电解敷镀适合模制后敷镀，且还可布置为高处理量技术。
虽然已经参考说明性实施例描述了本发明，但不希望在限制意义上解释此描述内容。所属领域的技术人员在参考所述描述内容之后将明白本发明的说明性实施例以及其它实施例的各种修改和组合。举例来说，本发明应用于使用任何类型半导体芯片、离散或集成电路的产品，且半导体芯片的材料可包括硅、锗化硅、砷化镓或集成电路制造中所使用的任何其它半导体或化合物材料。
作为另一实例，本发明应用于除所描述的QFN/SON装置的实例之外的许多半导体装置类型，例如表面安装装置、小外型装置和带引线的装置。
作为另一实例，从基底金属片冲压引线框的工艺步骤后面可接着是选择性蚀刻的工艺步骤，尤其是暴露的基底金属表面的选择性蚀刻的工艺步骤，以便产生大面积等高表面，用于改进与模制化合物的附着力。根据本发明的敷镀层的序列可适应任何此类经特殊蚀刻的引线框基础结构。
因此希望所主张的本发明包含任何此类修改或实施例。

Claims (13)

1.一种引线框条带，其包括：
由基底金属制成的结构，所述结构具有多个表面；以及
位于所述基底金属表面上的贵金属层，所述贵金属层包含金层和与所述金层接触的最外钯层。
2.根据权利要求1所述的引线框条带，其进一步包括位于所述基底金属表面与所述贵金属层之间的镍层，所述镍层与所述基底金属表面且与所述金层接触。
3.根据权利要求1或2所述的引线框条带，其中所述基底金属选自由铜、铜合金、铝、铁镍合金和镍钴铁合金组成的群组。
4.根据权利要求1或2所述的引线框条带，其中所述金层的厚度在2nm与5nm之间；且其中所述钯层的厚度在5nm与15nm之间。
5.根据权利要求4所述的引线框条带，其中所述金层厚度为3nm，且所述钯层的厚度为10nm。
6.根据依附于权利要求2的权利要求4所述的引线框条带，其中所述镍层的厚度在0.5μm与2.0μm之间。
7.一种半导体装置，其包括：
引线框，其具有由基底金属制成的结构，所述结构包含芯片安装垫和多个引线区段；
贵金属层，其位于所述基底金属上，所述贵金属层包含金层和与所述金层接触的最外钯层；
半导体芯片，其附接到所述芯片安装垫；
导电连接，其从所述芯片到所述引线区段；以及
包封材料，其覆盖所述芯片、所述连接和所述引线区段的部分。
8.根据权利要求7所述的装置，其进一步包括用于所述引线框的镍层，使得所述镍层位于所述基底金属与所述贵金属层之间，所述镍层与所述基底金属且与所述金层接触。
9.一种用于制造引线框的方法，其包括以下步骤；
提供具有多个表面的结构化基底金属条带；
敷镀金层以覆盖所述基底金属；以及
敷镀钯层以覆盖所述金层。
10.根据权利要求9所述的方法，其在所述敷镀所述金层的步骤之前进一步包括在所述基底金属表面上敷镀镍层的步骤，借此所述镍层与所述基底金属表面且与所述金层接触。
11.根据权利要求9或10所述的方法，其中所述金层的厚度在2nm与5nm之间，且所述钯层的厚度在5nm与15nm之间。
12.根据权利要求11所述的方法，其中所述金层为3nm厚，且所述钯层为10nm厚。
13.根据依附于权利要求10的权利要求11所述的方法，其中所述镍层的厚度在0.5μm与2.0μm之间。
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