CN101520580B - TFT-LCD array substrate structure and manufacturing method thereof - Google Patents
TFT-LCD array substrate structure and manufacturing method thereof Download PDFInfo
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- CN101520580B CN101520580B CN 200810101107 CN200810101107A CN101520580B CN 101520580 B CN101520580 B CN 101520580B CN 200810101107 CN200810101107 CN 200810101107 CN 200810101107 A CN200810101107 A CN 200810101107A CN 101520580 B CN101520580 B CN 101520580B
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- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L27/00—Devices consisting of a plurality of semiconductor or other solid-state components formed in or on a common substrate
- H01L27/02—Devices consisting of a plurality of semiconductor or other solid-state components formed in or on a common substrate including semiconductor components specially adapted for rectifying, oscillating, amplifying or switching and having at least one potential-jump barrier or surface barrier; including integrated passive circuit elements with at least one potential-jump barrier or surface barrier
- H01L27/12—Devices consisting of a plurality of semiconductor or other solid-state components formed in or on a common substrate including semiconductor components specially adapted for rectifying, oscillating, amplifying or switching and having at least one potential-jump barrier or surface barrier; including integrated passive circuit elements with at least one potential-jump barrier or surface barrier the substrate being other than a semiconductor body, e.g. an insulating body
- H01L27/1214—Devices consisting of a plurality of semiconductor or other solid-state components formed in or on a common substrate including semiconductor components specially adapted for rectifying, oscillating, amplifying or switching and having at least one potential-jump barrier or surface barrier; including integrated passive circuit elements with at least one potential-jump barrier or surface barrier the substrate being other than a semiconductor body, e.g. an insulating body comprising a plurality of TFTs formed on a non-semiconducting substrate, e.g. driving circuits for AMLCDs
- H01L27/124—Devices consisting of a plurality of semiconductor or other solid-state components formed in or on a common substrate including semiconductor components specially adapted for rectifying, oscillating, amplifying or switching and having at least one potential-jump barrier or surface barrier; including integrated passive circuit elements with at least one potential-jump barrier or surface barrier the substrate being other than a semiconductor body, e.g. an insulating body comprising a plurality of TFTs formed on a non-semiconducting substrate, e.g. driving circuits for AMLCDs with a particular composition, shape or layout of the wiring layers specially adapted to the circuit arrangement, e.g. scanning lines in LCD pixel circuits
Abstract
The invention relates to a TFT-LCD array substrate structure and a manufacturing method thereof. The array substrate structure comprises a plurality of grid lines and data lines on the substrate; pixel electrodes are formed in the pixel regions defined by the grid lines and data lines; and thin-film transistors are formed at the intersections of the grid lines and data lines. The thin-film transistor comprises a gate electrode, a gate insulation layer, an active layer, a source/drain electrode layer and a passivation layer as well as common electrode wires which are arranged among the data lines on and off and form a memory capacitor with the pixel electrodes. The common electrode wires and the source/drain electrode layer are arranged at the same layer and connected by a connecting electrode. Compared with the TFT-LCD array substrate structure of the prior art, with the same common electrode wire width, the memory capacitor formed by the structure provided by the invention is significantly improved; with the same memory capacitor, the common electrode wire of the structure provided by the invention has a smaller width, thereby increasing the aperture opening ratio. Besides, the common electrode wire reduces step difference, thus being conducive to the improvement of the TFT-LCD contrast ratio.
Description
Technical field
The present invention relates to a kind of Thin Film Transistor-LCD and manufacturing approach thereof, especially a kind of TFT-LCD array substrate structure and manufacturing approach thereof.
Background technology
Thin Film Transistor-LCD (Thin Film Transistor Liquid CrystalDisplay; Abbreviation TFT-LCD) array base palte becomes box-like with color membrane substrates; Have characteristics such as volume is little, low in energy consumption, radiationless, occupied leading position in current flat panel display market.
Figure 11 a is the planimetric map of prior art TFT-LCD array base-plate structure, Figure 11 b be among Figure 11 a J-J to sectional view.Shown in Figure 11 a, Figure 11 b; Prior art TFT-LCD array base-plate structure comprises grid line 2b, public electrode wire 2c and data line 5c; Grid line 2b and data line 5c define pixel region, and form TFT at infall, and TFT comprises the gate electrode 2a that is connected with grid line 2b, as the active layer 4 of switches conductive medium and the drain electrode 5a and the source electrode 5b of formation TFT raceway groove; Source electrode 5b is connected with data line 5c; Drain electrode 5a is connected with pixel electrode 7, and public electrode wire 2c is parallel with grid line 2b, and between adjacent two grid line 2b.Particularly; Gate electrode 2a is formed on the substrate 1; Gate insulation layer 3 is formed on the whole base plate 1 with gate electrode pattern, and active layer 4 (comprising semiconductor layer and doping semiconductor layer) is formed on the gate electrode 2a, and the drain electrode 5a and the source electrode 5b that form the TFT raceway groove are formed on the active layer 4; Passivation layer 6 is formed on drain electrode 5a and the source electrode 5b; And offering the first passivation layer via hole 6a in drain electrode 5a position, pixel electrode 7 is formed in the pixel region, and is connected with drain electrode 5a through the first passivation layer via hole 6a.The preparation process of prior art TFT-LCD array base-plate structure comprises: form gate electrode, grid line and public electrode line graph; Form gate insulation layer and active layer; Formation source electrode, drain electrode and data line; Form passivation layer; Form pixel electrode.Each step all comprises thin film deposition, exposure and three main technique such as pattern formation, etching.
MM CAP is a very important parameter in the array base-plate structure design; Its effect mainly is in order to let pixel electrode accomplish charging; Make pixel electrode can remain to frame update next time; Therefore the size of MM CAP not only influences the operate as normal of pixel, and the whole display quality of TFT-LCD is had significant effects.Normally utilize pixel electrode and grid line or public electrode wire to form parallel plate capacitor at present, promptly MM CAP is in (Cst on Common) the two kinds of structures on public electrode wire of (Cst on Gate) and MM CAP on the grid line.
Two kinds of structures of this of MM CAP have merits and demerits separately respectively.For MM CAP structure on grid line since with MM CAP design on grid line, so TFT-LCD has high aperture opening ratio, but the RC that this MM CAP can increase on the grid line conversely postpones, and then reduces the charge rate of TFT, influences display quality.For MM CAP structure on public electrode wire; Owing to be to utilize pixel electrode and public electrode wire to form parallel plate capacitor; Thereby can not influence the RC delay on the grid line, but because public electrode wire and grid line are to form with in a composition technology, so the vertical range between public electrode wire and pixel electrode is the thickness summation of gate insulation layer and passivation layer; Because distance between plates is from bigger; In order to guarantee the size of MM CAP, generally need to increase the area (width) of public electrode wire, but can significantly reduce the aperture opening ratio of TFT-LCD like this.Simultaneously,, therefore also can influence the orientation of liquid crystal molecule, reduce the contrast of TFT-LCD owing to can form bigger section poor (equaling the grid metal layer thickness) around the public electrode wire.
Summary of the invention
The purpose of this invention is to provide a kind of TFT-LCD array base-plate structure and manufacturing approach thereof, effectively solve the MM CAP that the public electrode line structure exists among the existing TFT-LCD little, reduce aperture opening ratio and form technological deficiencies such as big section difference.
To achieve these goals; The invention provides a kind of TFT-LCD array base-plate structure; Comprise the grid line and the data line that are formed on the substrate; Form pixel electrode in the pixel region that said grid line and data line limit, and form thin film transistor (TFT) at infall, said thin film transistor (TFT) comprises gate electrode, gate insulation layer, active layer, source-drain electrode layer and passivation layer; Also comprise being interrupted and be arranged between the said data line and form the public electrode wire of MM CAP with said pixel electrode; Said public electrode wire and said source-drain electrode layer are provided with layer, and said public electrode wire is near offering second passivation layer via hole on the passivation layer on the end position of said data line, and connection electrode is formed on the said passivation layer; Said connection electrode is connected with said public electrode wire through said second passivation layer via hole, and through two adjacent said second passivation layer via hole adjacent said public electrode wire is interconnected.
On the technique scheme basis, said public electrode wire can be arranged between adjacent two grid lines, also can be provided with on the said grid line.
To achieve these goals, the present invention also provides a kind of TFT-LCD array base-plate structure manufacturing approach, comprising:
Step 2, on the substrate of completing steps 1, deposit gate insulation layer, and form active layer, drain electrode, source electrode, data line and public electrode line graph, wherein public electrode wire is interrupted and is formed between two data lines;
Wherein, said step 2 can be specially:
Step 21, on the substrate of completing steps 1 successive sedimentation gate insulation layer and active layer, form active layer pattern through composition technology;
Step 22, sedimentary origin leaks metal level on the substrate of completing steps 21, forms drain electrode, source electrode, data line and public electrode line graph through composition technology, and wherein public electrode wire is interrupted and is formed between two data lines.
Wherein, Said step 2 also can be specially: metal level is leaked in successive sedimentation gate insulation layer, active layer and source on the substrate of completing steps 1; See through composition technology through shadow tone or half and form active layer, drain electrode, source electrode, data line and public electrode line graph, wherein public electrode wire is interrupted and is formed between two data lines.
The present invention proposes a kind of TFT-LCD array base-plate structure and manufacturing approach thereof; Can form the MM CAP of new construction; With five composition technologies is example; Through the first time composition technology form gate electrode and grid line figure, through the second time composition technology form active layer pattern, through the drain electrode of composition technology formation for the third time, source electrode, data line and public electrode line graph; Form first passivation layer via hole in the drain electrode position and form second passivation layer via hole near the end position of data line through the 4th composition technology at public electrode wire; Form pixel electrode and connection electrode through the 5th composition technology at last, make pixel electrode pass through first passivation layer via hole and be connected, connection electrode is interconnected adjacent public electrode wire through second passivation layer via hole with drain electrode.Though the present invention adopts MM CAP structure on public electrode wire equally; But public electrode wire and drain electrode, source electrode and data line are provided with layer; Forming with in a composition technology; Form two parallel-plates of MM CAP by public electrode wire and pixel electrode, the vertical range between two parallel-plates is reduced into the thickness that has only passivation layer, helps the raising of MM CAP.In addition, because the section difference that public electrode wire brings is leaked metal layer thickness for the source, the section of making difference is reduced, and helps the raising of TFT-LCD contrast.Further, because public electrode wire and drain electrode, source electrode and data line are provided with layer, public electrode wire can be arranged on the grid line, when increasing MM CAP, has greatly increased aperture opening ratio.
Compare with prior art TFT-LCD array base-plate structure, the formed storage capacitor construction of TFT-LCD array base-plate structure of the present invention has following advantage:
(1) when identical public electrode line width, the MM CAP that the present invention forms has obvious increase;
(2) when identical MM CAP size, the width of public electrode wire of the present invention is little, has increased aperture opening ratio;
(3) in the time of on public electrode wire is arranged on grid line, the present invention has greatly increased aperture opening ratio when obviously increasing MM CAP.
Through accompanying drawing and embodiment, technical scheme of the present invention is done further detailed description below.
Description of drawings
Fig. 1 a is the planimetric map of TFT-LCD array base-plate structure first embodiment of the present invention;
Fig. 1 b be among Fig. 1 a A-A to sectional view;
Fig. 1 c be among Fig. 1 a B-B to sectional view;
Fig. 2 a is the planimetric map after the TFT-LCD array base-plate structure composition technology first time of the present invention;
Fig. 2 b be among Fig. 2 a C-C to sectional view;
Fig. 3 a is the planimetric map after the TFT-LCD array base-plate structure composition technology second time of the present invention;
Fig. 3 b be among Fig. 3 a D-D to sectional view;
Fig. 4 a is TFT-LCD array base-plate structure of the present invention planimetric map after the composition technology for the third time;
Fig. 4 b be among Fig. 4 a E-E to sectional view;
Fig. 4 c be among Fig. 4 a F-F to sectional view;
Fig. 5 a is the planimetric map after the 4th composition technology of TFT-LCD array base-plate structure of the present invention;
Fig. 5 b be among Fig. 5 a G-G to sectional view;
Fig. 5 c be among Fig. 5 a H-H to sectional view;
Fig. 6 a is the planimetric map of TFT-LCD array base-plate structure second embodiment of the present invention;
Fig. 6 b be among Fig. 6 a I-I to sectional view;
Fig. 7 is the process flow diagram of TFT-LCD array base-plate structure manufacturing approach first embodiment of the present invention;
Fig. 8 is the process flow diagram of TFT-LCD array base-plate structure manufacturing approach second embodiment of the present invention;
Fig. 9 is the process flow diagram of TFT-LCD array base-plate structure manufacturing approach the 3rd embodiment of the present invention;
Figure 10 is the process flow diagram of TFT-LCD array base-plate structure manufacturing approach the 4th embodiment of the present invention;
Figure 11 a is the planimetric map of prior art TFT-LCD array base-plate structure;
Figure 11 b be among Figure 11 a J-J to sectional view.
Description of reference numerals:
The 1-substrate; The 2a-gate electrode; The 2b-grid line;
The 2c-public electrode wire; The 3-gate insulation layer; The 4-active layer;
The 5a-drain electrode; 5b-source electrode; The 5c-data line;
The 5d-public electrode wire; The 6-passivation layer; 6a-first passivation layer via hole;
6b-second passivation layer via hole; The 7-pixel electrode; The 8-connection electrode.
Embodiment
Fig. 1 a is the planimetric map of TFT-LCD array base-plate structure first embodiment of the present invention, Fig. 1 b be among Fig. 1 a A-A to sectional view, Fig. 1 c be among Fig. 1 a B-B to sectional view.Shown in Fig. 1 a, Fig. 1 b and Fig. 1 c; Present embodiment TFT-LCD array base-plate structure comprises grid line 2b, data line 5c and public electrode wire 5d; Grid line 2b and data line 5c define pixel region, and form TFT at infall, and TFT comprises the gate electrode 2a that is connected with grid line 2b, as the active layer 4 of switches conductive medium and the drain electrode 5a and the source electrode 5b of formation TFT raceway groove; Source electrode 5b is connected with data line 5c; Passivation layer 6 on the drain electrode 5a offers the first passivation layer via hole 6a, and pixel electrode 7 is formed on pixel region, and is connected with drain electrode 5a through the first passivation layer via hole 6a; The public electrode wire 5d that is arranged at interval between the data line 5c is provided with layer between adjacent two grid lines and with drain electrode 5a, source electrode 5b and data line 5c; It is near offering the second passivation layer via hole 6b on the passivation layer on the end position of data line 5c 6, connection electrode 8 is provided with layer with pixel electrode 7, and the second passivation layer via hole 6b through two vicinities interconnects public electrode wire 5d.
Fig. 2 a～Fig. 5 c is the manufacturing synoptic diagram of TFT-LCD array base-plate structure of the present invention; Be example with five composition technologies below; Process for making through the TFT-LCD array base-plate structure further specifies technical scheme of the present invention; In following explanation, the alleged composition technology of the present invention comprises technologies such as photoresist coating, mask, exposure, etching.
Fig. 2 a is TFT-LCD array base-plate structure of the present invention planimetric map after the composition technology for the first time, Fig. 2 b be among Fig. 2 a C-C to sectional view.Adopt the method for sputter or thermal evaporation, substrate 1 (like glass substrate or quartz base plate) go up deposition one layer thickness be 500
～4000
the grid metal level.The grid metal level can use metal and alloys thereof such as Cr, W, Ti, Ta, Mo, Al, Cu, and the grid metal level also can be made up of the multiple layer metal film.Through the first time composition technology grid metal level is carried out etching, on substrate 1, form gate electrode 2a and grid line 2b figure, shown in Fig. 2 a, Fig. 2 b.
Fig. 3 a is TFT-LCD array base-plate structure of the present invention planimetric map after the composition technology for the second time, Fig. 3 b be among Fig. 3 a D-D to sectional view.On the substrate of accomplishing gate electrode and grid line pattern through plasma enhanced chemical vapor deposition (abbreviation PECVD) method successive sedimentation thickness be 1000
～4000
gate insulation layer 3, thickness be 1000
～4000
active layer 4, active layer 4 comprise thickness be 1000
～3000
semiconductor layer He thickness be 300
～600
doping semiconductor layer (ohmic contact layer).Gate insulation layer can be selected oxide, nitride or oxynitrides for use, and corresponding reacting gas can be SiH
4, NH
3, N
2Mixed gas or SiH
2Cl
2, NH
3, N
2Mixed gas, the reacting gas that active layer is corresponding can be SiH
4, H
2Mixed gas or SiH
2Cl
2, H
2Mixed gas.After above-mentioned each layer deposition accomplished, through the second time composition technology active layer 4 is carried out etching, form active layer 4 figures, shown in Fig. 3 a, Fig. 3 b.
Fig. 4 a is TFT-LCD array base-plate structure of the present invention planimetric map after the composition technology for the third time, Fig. 4 b be among Fig. 4 a E-E to sectional view, Fig. 4 c be among Fig. 4 a F-F to sectional view.After forming active layer 4 figures; Method through sputter or thermal evaporation; Deposit thickness be 500
～2500
the source leak metal level, metal level is leaked in the source can select metal and alloys thereof such as Cr, W, Ti, Ta, Mo, Al, Cu for use.Through composition technology for the third time metal level is leaked in the source and carry out etching; Form drain electrode 5a, source electrode 5b, data line 5c and public electrode wire 5d figure; Be TFT raceway groove figure between drain electrode 5a and the source electrode 5b wherein, etch away the doping semiconductor layer in the active layer 4 fully in the TFT raceway groove figure, data line 5c is vertical with grid line 2b; Public electrode wire 5d is interrupted and is formed between two data line 5c, shown in Fig. 4 a, Fig. 4 b and Fig. 4 c.
Fig. 5 a is the planimetric map after the 4th composition technology of TFT-LCD array base-plate structure of the present invention, Fig. 5 b be among Fig. 5 a G-G to sectional view, Fig. 5 c be among Fig. 5 a H-H to sectional view.After forming drain electrode 5a, source electrode 5b, data line 5c and public electrode wire 5d figure, be 700 through PECVD method deposit thickness
～2000
Passivation layer 6, passivation layer 6 can adopt oxide, nitride or oxynitrides, corresponding reacting gas can be SiH
4, NH
3, N
2Mixed gas or SiH
2Cl
2, NH
3, N
2Mixed gas.Through the 4th composition technology passivation layer 6 is carried out etching; Form the first passivation layer via hole 6a in drain electrode 5a position; Make the first passivation layer via hole 6a expose drain electrode 5a; Form the second passivation layer via hole 6b at public electrode wire 5d near the end position of data line 5c, make the second passivation layer via hole 6b expose public electrode wire 5d, shown in Fig. 5 a, Fig. 5 b and Fig. 5 c.
At last; Method through sputter or thermal evaporation; Deposit thickness be 300
～600
transparency conducting layer, transparency conducting layer is generally tin indium oxide, indium zinc oxide or aluminum zinc oxide etc.Through the 5th composition technology transparency conducting layer is carried out etching; Form pixel electrode 7 figures at pixel region; Pixel electrode 7 is connected with drain electrode 5a through the first passivation layer via hole 6a; End regions at public electrode wire 5d forms connection electrode 8 figures, connection electrode 8 is interconnected adjacent public electrode wire 5d through the second passivation layer via hole 6b, shown in Fig. 1 a, Fig. 1 b and Fig. 1 c.
Manufacture process by the invention described above TFT-LCD array base-plate structure can be found out; Though TFT-LCD array base-plate structure of the present invention adopts MM CAP (Cst on Common) structure on public electrode wire equally; But public electrode wire and drain electrode, source electrode and data line are provided with layer; Forming with in a composition technology, form two parallel-plates of MM CAP like this by public electrode wire and pixel electrode, the vertical range between two parallel-plates is merely the thickness of passivation layer; Distance between MM CAP the two poles of the earth is dwindled greatly, helps the raising of MM CAP.In addition; Because the section difference that public electrode wire brings is leaked metal layer thickness for the source; And metal layer thickness is leaked in the grid metal layer thickness source that is greater than usually, that is to say that the section difference of public electrode wire this moment is reduced, and the segment difference helps the even orientation of liquid crystal molecule; Reduce light leakage phenomena, therefore help the raising of TFT-LCD contrast.
In the manufacture process of TFT-LCD array base-plate structure of the present invention shown in Fig. 2 a～Fig. 5 c, can also prepare shield bars according to design demand, wherein shield bars can be provided with layer with grid line, also can be provided with layer with public electrode wire.When shield bars and grid line are provided with layer; TFT-LCD array base-plate structure of the present invention composition technology for the first time is specially: adopt the method for sputter or thermal evaporation, on substrate 1 deposition one layer thickness be 500
～4000
the grid metal level.The grid metal level can use metal and alloys thereof such as Cr, W, Ti, Ta, Mo, Al, Cu, and the grid metal level also can be made up of the multiple layer metal film.Through the first time composition technology grid metal level is carried out etching, on substrate, form gate electrode, grid line and shield bars figure.When shield bars and public electrode wire are provided with layer; TFT-LCD array base-plate structure of the present invention composition technology for the third time is specially: through the method for sputter or thermal evaporation; Deposit thickness be 500
～2500
the source leak metal level; Metal level is leaked in the source can select metal and alloys thereof such as Cr, W, Ti, Ta, Mo, Al, Cu for use; Through composition technology for the third time metal level is leaked in the source and carry out etching; Form drain electrode, source electrode, data line, public electrode wire and shield bars figure; It wherein between drain electrode and the source electrode TFT raceway groove figure; Etch away the doping semiconductor layer in the active layer fully in the TFT raceway groove figure; Data line is vertical with grid line, and public electrode wire is interrupted and is formed between two data lines, and shield bars is set in parallel in an example or two sides of data line.In actual use, when shield bars and the same layer of public electrode wire, shield bars can also be connected with public electrode wire.
In actual use, TFT-LCD array base-plate structure of the present invention also can adopt four composition technology manufacturings to accomplish.In four composition technology; The technology that forms gate electrode and grid line figure, formation first passivation layer via hole and second passivation layer via hole, formation pixel electrode and connection electrode is ditto said; With aforementioned second time composition technology and for the third time composition technology be merged into a composition technology; Be specially: on the substrate of accomplishing gate electrode and grid line pattern through PECVD method successive sedimentation thickness be 1000
～4000
gate insulation layer, thickness be 1000
～4000
active layer, active layer comprise thickness be 1000
～3000
semiconductor layer He thickness be 300
～600
doping semiconductor layer (ohmic contact layer).In the method for accomplishing on the substrate of above-mentioned technology through sputter or thermal evaporation; Deposit thickness be 500
～2500
the source leak metal level, metal level is leaked in the source can select metal and alloys thereof such as Cr, W, Ti, Ta, Mo, Al, Cu for use.Carry out shadow tone (HTM) or half exposure technology afterwards through mask plate; Earlier metal level is leaked in the source and carry out etching; And then the TFT raceway groove figure of double exposure area carries out ashing and etching processing; Forming active layer, drain electrode, source electrode, data line and public electrode line graph, is TFT raceway groove figure between drain electrode and the source electrode wherein, etches away the doping semiconductor layer in the active layer fully in the TFT raceway groove figure; Data line is vertical with grid line, and public electrode wire is interrupted and is formed between two data lines.
Fig. 6 a is the planimetric map of TFT-LCD array base-plate structure second embodiment of the present invention, Fig. 6 b be among Fig. 6 a I-I to sectional view.Shown in Fig. 6 a and Fig. 6 b; The structures such as the gate electrode 2a of present embodiment TFT-LCD array base-plate structure, grid line 2b, active layer 4, drain electrode 5a, source electrode 5b and data line 5c and first embodiment are basic identical; Different is that public electrode wire 5d is arranged on the grid line.Particularly; Grid line 2b and data line 5c define pixel region; And form TFT at infall, and TFT comprises the gate electrode 2a that is connected with grid line 2b, as the active layer 4 of switches conductive medium and the drain electrode 5a and the source electrode 5b of formation TFT raceway groove, source electrode 5b is connected with data line 5c; Passivation layer 6 on the drain electrode 5a offers the first passivation layer via hole 6a; Pixel electrode 7 is formed on pixel region, and is connected with drain electrode 5a through the first passivation layer via hole 6a, and the public electrode wire 5d that is arranged between the data line 5c at interval is positioned on the grid line 2b; And be provided with layer with drain electrode 5a, source electrode 5b and data line 5c; It is near offering the second passivation layer via hole 6b on the passivation layer on the end position of data line 5c 6, connection electrode 8 is provided with layer with pixel electrode 7, and the second passivation layer via hole 6b through two vicinities interconnects public electrode wire 5d.
In the present embodiment,, therefore public electrode wire is arranged on the grid line, when increasing MM CAP, has greatly increased aperture opening ratio because public electrode wire and drain electrode, source electrode and data line are provided with layer.
Said structure is merely the enforcement structure of TFT-LCD array base-plate structure of the present invention, under with public electrode wire and drain electrode, source electrode and the data line guiding theory with layer setting, other array base-plate structure form can be arranged also, repeats no more.
Fig. 7 is the process flow diagram of TFT-LCD array base-plate structure manufacturing approach first embodiment of the present invention, is specially:
Step 11, on substrate deposition grid metal level, through the first time composition technology form gate electrode and grid line figure;
Step 12, on the substrate of completing steps 11 successive sedimentation gate insulation layer and active layer, through the second time composition technology form active layer pattern;
Step 13, sedimentary origin leaks metal level on the substrate of completing steps 12, forms drain electrode, source electrode, data line and public electrode line graph through composition technology for the third time, and wherein public electrode wire is interrupted and is formed between two data lines;
Step 14, on the substrate of completing steps 13 deposit passivation layer, form first passivation layer via hole through the 4th composition technology in the drain electrode position, form second passivation layer via hole at public electrode wire near the end position of data line;
Step 15, on the substrate of completing steps 14 the deposit transparent conductive layer; Form the pixel electrode figure and form the connection electrode figure at pixel region through the 5th composition technology at the end regions of public electrode wire; Make pixel electrode pass through first passivation layer via hole and be connected, make connection electrode interconnect public electrode wire through second passivation layer via hole with drain electrode.
Particularly; Adopt the method for sputter or thermal evaporation, substrate (like glass substrate or quartz base plate) go up deposition one layer thickness be 500
～4000
the grid metal level.The grid metal level can use metal and alloys thereof such as Cr, W, Ti, Ta, Mo, Al, Cu, and the grid metal level also can be made up of the multiple layer metal film.Through the first time composition technology grid metal level is carried out etching, on substrate, form gate electrode and grid line figure.On the substrate of accomplishing gate electrode and grid line pattern through PECVD method successive sedimentation thickness be 1000
～4000
gate insulation layer, thickness be 1000
～4000
active layer, active layer comprise thickness be 1000
～3000
semiconductor layer He thickness be 300
～600
doping semiconductor layer (ohmic contact layer).Gate insulation layer can be selected oxide, nitride or oxynitrides for use.After above-mentioned each layer deposition accomplished, through the second time composition technology active layer is carried out etching, form active layer pattern.After forming active layer pattern; Method through sputter or thermal evaporation; Deposit thickness be 500
～2500
the source leak metal level, metal level is leaked in the source can select metal and alloys thereof such as Cr, W, Ti, Ta, Mo, Al, Cu for use.Through composition technology for the third time metal level is leaked in the source and carry out etching; Form drain electrode, source electrode, data line and public electrode line graph; It wherein between drain electrode and the source electrode TFT raceway groove figure; Etch away the doping semiconductor layer in the active layer fully in the TFT raceway groove figure, data line is vertical with grid line, and public electrode wire is interrupted and is formed between two data lines.After forming drain electrode, source electrode, data line and public electrode line graph; Through PECVD method deposit thickness be 700
～2000
passivation layer, passivation layer can adopt oxide, nitride or oxynitrides.Through the 4th composition technology passivation layer is carried out etching; Form first passivation layer via hole in the drain electrode position; Make first passivation layer via hole expose drain electrode; Form second passivation layer via hole at public electrode wire near the end position of data line, make second passivation layer via hole expose public electrode wire.At last; Method through sputter or thermal evaporation; Deposit thickness be 300
～600
transparency conducting layer, transparency conducting layer is generally tin indium oxide, indium zinc oxide or aluminum zinc oxide etc.Through the 5th composition technology transparency conducting layer is carried out etching; Form the pixel electrode figure at pixel region; Making pixel electrode pass through first passivation layer via hole is connected with drain electrode; End regions at public electrode wire forms the connection electrode figure, and connection electrode is interconnected adjacent public electrode wire through second passivation layer via hole.In technique scheme of the present invention, the alleged composition technology of the present invention comprises technologies such as photoresist coating, mask, exposure, etching.
The invention provides a kind of TFT-LCD array base-plate structure manufacturing approach; Though form MM CAP (Cst on Common) structure on public electrode wire equally; But public electrode wire and drain electrode, source electrode and data line are forming with in a composition technology; Being public electrode wire and drain electrode, source electrode and data line is provided with layer, forms two parallel-plates of MM CAP by public electrode wire and pixel electrode, and the vertical range between two parallel-plates is merely the thickness of passivation layer; Distance between MM CAP the two poles of the earth is dwindled greatly, helps the raising of MM CAP.In addition, because the section difference that public electrode wire brings is leaked metal layer thickness for the source, and metal layer thickness is leaked in the grid metal layer thickness source that is greater than usually, that is to say that the section difference of public electrode wire this moment is reduced, and this will help the raising of TFT-LCD contrast.Further, because public electrode wire and drain electrode, source electrode and data line are provided with layer, public electrode wire can be arranged between two grid lines, also can be arranged on the grid line, when increasing MM CAP, has greatly increased aperture opening ratio.
Fig. 8 is the process flow diagram of TFT-LCD array base-plate structure manufacturing approach second embodiment of the present invention, is specially:
Step 21, on substrate deposition grid metal level, through the first time composition technology form gate electrode, grid line and shield bars figure;
Step 22, on the substrate of completing steps 21 successive sedimentation gate insulation layer and active layer, through the second time composition technology form active layer pattern;
Step 23, sedimentary origin leaks metal level on the substrate of completing steps 22, forms drain electrode, source electrode, data line and public electrode line graph through composition technology for the third time, and wherein public electrode wire is interrupted and is formed between two data lines;
Step 25, on the substrate of completing steps 24 the deposit transparent conductive layer; Form the pixel electrode figure and form the connection electrode figure at pixel region through the 5th composition technology at the end regions of public electrode wire; Make pixel electrode pass through first passivation layer via hole and be connected, make connection electrode interconnect public electrode wire through second passivation layer via hole with drain electrode.
Different with the TFT-LCD array base-plate structure manufacturing approach first embodiment technical scheme of the present invention shown in Figure 7 is; Present embodiment is to form the shield bars pattern in the first time simultaneously in the composition technology; Be that shield bars and grid line are provided with layer, other process is basic identical, repeats no more.
Fig. 9 is the process flow diagram of TFT-LCD array base-plate structure manufacturing approach the 3rd embodiment of the present invention, is specially:
Step 33, sedimentary origin leaks metal level on the substrate of completing steps 32; Through the drain electrode of composition technology formation for the third time, source electrode, data line, public electrode wire and shield bars figure; Wherein public electrode wire is interrupted and is formed between two data lines, and shield bars is set in parallel in a side or two sides of data line;
Different with the TFT-LCD array base-plate structure manufacturing approach first embodiment technical scheme of the present invention shown in Figure 7 is; Present embodiment is to form the shield bars pattern simultaneously in the composition technology for the third time; Be that shield bars and public electrode wire are provided with layer; Shield bars can also be connected with public electrode wire, and other process is basic identical, repeats no more.
Figure 10 is the process flow diagram of TFT-LCD array base-plate structure manufacturing approach the 4th embodiment of the present invention, is specially:
Different with five composition technologies of TFT-LCD array base-plate structure manufacturing approach first embodiment of the present invention shown in Figure 7, present embodiment is four composition technologies.In four composition technologies of present embodiment; It is identical with aforementioned first embodiment with the technology of grid line figure, formation first passivation layer via hole and second passivation layer via hole, formation pixel electrode and connection electrode to form gate electrode; Different is with among first embodiment the second time composition technology and for the third time composition technology be merged into a composition technology; Be specially: on the substrate of accomplishing gate electrode and grid line pattern through PECVD method successive sedimentation thickness be 1000
～4000
gate insulation layer, thickness be 1000
～4000
active layer, active layer comprise thickness be 1000
～3000
semiconductor layer He thickness be 300
～600
doping semiconductor layer (ohmic contact layer).In the method for accomplishing on the substrate of above-mentioned technology through sputter or thermal evaporation; Deposit thickness be 500
～2500
the source leak metal level, metal level is leaked in the source can select metal and alloys thereof such as Cr, W, Ti, Ta, Mo, Al, Cu for use.Carry out shadow tone (HTM) or half exposure technology afterwards through mask plate; Earlier metal level is leaked in the source and carry out etching; And then the TFT raceway groove figure of double exposure area carries out ashing and etching processing; Forming active layer, drain electrode, source electrode, data line and public electrode line graph, is TFT raceway groove figure between drain electrode and the source electrode wherein, etches away the doping semiconductor layer in the active layer fully in the TFT raceway groove figure; Data line is vertical with grid line, and public electrode wire is interrupted and is formed between two data lines.Further, because public electrode wire and drain electrode, source electrode and data line are provided with layer, public electrode wire can be arranged between two grid lines, also can be arranged on the grid line, when increasing MM CAP, has greatly increased aperture opening ratio.Certainly, present embodiment also can form the shield bars pattern simultaneously in composition technology, repeat no more.
Said method is merely the practical implementation method of TFT-LCD array base-plate structure manufacturing approach of the present invention; Under with public electrode wire and drain electrode, source electrode and data line guiding theory, also can there be other technological process to form required array base-plate structure with layer formation.
What should explain at last is: above embodiment is only unrestricted in order to technical scheme of the present invention to be described; Although the present invention is specified with reference to preferred embodiment; Those of ordinary skill in the art is to be understood that; Can make amendment or be equal to replacement technical scheme of the present invention, and not break away from the spirit and the scope of technical scheme of the present invention.
Claims (12)
1. TFT-LCD array base-plate structure; Comprise the grid line and the data line that are formed on the substrate; Form pixel electrode in the pixel region that said grid line and data line limit, and form thin film transistor (TFT) at infall, said thin film transistor (TFT) comprises gate electrode, gate insulation layer, active layer, source-drain electrode layer and passivation layer; It is characterized in that; Comprise also being interrupted being arranged between the said data line and forming the public electrode wire of MM CAP that said public electrode wire and said source-drain electrode layer are with layer setting, and said public electrode wire interconnects through second passivation layer via hole and connection electrode with said pixel electrode.
2. TFT-LCD array base-plate structure according to claim 1; It is characterized in that; Said second passivation layer via hole is opened in said public electrode wire near the passivation layer on the end position of data line; Said connection electrode is formed on the said passivation layer, and through said second passivation layer via hole adjacent public electrode wire is interconnected.
3. TFT-LCD array base-plate structure according to claim 1 is characterized in that, also comprises the shield bars that laterally arranges with said data line, and said shield bars and said grid line layer together are provided with, or said shield bars and the layer setting together of said public electrode wire.
4. according to the described TFT-LCD array base-plate structure of arbitrary claim in the claim 1～3, it is characterized in that said public electrode wire is arranged between adjacent two grid lines.
5. according to the described TFT-LCD array base-plate structure of arbitrary claim in the claim 1～3, it is characterized in that said public electrode wire is provided with on the said grid line.
6. a TFT-LCD array base-plate structure manufacturing approach is characterized in that, comprising:
Step 1, on substrate deposition grid metal level, form gate electrode and grid line figure through composition technology;
Step 2, on the substrate of completing steps 1, deposit gate insulation layer, and form active layer, drain electrode, source electrode, data line and public electrode line graph, wherein public electrode wire is interrupted and is formed between two data lines;
Step 3, on the substrate of completing steps 2 deposit passivation layer, form first passivation layer via hole through composition technology in the drain electrode position, form second passivation layer via hole at public electrode wire near the end position of data line;
Step 4, on the substrate of completing steps 3 the deposit transparent conductive layer; Form the pixel electrode figure and form the connection electrode figure at pixel region through composition technology at the end regions of public electrode wire; Make pixel electrode pass through first passivation layer via hole and be connected, connection electrode is interconnected adjacent public electrode wire through second passivation layer via hole with drain electrode.
7. TFT-LCD array base-plate structure manufacturing approach according to claim 6 is characterized in that said step 2 is specially:
Step 21, on the substrate of completing steps 1 successive sedimentation gate insulation layer and active layer, form active layer pattern through composition technology;
Step 22, sedimentary origin leaks metal level on the substrate of completing steps 21, forms drain electrode, source electrode, data line and public electrode line graph through composition technology, and wherein public electrode wire is interrupted and is formed between two data lines.
8. TFT-LCD array base-plate structure manufacturing approach according to claim 6; It is characterized in that; Said step 2 is specially: metal level is leaked in successive sedimentation gate insulation layer, active layer and source on the substrate of completing steps 1; See through composition technology through shadow tone or half and form active layer, drain electrode, source electrode, data line and public electrode line graph, wherein public electrode wire is interrupted and is formed between two data lines.
9. TFT-LCD array base-plate structure manufacturing approach according to claim 7; It is characterized in that; Said step 22 is specially: sedimentary origin leaks metal level on the substrate of completing steps 21; Form drain electrode, source electrode, data line, public electrode wire and shield bars figure through composition technology, wherein public electrode wire is interrupted and is formed between two data lines, and shield bars is set in parallel in a side or two sides of data line.
10. TFT-LCD array base-plate structure manufacturing approach according to claim 6 is characterized in that said step 1 is specially: deposition grid metal level on substrate forms gate electrode, grid line and shield bars figure through composition technology.
11. according to the described TFT-LCD array base-plate structure of arbitrary claim manufacturing approach in the claim 6～9; It is characterized in that said public electrode wire is interrupted to be formed between two data lines and is specially: said public electrode wire is interrupted and is formed between two data lines and between adjacent two grid lines.
12. according to the described TFT-LCD array base-plate structure of arbitrary claim manufacturing approach in the claim 6～9; It is characterized in that said public electrode wire is interrupted to be formed between two data lines and is specially: said public electrode wire is interrupted and is formed between two data lines and is positioned on the said grid line.
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| CN102023433B (en) * | 2009-09-18 | 2012-02-29 | 北京京东方光电科技有限公司 | TFT-LCD array substrate and method for manufacturing the same |
| TWI422939B (en) * | 2010-12-10 | 2014-01-11 | Au Optronics Corp | Thin film transistor substrate of liquid crystal display panel |
| CN102929060B (en) | 2012-11-16 | 2015-06-17 | 京东方科技集团股份有限公司 | Array substrate, fabrication method of array substrate, and display device |
| CN103728795A (en) * | 2013-12-26 | 2014-04-16 | 深圳市华星光电技术有限公司 | Array substrate common electrode structure, manufacturing method thereof and array substrate |
| CN104062821B (en) * | 2014-06-05 | 2017-01-04 | 厦门天马微电子有限公司 | A kind of thin-film transistor array base-plate, display floater and display device |
| CN104076566B (en) * | 2014-07-21 | 2017-09-22 | 深圳市华星光电技术有限公司 | Display panel, array base palte and preparation method thereof |
| CN104183604A (en) * | 2014-08-04 | 2014-12-03 | 深圳市华星光电技术有限公司 | TET-LCD array substrate and manufacture method thereof |
| CN104793420B (en) * | 2015-05-08 | 2018-04-06 | 厦门天马微电子有限公司 | Array base palte and preparation method, display device |
| CN104808376B (en) * | 2015-05-11 | 2018-05-11 | 厦门天马微电子有限公司 | Array base palte and display device |
| CN105093750B (en) * | 2015-08-14 | 2018-11-23 | 深圳市华星光电技术有限公司 | Tft array substrate structure and preparation method thereof |
| CN105425495B (en) * | 2016-01-06 | 2018-11-30 | 京东方科技集团股份有限公司 | Array substrate and preparation method thereof, display panel and display device |
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