CN104793420B - Array base palte and preparation method, display device - Google Patents
Array base palte and preparation method, display device Download PDFInfo
- Publication number
- CN104793420B CN104793420B CN201510232553.4A CN201510232553A CN104793420B CN 104793420 B CN104793420 B CN 104793420B CN 201510232553 A CN201510232553 A CN 201510232553A CN 104793420 B CN104793420 B CN 104793420B
- Authority
- CN
- China
- Prior art keywords
- touch
- insulating barrier
- layer
- data wire
- bridge line
- Prior art date
- Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
- Active
Links
Classifications
-
- G—PHYSICS
- G02—OPTICS
- G02F—OPTICAL DEVICES OR ARRANGEMENTS FOR THE CONTROL OF LIGHT BY MODIFICATION OF THE OPTICAL PROPERTIES OF THE MEDIA OF THE ELEMENTS INVOLVED THEREIN; NON-LINEAR OPTICS; FREQUENCY-CHANGING OF LIGHT; OPTICAL LOGIC ELEMENTS; OPTICAL ANALOGUE/DIGITAL CONVERTERS
- G02F1/00—Devices or arrangements for the control of the intensity, colour, phase, polarisation or direction of light arriving from an independent light source, e.g. switching, gating or modulating; Non-linear optics
- G02F1/01—Devices or arrangements for the control of the intensity, colour, phase, polarisation or direction of light arriving from an independent light source, e.g. switching, gating or modulating; Non-linear optics for the control of the intensity, phase, polarisation or colour
- G02F1/13—Devices or arrangements for the control of the intensity, colour, phase, polarisation or direction of light arriving from an independent light source, e.g. switching, gating or modulating; Non-linear optics for the control of the intensity, phase, polarisation or colour based on liquid crystals, e.g. single liquid crystal display cells
- G02F1/133—Constructional arrangements; Operation of liquid crystal cells; Circuit arrangements
- G02F1/1333—Constructional arrangements; Manufacturing methods
- G02F1/13338—Input devices, e.g. touch panels
-
- G—PHYSICS
- G02—OPTICS
- G02F—OPTICAL DEVICES OR ARRANGEMENTS FOR THE CONTROL OF LIGHT BY MODIFICATION OF THE OPTICAL PROPERTIES OF THE MEDIA OF THE ELEMENTS INVOLVED THEREIN; NON-LINEAR OPTICS; FREQUENCY-CHANGING OF LIGHT; OPTICAL LOGIC ELEMENTS; OPTICAL ANALOGUE/DIGITAL CONVERTERS
- G02F1/00—Devices or arrangements for the control of the intensity, colour, phase, polarisation or direction of light arriving from an independent light source, e.g. switching, gating or modulating; Non-linear optics
- G02F1/01—Devices or arrangements for the control of the intensity, colour, phase, polarisation or direction of light arriving from an independent light source, e.g. switching, gating or modulating; Non-linear optics for the control of the intensity, phase, polarisation or colour
- G02F1/13—Devices or arrangements for the control of the intensity, colour, phase, polarisation or direction of light arriving from an independent light source, e.g. switching, gating or modulating; Non-linear optics for the control of the intensity, phase, polarisation or colour based on liquid crystals, e.g. single liquid crystal display cells
- G02F1/133—Constructional arrangements; Operation of liquid crystal cells; Circuit arrangements
- G02F1/1333—Constructional arrangements; Manufacturing methods
- G02F1/133345—Insulating layers
-
- G—PHYSICS
- G02—OPTICS
- G02F—OPTICAL DEVICES OR ARRANGEMENTS FOR THE CONTROL OF LIGHT BY MODIFICATION OF THE OPTICAL PROPERTIES OF THE MEDIA OF THE ELEMENTS INVOLVED THEREIN; NON-LINEAR OPTICS; FREQUENCY-CHANGING OF LIGHT; OPTICAL LOGIC ELEMENTS; OPTICAL ANALOGUE/DIGITAL CONVERTERS
- G02F1/00—Devices or arrangements for the control of the intensity, colour, phase, polarisation or direction of light arriving from an independent light source, e.g. switching, gating or modulating; Non-linear optics
- G02F1/01—Devices or arrangements for the control of the intensity, colour, phase, polarisation or direction of light arriving from an independent light source, e.g. switching, gating or modulating; Non-linear optics for the control of the intensity, phase, polarisation or colour
- G02F1/13—Devices or arrangements for the control of the intensity, colour, phase, polarisation or direction of light arriving from an independent light source, e.g. switching, gating or modulating; Non-linear optics for the control of the intensity, phase, polarisation or colour based on liquid crystals, e.g. single liquid crystal display cells
- G02F1/133—Constructional arrangements; Operation of liquid crystal cells; Circuit arrangements
- G02F1/136—Liquid crystal cells structurally associated with a semi-conducting layer or substrate, e.g. cells forming part of an integrated circuit
- G02F1/1362—Active matrix addressed cells
- G02F1/136227—Through-hole connection of the pixel electrode to the active element through an insulation layer
-
- G—PHYSICS
- G02—OPTICS
- G02F—OPTICAL DEVICES OR ARRANGEMENTS FOR THE CONTROL OF LIGHT BY MODIFICATION OF THE OPTICAL PROPERTIES OF THE MEDIA OF THE ELEMENTS INVOLVED THEREIN; NON-LINEAR OPTICS; FREQUENCY-CHANGING OF LIGHT; OPTICAL LOGIC ELEMENTS; OPTICAL ANALOGUE/DIGITAL CONVERTERS
- G02F1/00—Devices or arrangements for the control of the intensity, colour, phase, polarisation or direction of light arriving from an independent light source, e.g. switching, gating or modulating; Non-linear optics
- G02F1/01—Devices or arrangements for the control of the intensity, colour, phase, polarisation or direction of light arriving from an independent light source, e.g. switching, gating or modulating; Non-linear optics for the control of the intensity, phase, polarisation or colour
- G02F1/13—Devices or arrangements for the control of the intensity, colour, phase, polarisation or direction of light arriving from an independent light source, e.g. switching, gating or modulating; Non-linear optics for the control of the intensity, phase, polarisation or colour based on liquid crystals, e.g. single liquid crystal display cells
- G02F1/133—Constructional arrangements; Operation of liquid crystal cells; Circuit arrangements
- G02F1/136—Liquid crystal cells structurally associated with a semi-conducting layer or substrate, e.g. cells forming part of an integrated circuit
- G02F1/1362—Active matrix addressed cells
- G02F1/136286—Wiring, e.g. gate line, drain line
-
- G—PHYSICS
- G02—OPTICS
- G02F—OPTICAL DEVICES OR ARRANGEMENTS FOR THE CONTROL OF LIGHT BY MODIFICATION OF THE OPTICAL PROPERTIES OF THE MEDIA OF THE ELEMENTS INVOLVED THEREIN; NON-LINEAR OPTICS; FREQUENCY-CHANGING OF LIGHT; OPTICAL LOGIC ELEMENTS; OPTICAL ANALOGUE/DIGITAL CONVERTERS
- G02F1/00—Devices or arrangements for the control of the intensity, colour, phase, polarisation or direction of light arriving from an independent light source, e.g. switching, gating or modulating; Non-linear optics
- G02F1/01—Devices or arrangements for the control of the intensity, colour, phase, polarisation or direction of light arriving from an independent light source, e.g. switching, gating or modulating; Non-linear optics for the control of the intensity, phase, polarisation or colour
- G02F1/13—Devices or arrangements for the control of the intensity, colour, phase, polarisation or direction of light arriving from an independent light source, e.g. switching, gating or modulating; Non-linear optics for the control of the intensity, phase, polarisation or colour based on liquid crystals, e.g. single liquid crystal display cells
- G02F1/133—Constructional arrangements; Operation of liquid crystal cells; Circuit arrangements
- G02F1/136—Liquid crystal cells structurally associated with a semi-conducting layer or substrate, e.g. cells forming part of an integrated circuit
- G02F1/1362—Active matrix addressed cells
- G02F1/136231—Active matrix addressed cells for reducing the number of lithographic steps
-
- G—PHYSICS
- G02—OPTICS
- G02F—OPTICAL DEVICES OR ARRANGEMENTS FOR THE CONTROL OF LIGHT BY MODIFICATION OF THE OPTICAL PROPERTIES OF THE MEDIA OF THE ELEMENTS INVOLVED THEREIN; NON-LINEAR OPTICS; FREQUENCY-CHANGING OF LIGHT; OPTICAL LOGIC ELEMENTS; OPTICAL ANALOGUE/DIGITAL CONVERTERS
- G02F1/00—Devices or arrangements for the control of the intensity, colour, phase, polarisation or direction of light arriving from an independent light source, e.g. switching, gating or modulating; Non-linear optics
- G02F1/01—Devices or arrangements for the control of the intensity, colour, phase, polarisation or direction of light arriving from an independent light source, e.g. switching, gating or modulating; Non-linear optics for the control of the intensity, phase, polarisation or colour
- G02F1/13—Devices or arrangements for the control of the intensity, colour, phase, polarisation or direction of light arriving from an independent light source, e.g. switching, gating or modulating; Non-linear optics for the control of the intensity, phase, polarisation or colour based on liquid crystals, e.g. single liquid crystal display cells
- G02F1/133—Constructional arrangements; Operation of liquid crystal cells; Circuit arrangements
- G02F1/136—Liquid crystal cells structurally associated with a semi-conducting layer or substrate, e.g. cells forming part of an integrated circuit
- G02F1/1362—Active matrix addressed cells
- G02F1/136286—Wiring, e.g. gate line, drain line
- G02F1/136295—Materials; Compositions; Manufacture processes
Abstract
The invention discloses a kind of array base palte and preparation method, display device, wherein array base palte includes:Substrate, pixel cell, lay in the matrix form on the substrate, the pixel cell includes data wire and scan line arranged in a crossed manner, the scan line is set with the data wire with layer and material is identical, and the data wire disconnects with the infall of the scan line;First insulating barrier is arranged at the side of the data wire and the scan line away from the substrate, and first insulating barrier defines multiple first vias;Touch control electrode and touch-control cabling, formed in the side of first insulating barrier away from the substrate;First bridge line, the first bridge line is set with the touch-control cabling with layer and material is identical, and the first bridge line connects the data wire of adjacent disconnection by first via.The embodiment of the present invention sets the scan line and the data wire with layer, and the setting of layer of metal layer is reduced relative to prior art, so as to reach the purpose for reducing production cost, reducing substrate thickness.
Description
Technical field
The present embodiments relate to LCD Technology field, more particularly to it is a kind of array base palte and preparation method, aobvious
Showing device.
Background technology
LCDs, English are commonly referred to as LCD (Liquid Crystal Display), are belong to flat-panel screens one
Kind.With the development of science and technology, the current scientific and technological information products of LCD also develop towards light, thin, short, small target, either right angle shows
Show, low power consumption, small volume or the advantages that zero radiation, user can be allowed to enjoy optimal visual environment.
Display with touch controllable function is caused by the technology based on feature-richization, and relatively common touch technology has
In-cell touch technologies and On-cell touch technologies.Wherein, In-cell touch technologies refer to contact panel function being embedded into
The method of LCD intralamellar part, On-cell touch technologies refer to by part touch electrode structure be embedded into color membrane substrates and
Between Polarizer, another part is embedded into the method between color membrane substrates and array base palte.Because In-cell touch technologies can
Make display more frivolous, therefore be more concerned.
In the prior art, as shown in figure 1, the array base palte with touch controllable function, its processing procedure mainly include the following steps that:
S1, one layer of light shield layer 12 is formed on the substrate 11;S2, cushion 118 is formed above the light shield layer 12, in the cushion
118 tops form active layer 13;S3, carry out CHD channel dopings;S4, carry out ND-N type channel dopings;S5, in the active layer
13 tops form gate insulation layer 14, and the first metal layer 15 is formed above the gate insulation layer 14, and shape is etched using patterning processes
Into grid and scan line;S6, carry out PD-P type channel dopings;S7, form interlayer insulating film above the grid and scan line
16;S8, above the interlayer insulating film 16 formed second metal layer 17, etched using patterning processes to be formed source electrode, drain electrode and
Data wire;S9, planarization layer 18 is formed above the source electrode, drain electrode and data wire;S10, above the planarization layer 18
The 3rd metal level 19 is formed, etches to form touch-control cabling using patterning processes, and the first insulating barrier above the touch-control cabling
110;S11, touch control electrode layer is formed above first insulating barrier 110, etch to form touch control electrode using patterning processes
111;S12, above the touch control electrode 112 formed the second insulating barrier 113, etched using patterning processes to be formed it is exhausted through second
First via 114 of edge layer 113 while the second via 115 through the second insulating barrier 113 and the first insulating barrier 110 and simultaneously
Through the 3rd via 116 of the second insulating barrier 113, the first insulating barrier 110 and planarization layer 18;S13, in second insulating barrier
113 tops form pixel electrode 117.
The above-mentioned array base palte of the array base palte compared to not integrated touch controllable function in the prior art with touch controllable function,
Need to set up one layer of the 3rd metal level for being used to etch touch-control cabling, because the setting of the 3rd metal level causes production cost to increase
Add, substrate thickness thickens.
The content of the invention
The embodiment of the present invention provides a kind of array base palte and preparation method, display device, reduces one compared with prior art
The setting of layer metal level, so as to reach the purpose for reducing production cost, reducing substrate thickness.
In a first aspect, the embodiments of the invention provide a kind of array base palte, including:
Substrate;
Pixel cell, lay in the matrix form on the substrate, the pixel cell includes data wire arranged in a crossed manner
And scan line, the scan line and the data wire are set with layer and material is identical, and the data wire with the scan line
Infall disconnect;
First insulating barrier is arranged at the side of the data wire and the scan line away from the substrate, first insulation
Layer defines multiple vias;
Touch control electrode and touch-control cabling, formed in the side of first insulating barrier away from the substrate;
First bridge line, the first bridge line and the touch-control cabling are set with layer and material is identical, described first across
Bridge line connects the data wire of adjacent disconnection by first via.
Second aspect, the embodiment of the present invention also provide a kind of display device, including the battle array that first aspect present invention is provided
Row substrate.
The third aspect, the embodiment of the present invention also provide a kind of manufacture method of array base palte, including:
One substrate is provided;
The first metal layer is formed on the substrate, and scanning is formed on the first metal layer using patterning processes
Line, data wire and the pattern of drain electrode, the data wire disconnect with the infall of the scan line;
The first insulating barrier is formed on the first metal layer, and etches first insulating barrier and forms multiple first mistakes
Hole, first via expose the open end of the data wire;
Second metal layer is formed on the planarization layer, and is formed using patterning processes and is touched in the second metal layer
Cabling and the first bridge line are controlled, the first bridge line line connects two adjacent open ends by the first via;
The second insulating barrier is formed in the second metal layer;
Touch control electrode material layer is formed on second insulating barrier, and etches to form touch control electrode using patterning processes
Pattern;
The 3rd insulating barrier is formed in the touch control electrode;
Pixel electrode material layer is formed on the 3rd insulating barrier, and etches to form pixel electrode using patterning processes
Pattern.
The embodiment of the present invention is reduced by the way that the scan line and the data wire are set with layer relative to prior art
The setting of layer of metal layer, so as to reach the purpose for reducing production cost, reducing substrate thickness.
Brief description of the drawings
Fig. 1 is the structural representation of the array base palte provided in the prior art;
Fig. 2A is the top view for the array base palte that the embodiment of the present invention one provides;
Fig. 2 B are the A-A ' sectional views for the array base palte that the embodiment of the present invention one provides;
Fig. 2 C are position distribution when scan line is set with data wire with layer in the array base palte that the embodiment of the present invention one provides
Schematic diagram;
Fig. 2 D are the first structural representation of polysilicon layer in the array base palte that the embodiment of the present invention one provides;
Fig. 2 E are second of structural representation of polysilicon layer in the array base palte that the embodiment of the present invention one provides;
Fig. 3 A are the when the first bridge line and touch-control cabling are set with layer in the array base palte that the embodiment of the present invention two provides
A kind of position distribution schematic diagram;
Fig. 3 B are the sectional view for the array base palte that the embodiment of the present invention two provides;
Fig. 4 A are the when the first bridge line and touch-control cabling are set with layer in the array base palte that the embodiment of the present invention three provides
Two kinds of position distribution schematic diagrames;
Fig. 4 B are the first sectional view for the array base palte that the embodiment of the present invention three provides;
Fig. 4 C are second of sectional view of the array base palte that the embodiment of the present invention three provides;
Fig. 5 A are the first sectional view for the array base palte that the embodiment of the present invention four provides;
Fig. 5 B are second of sectional view of the array base palte that the embodiment of the present invention four provides;
Fig. 6 is the structural representation for the display device that the embodiment of the present invention five provides.
Embodiment
The present invention is described in further detail with reference to the accompanying drawings and examples.It is understood that this place is retouched
The specific embodiment stated is used only for explaining the present invention, rather than limitation of the invention.It also should be noted that in order to just
Part related to the present invention rather than entire infrastructure are illustrate only in description, accompanying drawing.
Embodiment one
Fig. 2A is the top view for the array base palte that the embodiment of the present invention one provides, and Fig. 2 B are what the embodiment of the present invention one provided
The sectional view of array base palte, with reference to shown in Fig. 2A and Fig. 2 B, specifically include:
Substrate 21;Pixel cell 22, it is laid in the matrix form on the substrate 21, the pixel cell 22 includes intersecting
The data wire 221 and scan line 222 of setting, the scan line 222 is set with the data wire 221 with layer and material is identical.Tool
Body, as shown in Figure 2 C, data wire 221 can be set in the first direction, the scan line 222 is set in a second direction, and
The data wire 221 disconnects with the infall of the scan line 222.First insulating barrier 23, it is arranged at the He of data wire 221
Side of the scan line 222 away from the substrate 21, first insulating barrier 23 define multiple first vias 24.Touch control electrode
25 and touch-control cabling 26, formed in side of first insulating barrier 23 away from the substrate 21.First bridge line 27, described
One bridge line 27 is set with the touch-control cabling 26 with layer and material is identical, and the first bridge line 27 passes through first via
The data wire 221 of the adjacent disconnection of 24 connections.
When making, the first metal layer is formed on the base plate (21, and the first metal layer is etched using patterning processes
Formed scan line 222, data wire 221, grid 201, source electrode 202 and drain 203 pattern, wherein the scan line 222 is along the
One direction extends, and the data wire 221 extends in a second direction, and make the data wire 221 with the scan line 222
Infall disconnects, and forms pattern as that shown in fig. 2 c.The first insulating barrier 23 is formed on the first metal layer, and described in etching
First insulating barrier 23 forms multiple first vias 24, and first via 24 exposes the open end of the data wire 221, wherein the
One insulating barrier 23 can be formed using organic film material.Second metal layer is formed on first insulating barrier 23, and uses composition
Technique forms the bridge line 27 of touch-control cabling 26 and first in the second metal layer, and wherein touch-control cabling 26 prolongs in a second direction
Stretch, and in order to increase aperture opening ratio, the touch-control cabling 26 is overlapping with the data wire 221 on printing opacity direction.Described first across
Bridge line 27 connects two adjacent open ends by the first via 24, so as to which the data wire 221 that will be switched off links together.In number
Touch control electrode material layer is continuously formed according to the top of line 221, and the pattern to form touch control electrode 25 is etched using patterning processes.
On the basis of the various embodiments described above, each pixel cell 22 includes a transistor switch 223, as shown in Figure 2 D,
The transistor switch 223 includes the polysilicon layer 223a (such as can be low temperature polycrystalline silicon) of a U-shaped, and the scan line 222 exists
The projection of the polysilicon layer 223a and two lateral sections of the polysilicon layer 223a overlap, and form double-gate structure, such as scheme
Dotted ellipse shown in 2D.Or as shown in Figure 2 E, the transistor switch 223 includes the polysilicon layer 223a of a L-shaped, institute
Scan line 222 is stated to overlap through a rim portion of the polysilicon layer 223a, and with through the another of the polysilicon layer 223a
Rim portion overlaps, and forms double-gate structure, dotted ellipse as shown in Figure 2 E.And polysilicon layer 223a and the scan line 222 and
Gate insulation layer 28 is separated between data wire 221.
When making, formed on the base plate (21 before the first metal layer, polycrystalline is formed on the base plate (21 using patterning processes
Silicon layer 223a, wherein the polysilicon layer 223a formed shape is as shown in Fig. 2 D or Fig. 2 E, the shape on the polysilicon layer 223a
Into gate insulation layer 28, the first metal layer is formed on the gate insulation layer 28.
The embodiment of the present invention is reduced by the way that the scan line and the data wire are set with layer relative to prior art
The setting of layer of metal layer, so as to reach the purpose for reducing production cost, reducing substrate thickness.
Embodiment two
The present embodiment is on the basis of above-described embodiment one, to the first bridge line 27 and the position relationship of touch-control cabling 26
Specific restriction.Such as Fig. 3 A, the bearing of trend phase of the first bridge line 27 and the data wire 221 and the touch-control cabling 26
Together, the first bridge line 27 is set with the touch-control cabling 26 with layer and material is identical, and the touch-control cabling 26 is described
At first bridge line 27 bending so as to the mutually insulated of the first bridge line 27.
During making, after forming second metal layer on the base plate (21, the first bridge line is formed simultaneously using patterning processes
27 and the touch-control cabling 26, and make the extension of the first bridge line 27 and the data wire 221 and the touch-control cabling 26
Direction is identical, and forms pattern as shown in Figure 3A.
In addition, pixel electrode 31 and touch-control cabling 26 and touch-control electricity are further described as shown in Figure 3 B, in the present embodiment
The specific attachment structure of pole 25, formed with the 4th insulating barrier 32 between the touch control electrode 25 and the touch-control cabling 26.Institute
State between pixel electrode 31 and the touch control electrode 25 formed with the 5th insulating barrier 33;4th insulating barrier 32 and the 5th insulate
Formed with the 4th via 34 in layer 33.The touch control electrode 25 and the touch-control cabling 26 pass through the 4th bridge 35 and the described 4th
Via 34 is connected with each other, and the 4th bridge 35 is located at same layer with the pixel electrode 31 and material is identical.
Array base palte described in the present embodiment only needs 12 processing procedures when making, and specifically includes:S1, on the base plate (21 shape
Into one layer of light shield layer 36;S2, cushion 37 is formed above the light shield layer 36, active layer is formed above the cushion 37
That is polysilicon layer 223a;S3, carry out CHD channel dopings;S4, carry out ND-N type channel dopings;S5, progress PD-P type raceway grooves are mixed
It is miscellaneous;S6, gate insulation layer 28 is formed above the polysilicon layer 223a, the first metal is formed above the gate insulation layer 28
Layer, etch to form grid 201, source electrode 202, drain electrode 203, data wire 221 and scan line 222 using patterning processes, and the number
Disconnected according to line 221 with the infall of the scan line 222, form pattern as shown in Figure 3A;S7, formed as shown in Figure 3A
Pattern after, up form the first insulating barrier 23, can use organic film material, and formed using lithographic technique through described
The via 24 of first insulating barrier 23 first, first via 24 expose the open end of the data wire 221;S8, described first
Second metal layer is formed on insulating barrier 23, and touch-control cabling 26 and first is formed in the second metal layer using patterning processes
Bridge line 27;S9, the 4th insulating barrier 32 is formed above the bridge line 27 of touch-control cabling 26 and first;S10, the described 4th insulation
The top of layer 32 forms touch control electrode material layer, and etches the pattern to form touch control electrode 25 using patterning processes;S11, in touch-control
The top of electrode 25 forms the 5th insulating barrier 33, and etches the 5th insulating barrier 33 and the 4th insulating barrier 32 the 4th mistake of formation
Hole 34, wherein the 4th via 34 includes the via for running through the 5th insulating barrier 33 and runs through the 5th insulating barrier 33 simultaneously
With a via of the 4th insulating barrier 32;S12, pixel electrode material layer is formed above the 5th insulating barrier 33, passed through
Patterning processes etch the pattern to form the bridge 35 of pixel electrode 31 and the 4th, so that touch control electrode 25 passes through the He of the 4th bridge 35
4th via 34 is completed to electrically connect with touch-control cabling 26.
The embodiment of the present invention is reduced by the way that the scan line and the data wire are set with layer relative to prior art
The setting of layer of metal layer, so as to reach the purpose for reducing production cost, reducing substrate thickness.Made simultaneously more than
Cheng Kezhi, the array base palte of the embodiment of the present invention only need 12 processing procedures, and 13 processing procedures compared to prior art reduce one
Road processing procedure, shortens processing time.
Embodiment three
The present embodiment is on the basis of above-described embodiment one, to the first bridge line and the tool of the touch-control cabling position relationship
Body limits.As shown in Figure 4 A, the bearing of trend phase of the first bridge line 27 and the data wire 221 and the touch-control cabling 26
Together, the first bridge line 27 is set with the touch-control cabling 26 with layer and material is identical, and the touch-control cabling 26 is described
Disconnected at first bridge line 27.
In order to connect the touch-control cabling 26 of disconnection, can be carried out by the material layer of touch control electrode 25 of the top of touch-control cabling 26 across
Bridging connects.Specifically, as shown in Figure 4 B, the array base palte also includes the second insulating barrier 41 and the second bridge line 42.It is described
Second insulating barrier 41 is arranged at the first bridge line 27 and the side of the touch-control cabling 26 away from the substrate, and described second
Insulating barrier 41 includes multiple second vias 43.The second bridge line 42 is located at same layer and material phase with the touch control electrode 25
Together, the second bridge line 42 is electrically connected the touch-control cabling 26 of the disconnection by second via 43.In addition, the above situation is
Touch-control cabling 26 and the situation of touch control electrode annexation are not present in pixel cell, for needing to walk touch-control in pixel cell
The situation that line 26 and touch control electrode are attached, the touch-control cabling 26 can be connected to touch control electrode 25 by pixel electrode 44.
As shown in Figure 4 C, the present embodiment also includes pixel electrode 44 and touch-control cabling 26 and the specific attachment structure of touch control electrode 25,
Formed with the 4th insulating barrier between the touch control electrode 25 and the touch-control cabling 26, wherein the 4th insulating barrier is above-mentioned second
Insulating barrier 41.Formed with the 5th insulating barrier 45 between the pixel electrode 44 and the touch control electrode 25.4th insulating barrier
41 and the 5th in insulating barrier 45 formed with the 4th via 46.The touch control electrode 25 and the touch-control cabling 26 pass through the 4th bridge
47 and the 4th via 46 be connected with each other, the 4th bridge 47 is located at same layer and material phase with the pixel electrode 44
Together.
As shown in Figure 4 C, when making, formed after second metal layer, formed using patterning processes as schemed on the base plate (21
The first bridge line 27 and the touch-control cabling 26 shown in 4A, and make the bridge line 27 along second of touch-control cabling 26 and first
Direction extends, and the first bridge line 27 forms the second insulating barrier 41 with the top of touch-control cabling 26, etches the shape of the second insulating barrier 41
Into the second via 43, wherein the second via 43 includes two vias, the both ends of the touch-control cabling 26 disconnected are corresponded to respectively, second
The top of insulating barrier 41 forms touch control electrode material layer, and etches to form the bridge line 42 of touch control electrode 25 and second using patterning processes
Pattern, the touch-control cabling 26 that will be switched off by the second via 43 so as to the second bridge line 42 links together, in touch-control
The top of electrode 25 forms the 5th insulating barrier 45, and etches the 5th insulating barrier 45 and second insulating barrier 32 the 4th mistake of formation
Hole 46, wherein the 4th via 46 includes the via for running through the 5th insulating barrier 45 and runs through the 5th insulating barrier 45 simultaneously
With a via of the 4th insulating barrier 41, pixel electrode material layer is formed above the 5th insulating barrier 45, passes through composition
Technique etches the pattern to form the bridge 47 of pixel electrode 44 and the 4th, so that touch control electrode 25 passes through the 4th bridge 47 and the 4th
Via 46 is completed to electrically connect with touch-control cabling 26.
The embodiment of the present invention is reduced by the way that the scan line and the data wire are set with layer relative to prior art
The setting of layer of metal layer, so as to reach the purpose for reducing production cost, reducing substrate thickness.
Example IV
On the basis of above-described embodiment, the present embodiment and the difference of above-mentioned implementation three are, the touch-control cabling 26 of disconnection
Bridge connection is carried out by the pixel electrode 31 of top.Specifically, as shown in Figure 5A, the array base palte also includes the 3rd insulation
The bridge line 52 of layer 51 and the 3rd.3rd insulating barrier 51 is arranged at side of the touch control electrode 25 away from the substrate 21,
3rd insulating barrier 51 includes multiple 3rd vias 53.The 3rd bridge line 52 is located at same layer with the pixel electrode 31
And material is identical, the 3rd bridge line 52 is electrically connected the touch-control cabling 26 of the disconnection by the 3rd via 53.On in addition,
The situation of stating is the pixel cell that need not be connected with touch control electrode, the pixel cell connected for needs with touch control electrode, described
Touch-control cabling 26 can be connected to touch control electrode 25 by pixel electrode 54, and as shown in Figure 5 B, the present embodiment also includes pixel electrode
54 and the specific attachment structure of touch-control cabling 26 and touch control electrode 25, between the touch control electrode 25 and the touch-control cabling 26
Formed with the 4th insulating barrier, wherein the 4th insulating barrier is above-mentioned 3rd insulating barrier 51.The pixel electrode 54 and the touch-control
Formed with the 5th insulating barrier 55 between electrode 25.Formed with the 4th via in 4th insulating barrier 51 and the 5th insulating barrier 55
56, the touch control electrode 25 and the touch-control cabling 26 are connected with each other by the 4th bridge 57 and the 4th via 56, described
4th bridge 57 is located at same layer with the pixel electrode 54 and material is identical.
As shown in Figure 5 B, the array base palte described in the present embodiment only needs 12 processing procedures when making, and specifically includes:S1、
One layer of light shield layer 58 is formed on the base plate (21;S2, cushion 59 is formed above the light shield layer 58, on the cushion 59
It is square into active layer be polysilicon layer 223a;S3, carry out CHD channel dopings;S4, carry out ND-N type channel dopings;S5, progress
PD-P type channel dopings;S6, gate insulation layer 28 is formed above the polysilicon layer 223a, it is square on the gate insulation layer 28
Into the first metal layer 15, etch to form grid 201, source electrode 202, drain electrode 203, data wire 221 and scan line using patterning processes
222, and the data wire 221 disconnects with the infall of the scan line 222, forms pattern as shown in Figure 3A;S7, in shape
Into after pattern as shown in Figure 3A, the first insulating barrier 23 is up formed, organic film material can be used, and use lithographic technique
Formation runs through the via 24 of the first insulating barrier 23 first, and first via 24 exposes the open end of the data wire 221;
S8, second metal layer is formed on first insulating barrier 23, and formed and touched in the second metal layer using patterning processes
Control the bridge line 27 of cabling 26 and first;S9, the 3rd insulating barrier 51 is formed above the bridge line 27 of touch-control cabling 26 and first;S10、
Touch control electrode material layer is formed above the 3rd insulating barrier 51, and etches to form touch control electrode 25 using patterning processes;
S11, the 5th insulating barrier 55 is formed above touch control electrode 25, and etch the 5th insulating barrier 55 and the 3rd insulating barrier 51
The 4th via 56 is formed, wherein the 4th via 56 includes two vias through the 5th insulating barrier 55, two vias point
Two touch control electrodes 25 are not exposed, and simultaneously through two mistakes of the 5th insulating barrier 55 and the 3rd insulating barrier 51
Hole, two vias correspond to the both ends of the touch-control cabling 26 disconnected respectively;S12, picture is formed above the 5th insulating barrier 55
Plain electrode material layer, the pattern to form the bridge 57 of pixel electrode 54 and the 4th is etched by patterning processes, so that touch control electrode
25 complete to electrically connect by the 4th bridge 57 and the 4th via 56 with touch-control cabling 26, and complete the touch-control cabling 26 disconnected simultaneously
Between electrical connection.
The embodiment of the present invention is reduced by the way that the scan line and the data wire are set with layer relative to prior art
The setting of layer of metal layer, so as to reach the purpose for reducing production cost, reducing substrate thickness.Made simultaneously more than
Cheng Kezhi, the array base palte of the embodiment of the present invention only need 12 processing procedures, and 13 processing procedures compared to prior art reduce one
Road processing procedure, shortens processing time.
Embodiment five
As shown in fig. 6, the embodiment of the present invention also provides a kind of display device, including above-described embodiment one to embodiment five is appointed
Array base palte 61 described in one, in addition to the color membrane substrates 62 being oppositely arranged with the array base palte 61, the array base palte 61
Liquid crystal layer 63 is provided between the color membrane substrates 62.
Display device described in the present embodiment include above-mentioned array base palte, its technical principle and caused technique effect with it is upper
It is similar to state array base palte, is described again here.
Pay attention to, above are only presently preferred embodiments of the present invention and institute's application technology principle.It will be appreciated by those skilled in the art that
The invention is not restricted to specific embodiment described here, can carry out for a person skilled in the art various obvious changes,
Readjust and substitute without departing from protection scope of the present invention.Therefore, although being carried out by above example to the present invention
It is described in further detail, but the present invention is not limited only to above example, without departing from the inventive concept, also
Other more equivalent embodiments can be included, and the scope of the present invention is determined by scope of the appended claims.
Claims (9)
- A kind of 1. array base palte, it is characterised in that including:Substrate;Pixel cell, lay in the matrix form on the substrate, the pixel cell includes data wire arranged in a crossed manner and swept Line is retouched, the scan line is set with the data wire with layer and material is identical, and the data wire is in the friendship with the scan line Disconnected at fork;First insulating barrier is arranged at the side of the data wire and the scan line away from the substrate, and first insulating barrier is determined Multiple first vias of justice;Touch control electrode and touch-control cabling, formed in the side of first insulating barrier away from the substrate;First bridge line, the first bridge line is set with the touch-control cabling with layer and material is identical, the first bridge line The data wire of adjacent disconnection is connected by first via;The first bridge line is identical with the bearing of trend of the data wire and the touch-control cabling,And the touch-control cabling disconnects at the first bridge line;The array base palte also includes the second insulating barrier and the second bridge line;Second insulating barrier is arranged at the first bridge line and the side of the touch-control cabling away from the substrate, and described Two insulating barriers include multiple second vias;The second bridge line is located at same layer with the touch control electrode and material is identical, and the second bridge line passes through second mistake The touch-control cabling electrical connection that hole will be switched off;OrThe array base palte also includes the 3rd insulating barrier and the 3rd bridge line;3rd insulating barrier is arranged at side of the touch control electrode away from the substrate, and the 3rd insulating barrier includes multiple 3rd via;The 3rd bridge line is located at same layer with pixel electrode and material is identical, and the 3rd bridge line will by the 3rd via The touch-control cabling electrical connection disconnected.
- 2. array base palte according to claim 1, it is characterised in that:Formed with the 4th insulating barrier between the touch control electrode and the touch-control cabling;Formed with the 5th insulating barrier between the pixel electrode and the touch control electrode;Formed with the 4th via in 4th insulating barrier and the 5th insulating barrier;The touch control electrode and the touch-control cabling are connected with each other by the 4th bridge and the 4th via, the 4th bridge It is located at same layer with the pixel electrode and material is identical.
- 3. array base palte according to claim 1, it is characterised in that:Each pixel cell further comprises that a transistor is opened Close, the transistor switch includes the polysilicon layer of a U-shaped, projection and the polycrystalline of the scan line in the polysilicon layer Two lateral sections of silicon layer overlap, and form double-gate structure.
- 4. array base palte according to claim 1, it is characterised in that:Each pixel cell further comprises that a transistor is opened Close, the transistor switch includes the polysilicon layer of a L-shaped, projection and the polycrystalline of the scan line in the polysilicon layer One rim portion of silicon layer overlaps, and is overlapped with another rim portion of the polysilicon layer, forms double-gate structure.
- 5. a kind of display device, it is characterised in that including the array base palte described in claim any one of 1-4;Also include and institute The color membrane substrates that array base palte is oppositely arranged are stated, liquid crystal layer is provided between the array base palte and the color membrane substrates.
- A kind of 6. manufacture method of array base palte, it is characterised in that including:One substrate is provided;Polysilicon layer is formed on the substrate using patterning processes;Gate insulation layer is formed on the polysilicon layer;The first metal layer is formed on the gate insulation layer, and the first metal layer is etched to form scanning using patterning processes Line, data wire and the pattern of drain electrode, the data wire disconnect with the infall of the scan line;The first insulating barrier is formed on the first metal layer, and etches first insulating barrier and forms multiple first vias, institute State the open end that the first via exposes the data wire;Second metal layer is formed on first insulating barrier, and touch-control is formed in the second metal layer using patterning processes Cabling and the first bridge line, the first bridge line connect two adjacent open ends by the first via;Touch control electrode material layer is formed above the second metal layer, and the figure to form touch control electrode is etched using patterning processes Case;The first bridge line is identical with the bearing of trend of the data wire;The touch-control cabling is identical with the bearing of trend of the data wire, and is disconnected at the first bridge line;Accordingly, in addition to:Etching forms the second via in the second insulating barrier, corresponding with the open end of the touch-control cabling;While the pattern to form touch control electrode is etched using patterning processes, synchronous etching forms the second bridge line, by the The touch-control cabling that the connection of two vias disconnects;OrEtching forms the 3rd via in the 3rd insulating barrier, corresponding with the open end of the touch-control cabling;While the pattern to form pixel electrode is etched using patterning processes, synchronous etching forms the second bridge line, by the The touch-control cabling that the connection of three vias disconnects.
- 7. according to the method for claim 6, it is characterised in that also include:In second insulating barrier and the 3rd insulating barrier the 4th via is formed using patterning processes;While the pattern to form pixel electrode is etched using patterning processes, synchronous etching forms the 4th bridge line, by the Four vias connect the touch-control cabling and the touch control electrode.
- 8. according to the method for claim 6, it is characterised in that:The polysilicon layer is u-shaped, and the scan line passes through two sides of the U-shaped, forms double-gate structure.
- 9. according to the method for claim 6, it is characterised in that:The polysilicon layer is in L-shaped, and the scan line passes through one side of the L-shaped, and with through the L-shaped another side Grid be connected, formed double-gate structure.
Priority Applications (1)
Application Number | Priority Date | Filing Date | Title |
---|---|---|---|
CN201510232553.4A CN104793420B (en) | 2015-05-08 | 2015-05-08 | Array base palte and preparation method, display device |
Applications Claiming Priority (1)
Application Number | Priority Date | Filing Date | Title |
---|---|---|---|
CN201510232553.4A CN104793420B (en) | 2015-05-08 | 2015-05-08 | Array base palte and preparation method, display device |
Publications (2)
Publication Number | Publication Date |
---|---|
CN104793420A CN104793420A (en) | 2015-07-22 |
CN104793420B true CN104793420B (en) | 2018-04-06 |
Family
ID=53558360
Family Applications (1)
Application Number | Title | Priority Date | Filing Date |
---|---|---|---|
CN201510232553.4A Active CN104793420B (en) | 2015-05-08 | 2015-05-08 | Array base palte and preparation method, display device |
Country Status (1)
Country | Link |
---|---|
CN (1) | CN104793420B (en) |
Families Citing this family (14)
Publication number | Priority date | Publication date | Assignee | Title |
---|---|---|---|---|
CN105137633B (en) * | 2015-07-29 | 2018-04-20 | 武汉华星光电技术有限公司 | Display panel and thin-film transistor array base-plate |
CN105138163B (en) * | 2015-07-30 | 2018-01-12 | 京东方科技集团股份有限公司 | A kind of organic electroluminescent touch-control display panel, its preparation method and display device |
CN106292036A (en) * | 2016-09-28 | 2017-01-04 | 厦门天马微电子有限公司 | A kind of array base palte, display device and preparation method thereof |
CN106842741B (en) * | 2017-01-18 | 2018-09-04 | 深圳市华星光电技术有限公司 | COA substrates and liquid crystal display panel |
CN106647083B (en) * | 2017-02-27 | 2019-07-16 | 厦门天马微电子有限公司 | A kind of array substrate, liquid crystal display panel and touch control display apparatus |
CN106908978B (en) * | 2017-04-28 | 2019-11-22 | 厦门天马微电子有限公司 | Touch-control display panel and touch control display apparatus |
US10459566B2 (en) * | 2017-05-26 | 2019-10-29 | Novatek Microelectronics Corp. | Display device and manufacturing method thereof |
CN108089760B (en) * | 2018-01-02 | 2022-03-04 | 武汉天马微电子有限公司 | Touch display panel and touch display device |
CN108279518A (en) * | 2018-01-29 | 2018-07-13 | 武汉华星光电技术有限公司 | In-cell touch display panel |
CN108364936A (en) * | 2018-02-26 | 2018-08-03 | 武汉华星光电技术有限公司 | Array substrate and preparation method thereof, display panel and display device |
CN108491110A (en) * | 2018-03-30 | 2018-09-04 | 武汉华星光电技术有限公司 | Touch panel |
US20220137751A1 (en) * | 2019-07-26 | 2022-05-05 | Boe Technology Group Co., Ltd. | Display substrate, display device, manufacturing method and driving method for display substrate |
CN110931515B (en) * | 2019-12-06 | 2022-08-26 | 武汉天马微电子有限公司 | Array substrate, display panel and display device |
CN115356879B (en) * | 2022-10-21 | 2023-01-03 | 广州华星光电半导体显示技术有限公司 | Display panel |
Family Cites Families (8)
Publication number | Priority date | Publication date | Assignee | Title |
---|---|---|---|---|
KR100777698B1 (en) * | 2001-04-17 | 2007-11-21 | 삼성전자주식회사 | thin film transistor array panel for a liquid crystal display and a manufacturing method thereof |
CN101520580B (en) * | 2008-02-28 | 2012-04-04 | 北京京东方光电科技有限公司 | TFT-LCD array substrate structure and manufacturing method thereof |
CN102034750B (en) * | 2009-09-25 | 2015-03-11 | 北京京东方光电科技有限公司 | Array substrate and manufacturing method thereof |
KR101524449B1 (en) * | 2011-12-22 | 2015-06-02 | 엘지디스플레이 주식회사 | Liquid crystal display device and Method for manufacturing the same |
CN102683353B (en) * | 2012-04-05 | 2014-12-17 | 南京中电熊猫液晶显示科技有限公司 | Array substrate for display device and producing method of array substrate |
CN203480182U (en) * | 2013-08-30 | 2014-03-12 | 京东方科技集团股份有限公司 | Array substrate and display device |
CN104020892B (en) * | 2014-05-30 | 2017-07-28 | 京东方科技集团股份有限公司 | A kind of In-cell touch panel and display device |
CN104503172A (en) * | 2014-12-19 | 2015-04-08 | 深圳市华星光电技术有限公司 | Array substrate and display device |
-
2015
- 2015-05-08 CN CN201510232553.4A patent/CN104793420B/en active Active
Also Published As
Publication number | Publication date |
---|---|
CN104793420A (en) | 2015-07-22 |
Similar Documents
Publication | Publication Date | Title |
---|---|---|
CN104793420B (en) | Array base palte and preparation method, display device | |
CN104777692B (en) | Array substrate and production method, touch-control display panel | |
CN104808376B (en) | Array base palte and display device | |
CN104898892B (en) | A kind of touch-control display panel and preparation method thereof, touch control display apparatus | |
CN107452757B (en) | A kind of display panel, its production method and display device | |
CN105159001B (en) | Array substrate and its manufacturing method, display panel and display device | |
CN104022126B (en) | Array substrate and manufacturing method thereof, and display apparatus | |
CN102403320B (en) | Array substrate, fabricating method for same and liquid crystal display panel | |
CN102937767B (en) | The method for making of array base palte, display device and array base palte | |
CN105161495B (en) | A kind of array substrate and preparation method thereof, display panel | |
CN105630247B (en) | A kind of array substrate | |
CN103413812B (en) | Array base palte and preparation method thereof, display device | |
CN104576658B (en) | A kind of array base palte and preparation method thereof and display | |
CN106292036A (en) | A kind of array base palte, display device and preparation method thereof | |
CN108428705A (en) | A kind of array substrate and preparation method thereof, display panel, display device | |
CN104765502B (en) | A kind of touch-control display panel and preparation method thereof, control method | |
CN106292103A (en) | A kind of array base palte and preparation method thereof, display floater, display device | |
CN105045434B (en) | Touch-control display panel and preparation method thereof and restorative procedure | |
CN205827025U (en) | A kind of array base palte and display floater | |
CN106024813B (en) | A kind of production method and related device of low temperature polycrystalline silicon tft array substrate | |
CN104460163B (en) | A kind of array base palte and preparation method thereof and display device | |
CN106502474B (en) | A kind of array substrate and display panel | |
CN103500730B (en) | A kind of array base palte and preparation method thereof, display device | |
CN106773227A (en) | A kind of manufacture method of liquid crystal display device and liquid crystal display device | |
CN107561800A (en) | A kind of array base palte, display panel and display device |
Legal Events
Date | Code | Title | Description |
---|---|---|---|
C06 | Publication | ||
PB01 | Publication | ||
EXSB | Decision made by sipo to initiate substantive examination | ||
SE01 | Entry into force of request for substantive examination | ||
GR01 | Patent grant | ||
GR01 | Patent grant |