CN101487962B - Display equipment with narrow frame structure and its driving method - Google Patents
Display equipment with narrow frame structure and its driving method Download PDFInfo
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- CN101487962B CN101487962B CN2009100056330A CN200910005633A CN101487962B CN 101487962 B CN101487962 B CN 101487962B CN 2009100056330 A CN2009100056330 A CN 2009100056330A CN 200910005633 A CN200910005633 A CN 200910005633A CN 101487962 B CN101487962 B CN 101487962B
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Abstract
A display device with a narrow frame area structure comprises a substrate, a plurality of data wires, a plurality of grid wires, a plurality of auxiliary grid wires and a driver module. The substrate is provided with an image display area and a frame area. The data wires, grid wires and auxiliary grid wires are arranged in the image display area and the driver module is arranged in the frame area. The grid wires and the data wires are mutually perpendicular, while the auxiliary grid wires are parallel to the data wires. Each auxiliary grid wire is electrically connected to the corresponding grid wire. The data wires and the auxiliary grid wires are electrically connected to the driver module in an alternative mode. In addition, the invention discloses a drive method: a plurality of grid signals provided by the driver module is fed to the grid wires through the auxiliary grid wires.
Description
Technical field
The present invention designs a kind of display device and its driving method, refers to a kind of display device and its driving method of tool narrow frame structure especially.
Background technology
Flat-panel screens (Flat Panel Display) is at present main popular display; Wherein LCD more because have that external form is frivolous, power saving and characteristic such as radiationless, and be widely used on the electronic products such as computer screen, mobile phone, PDA(Personal Digital Assistant), flat-surface television.The principle of work of LCD changes the ordered state of the liquid crystal molecule in the liquid crystal layer for the voltage difference that utilize to change the liquid crystal layer two ends, in order to change the light transmission of liquid crystal layer, to cooperate backlight module again the light source that provided with show image.
Fig. 1 is the synoptic diagram of known LCD.As shown in Figure 1, LCD 100 comprises infrabasal plate 110 and upper substrate 190, and liquid crystal layer (not illustrating) promptly is folded between infrabasal plate 110 and the upper substrate 190.Upper substrate 190 is a colored filter, is used for the display color picture.Infrabasal plate 110 comprises many data lines 130, many gate lines 150, many supplementary gate polar curves 155, first rim area 180, second rim area 185, image viewing area 195 and driver module 101.Many data line 130 is arranged at image viewing area 195 with many gate lines 150.Many supplementary gate polar curve 155 is arranged at first rim area 180 and second rim area 185.Driver module 101 is electrically connected on many supplementary gate polar curves 155, in order to a plurality of signals that provided are fed into many gate lines 150 through many supplementary gate polar curves 155.Driver module 101 is electrically connected on many data lines 130 in addition, in order to a plurality of data-signals that provided are fed into a plurality of pixel cell (not shown)s through many data lines 130.LCD 100 is promptly controlled a plurality of data-signals according to a plurality of signals and is write to a plurality of pixel cells, in order to show image.
Because in the structure of known LCD 100; The number of supplementary gate polar curve 155 equals the number of gate line 150 in fact; So infrabasal plate 110 just need provide enough wide first rim area 180 and second rim area 185, in order to many supplementary gate polar curves 155 to be set.Yet, because the display that most of portable electronic devices is installed is small-sized LCD, so how to reduce the rim area area to reduce the important topic that the infrabasal plate size is the small design LCD.
Summary of the invention
According to embodiments of the invention, the liquid crystal indicator that it discloses a kind of tool narrow frame structure comprises substrate, many data lines, many gate lines, many supplementary gate polar curves and driver module.Substrate has image viewing area (Image Display Area) and rim area (Border Area), and wherein rim area is substantially around the image viewing area.Many data line is parallel, is arranged at the image viewing area of substrate.Many gate line is parallel, is arranged at the image viewing area of substrate, and orthogonal with many data lines substantially.Many the supplementary gate polar curve is parallel, is arranged at the image viewing area of substrate, and parallel to each other with many data lines substantially.Each bar supplementary gate polar curve is electrically connected on corresponding gate line.Drive module setting is in the rim area of substrate, and is electrically connected on many data lines and many supplementary gate polar curves.
According to embodiments of the invention, it discloses a kind of driving method in addition, and comprise: a display device is provided, and this display device comprises a substrate, has an image viewing area, one first rim area, one second rim area and one the 3rd rim area; Many data line bits are arranged at this image viewing area on this substrate; One first group of gate line, one second group of gate line and one the 3rd group of gate line are arranged at this image viewing area; Many first supplementary gate polar curves are arranged at this image viewing area, and each bar first supplementary gate polar curve is electrically connected on a corresponding gate line of this first group of gate line; Many second supplementary gate polar curves are arranged at this first rim area, and each bar second supplementary gate polar curve is electrically connected on a corresponding gate line of this second group of gate line; Many articles the 3rd supplementary gate polar curves are arranged at this second rim area, and each article the 3rd supplementary gate polar curve is electrically connected on a corresponding gate line of the 3rd group of gate line; An and driver module; Have a plurality of data-out ports, a plurality of first output port, a plurality of second output port and a plurality of the 3rd output port; Be arranged at the 3rd rim area; Each data-out port is electrically connected on a corresponding data line, and each first output port is electrically connected on corresponding second a supplementary gate polar curve, and each second output port is electrically connected on corresponding first a supplementary gate polar curve; Each the 3rd output port is electrically connected on corresponding the 3rd a supplementary gate polar curve, and wherein said data-out port and said second output port are arranged at this driver module with interleaving mode; The order that a plurality of first grid signals are complied with a first direction from said first output port exports the said second supplementary gate polar curve to; The order that a plurality of second grid signals are complied with a second direction from said second output port exports the said first supplementary gate polar curve to; And the order that a plurality of the 3rd signals are complied with this second direction from said the 3rd output port exports said the 3rd supplementary gate polar curve to.
According to embodiments of the invention, it discloses a kind of driving method in addition, and comprise: a display device is provided, and this display device comprises a substrate, has an image viewing area, one first rim area and one second rim area; Many data line bits are arranged at this image viewing area on this substrate; One first group of gate line and one second group of gate line are arranged at this image viewing area; Many first supplementary gate polar curves are arranged at this image viewing area, and each bar first supplementary gate polar curve is electrically connected on a corresponding gate line of this first group of gate line; Many second supplementary gate polar curves are arranged at this first rim area, and each bar second supplementary gate polar curve is electrically connected on a corresponding gate line of this second group of gate line; An and driver module; Have a plurality of data-out ports, a plurality of first output port and a plurality of second output port; Be arranged at this second rim area, each data-out port is electrically connected on a corresponding data line, and each first output port is electrically connected on corresponding second a supplementary gate polar curve; Each second output port is electrically connected on corresponding first a supplementary gate polar curve, and wherein said data-out port and said second output port are arranged at this driver module with interleaving mode; The order that a plurality of first grid signals are complied with a first direction from said first output port exports the said second supplementary gate polar curve to; And the order that a plurality of second grid signals are complied with a second direction from said second output port exports the said first supplementary gate polar curve to.
Description of drawings
Fig. 1 is the synoptic diagram of known LCD;
Fig. 2 is the synoptic diagram of the LCD of first embodiment of the invention;
Fig. 3 is the synoptic diagram of the LCD of second embodiment of the invention;
Fig. 4 is the signal waveform synoptic diagram of the LCD work of Fig. 3, and wherein transverse axis is a time shaft;
Fig. 5 is the synoptic diagram of the LCD of third embodiment of the invention;
Fig. 6 is the synoptic diagram of the LCD of fourth embodiment of the invention;
Fig. 7 is the signal waveform synoptic diagram of the LCD work of Fig. 6, and wherein transverse axis is a time shaft;
Fig. 8 is the synoptic diagram of the LCD of fifth embodiment of the invention;
Fig. 9 is the signal waveform synoptic diagram of the LCD work of Fig. 8, and wherein transverse axis is a time shaft;
Figure 10 is the synoptic diagram of the LCD of sixth embodiment of the invention;
Figure 11 is the signal waveform synoptic diagram of the LCD work of Figure 10, and wherein transverse axis is a time shaft;
Figure 12 is the synoptic diagram of the LCD of seventh embodiment of the invention;
Figure 13 is the signal waveform synoptic diagram of the LCD work of Figure 12, and wherein transverse axis is a time shaft;
Figure 14 is the synoptic diagram of the LCD of eighth embodiment of the invention;
Figure 15 is the synoptic diagram of the LCD of nineth embodiment of the invention;
Figure 16 is the synoptic diagram of the LCD of tenth embodiment of the invention;
Figure 17 is the synoptic diagram of the LCD of eleventh embodiment of the invention;
Figure 18 is the synoptic diagram of the LCD of twelveth embodiment of the invention;
Figure 19 is the synoptic diagram of the LCD of thriteenth embodiment of the invention;
Figure 20 is arranged at the LCD of many second supplementary gate polar curves of identical layer along the diagrammatic cross-section of dotted line AA ' for the tool of Figure 19;
Figure 21 is arranged at the LCD of many second supplementary gate polar curves of dissimilar layer along the diagrammatic cross-section of dotted line AA ' for the tool of Figure 19;
Figure 22 is the synoptic diagram of the LCD of fourteenth embodiment of the invention;
Figure 23 is the synoptic diagram of the LCD of fifteenth embodiment of the invention;
Figure 24 is arranged at the LCD of many second supplementary gate polar curves of identical layer along the diagrammatic cross-section of dotted line BB ' for the tool of Figure 23;
Figure 25 is arranged at the LCD of many second supplementary gate polar curves of dissimilar layer along the diagrammatic cross-section of dotted line BB ' for the tool of Figure 23;
Figure 26 is the synoptic diagram of the LCD of sixteenth embodiment of the invention;
Figure 27 is arranged at the LCD of many second supplementary gate polar curves of dissimilar layer along the diagrammatic cross-section of dotted line CC ' for the tool of Figure 26;
Figure 28 is the synoptic diagram of the LCD of seventeenth embodiment of the invention.
Wherein, Reference numeral
100,200,300,500,596,597,598,599,600,696,700,796,797,798,799,893,895 LCDs
101,201,501,601,701 driver modules
110,210,310,510,610,710 infrabasal plates
130,230,530,630,730 data lines
150,250,550,650,750 gate lines
155,255 supplementary gate polar curves
180,280,580,680,780,880 first rim area
185,285,585,685,785,881,882,883,884,885 second rim area
190,290,390,590,690,790 upper substrates
195,295,595,695,795 image viewing areas
205,505,605,705 drivers
260,560,660,760 first pixel cells
261 first data switches
263 first storage elements
265,565,665,765 second pixel cells
266 second data switches
268 second storage elements
269 pixel cells
288,588,688,788 the 3rd rim area
541,641,741 first interior zones
542,642,742 second interior zones
543 the 3rd interior zones
555,655,755 first supplementary gate polar curves
556,658,759 second supplementary gate polar curves
557 the 3rd supplementary gate polar curves
560 first pixel cells
565 second pixel cells
770 common electrode lines
775,873,875 openings
776 first insulation courses
777 second insulation courses
781,786,787,887,888,889 adjustment layers
DL1, DL2, DLt-1, DLt, DLn-1～DLn+2 data line
DO1, DO2, DOt-1, DOt data-signal
GAm-1～GAm+1 supplementary gate polar curve
G1, G2, Gx-1, Gx, Gx+1, Gx+2, Gw-1, Gw, Gw+1, Gu-1, Gu, Gm-1～Gm+3 gate line
GO1, GO2, GOx-1, GOx first grid signal
GOw, GOw+1, GOu-1, GOu the 3rd signal
P1, P2, Px-1, Px first output port
Px+1, Px+3, Py-2, Py data-out port
Px+2, Px+4, Py-1 second output port
Py+1, Py+2, Pz-1, Pz the 3rd output port
P (m-1) x (n-1)～P (m+2) x (n+1) first pixel cell
P (m-1) y (n-1)～P (m+2) y (n+1) second pixel cell
SDn-1～SDn+2 data-signal
SG1, SG2, SGx-1, SGx, SGx+1, SGx+2, SGw-1, SGw, SGw+1, SGu-1, SGu, SGm-1～SGm+3 signal
T1, T2, T3, T4, T5, T6 period
The Vcom common voltage
Embodiment
For making the present invention more apparent and understandable, hereinafter is according to display device and its driving method of tool narrow frame structure of the present invention, and the special embodiment that lifts cooperates appended accompanying drawing to elaborate, but the scope that the embodiment that is provided is not contained in order to restriction the present invention.
Fig. 2 is the synoptic diagram of the LCD of first embodiment of the invention.As shown in Figure 2, LCD 200 comprises infrabasal plate 210 and upper substrate 290, and liquid crystal layer promptly is folded between infrabasal plate 210 and the upper substrate 290.Upper substrate 290 can be colored filter, is used for the display color picture.Infrabasal plate 210 comprises many data lines that laterally arrange 230, many gate lines that laterally arrange 250, many supplementary gate polar curves that laterally arrange 255, first rim area 280, second rim area 285, the 3rd rim area 288, image viewing area 295 and driver module 201.First rim area 280, second rim area 285, with the 3rd rim area 288 substantially around image viewing area 295; Rim area is at least partly around image viewing area 295; For example, first rim area 280, second rim area 285, be adjacent to three sides of image viewing area 295 substantially with the 3rd rim area 288.Many data lines 230, many gate lines 250 are arranged at image viewing area 295 with many supplementary gate polar curves 255, and driver module 201 is arranged at the 3rd rim area 288.Many gate line 250 is orthogonal with many data lines 230 substantially.Many 255 of supplementary gate polar curves are parallel to many data lines 230.Each bar supplementary gate polar curve 255 is electrically connected on corresponding gate line 250.In the embodiment shown in Figure 2, only from driver module 201 cablings to corresponding gate line 250, in another embodiment, each bar supplementary gate polar curve 255 extends to the edge of image viewing area 295 to each bar supplementary gate polar curve 255.Driver module 201 is electrically connected on many supplementary gate polar curves 255, in order to a plurality of signals that provided are fed into many gate lines 250 through many supplementary gate polar curves 255.Driver module 201 is electrically connected on many data lines 230 in addition, in order to a plurality of data-signals that provided are fed into a plurality of pixel cell (not shown)s through many data lines 230.LCD 200 is promptly controlled a plurality of data-signals according to a plurality of signals and is write to a plurality of pixel cells, in order to show image.
In one embodiment, driver module 201 comprises at least one driver 205, is used to provide a plurality of data-signals bar data line 230 at the most, and a plurality of signals bar supplementary gate polar curve 255 at the most is provided.In another embodiment, driver module 201 comprises a plurality of drivers 205, and a plurality of drivers 205 comprise at least one source electrode driver and at least one gate drivers.Source electrode driver is electrically connected on many data lines 230, in order to a plurality of data-signals to be provided.Gate drivers is electrically connected on many supplementary gate polar curves 255, in order to a plurality of signals bar gate line 250 at the most to be provided.
Because many supplementary gate polar curves 255 all are arranged at image viewing area 295; That is first rim area 280 and second rim area 285 do not need in order to any supplementary gate polar curve 255 to be set, therefore can significantly dwindle the size of the width of first rim area 280 and second rim area 285 with reduction infrabasal plate 210.So LCD 200 is particularly suitable for the miniscope installed as portable electron device.
Fig. 3 is the synoptic diagram of the LCD of second embodiment of the invention.As shown in Figure 3, LCD 300 comprises infrabasal plate 310 and upper substrate 390, and liquid crystal layer promptly is folded between infrabasal plate 310 and the upper substrate 390.Upper substrate 390 can be colored filter, is used for the display color picture.The circuit structure of infrabasal plate 310 is similar to the circuit structure of infrabasal plate shown in Figure 2 210.Infrabasal plate 310 is with half data driver (Half Source Driver; HSD) technology is provided with a plurality of pixel cells 269; That is in the array of a plurality of pixel cells 269; Many data lines 230 are not to be coupled directly to all pixel cells 269, and have only the strange ordering of each row or a plurality of pixel cells 269 of idol ordering to be coupled directly to many data lines 230.So compared to known LCD 100, the number of data line 230 can be reduced to number half the of data line 130 in fact, and the cabling zone of omitted data line 230 is promptly in order to be provided with supplementary gate polar curve 255.
A plurality of pixel cells 269 comprise a plurality of first pixel cells 260 and a plurality of second pixel cells 265.Each first pixel cell 260 comprises first data switch 261 and first storage element 263.First data switch 261 comprises first end, second end and gate terminal, and wherein first end is electrically connected on respective data lines 230, the second ends and is electrically connected on corresponding second pixel cell 265, and gate terminal is electrically connected on corresponding gate line 250.First data switch 261 is thin film transistor (TFT) (Thin Film Transistor) or metal-semiconductor field effect metal-semiconductor field effect transistor (Metal Oxide Semiconductor Field Effect Transistor).First storage element 263 comprises first end and second end, and wherein first end of first storage element 263 is electrically connected on second end of corresponding first data switch 261, and second end of first storage element 263 is in order to receive common voltage Vcom.First storage element 263 comprises liquid crystal capacitance (Liquid Crystal Capacitor).
Each second pixel cell 265 comprises second data switch 266 and second storage element 268.Second data switch 266 comprises first end, second end and gate terminal; Wherein first end of second data switch 266 is electrically connected on second end of corresponding first data switch 261; The gate terminal that second end of second data switch 266 is electrically connected on corresponding second storage element, 268, the second data switches 266 is electrically connected on corresponding gate line 250.Second data switch 266 is thin film transistor (TFT) or metal-semiconductor field effect transistor.Second storage element 268 comprises first end and second end, and wherein first end of second storage element 268 is electrically connected on second end of corresponding second data switch 266, and second end of second storage element 268 is in order to receive common voltage Vcom.Second storage element 268 comprises liquid crystal capacitance.Please note; Each bar supplementary gate polar curve 255 is arranged between corresponding first pixel cell 260 and corresponding second pixel cell 265; That is in first adjacent pixel cell 260 and the zone of the cabling between second pixel cell 265; If data line 230 is not set, just can be in order to supplementary gate polar curve 255 to be set.
Please continue with reference to figure 3, each first pixel cell 260 all is coupled directly to respective data lines 230, so 230 data signals transmitted of each bar data line can write corresponding first storage element 263 through corresponding first data switch 261.Indirect coupling is in respective data lines 230 as for corresponding first pixel cell 260 of 265 warps of each second pixel cell, so 230 data signals transmitted of each bar data line are through corresponding first data switch 261 and corresponding second data switch 266 and write corresponding second storage element 268.
Fig. 4 is the signal waveform synoptic diagram of the LCD work of Fig. 3, and wherein transverse axis is a time shaft.In Fig. 4, basipetal signal is respectively signal SGm-1, signal SGm, signal SGm+1 and signal SGm+2.In period T1; Signal SGm-1 and signal SGm are high level; In order to a plurality of first data switches 261 and a plurality of second data switches 266 of conducting (m-1) row, so a plurality of data-signal just can write a plurality of second storage elements 268 of (m-1) row from many data lines 230.For example; The signal SGm-1 of high level can be through supplementary gate polar curve GAm-1 and gate lines G m-1 and is transferred to first pixel cell P (m-1) x (n-1) with its first data switch 261 of conducting; The signal SGm of high level can be through supplementary gate polar curve GAm and gate lines G m and is transferred to second pixel cell P (m-1) y (n-1) with its second data switch 266 of conducting, so data-signal SDn just can write to second storage element 268 of second pixel cell P (m-1) y (n-1) from data line DLn.At this moment, though data-signal SDn also can write to first storage element 263 of first pixel cell P (m-1) x (n-1) from data line DLn, can be covered by the data-signal that the period write subsequently.
In period T2; Signal SGm-1 remains on high level; Signal SGm then switches to low level, in order to keeping the conducting state of a plurality of first data switches 261 of (m-1) row, and a plurality of second data switches 266 of (m-1) row is switched to cut-off state; So a plurality of data-signals just can write a plurality of first storage elements 263 of (m-1) row from many data lines 230, and keep a plurality of data-signals of a plurality of second storage elements 268 of (m-1) row.Note that the data-signal of a plurality of first storage elements 263 that in period T2, write (m-1) row, can be covered in the data-signal of a plurality of first storage elements 263 that write (m-1) row in the period T1.
In period T3; Signal SGm and signal SGm+1 are high level; And signal SGm-1 is a low level; In order to a plurality of first data switches 261 and a plurality of second data switches 266 of conducting m row, so a plurality of data-signal just can write a plurality of second storage elements 268 of m row from many data lines 230.For example; The signal SGm of high level can be through supplementary gate polar curve GAm and gate lines G m and is transferred to the first pixel cell Pmxn with its first data switch 261 of conducting; The signal SGm+1 of high level can be through supplementary gate polar curve GAm+1 and gate lines G m+1 and is transferred to the second pixel cell Pmyn with its second data switch 266 of conducting, so data-signal SDn just can write to second storage element 268 of the second pixel cell Pmyn from data line DLn.At this moment, though data-signal SDn also can write to first storage element 263 of the first pixel cell Pmxn from data line DLn, can be covered by the data-signal that the period write subsequently.
In period T4; Signal SGm remains on high level; Signal SGm+1 then switches to low level, in order to the conducting state of a plurality of first data switches 261 of keeping m row, and a plurality of second data switches 266 of m row is switched to cut-off state; So a plurality of data-signals just can write a plurality of first storage elements 263 of m row from many data lines 230, and keep a plurality of data-signals of a plurality of second storage elements 268 of m row.Note that in period T4 the data-signal of a plurality of first storage elements 263 of the m that writes row, can be covered in the data-signal of a plurality of first storage elements 263 that the m that writes of institute is listed as in the period T3.
In period T5; Signal SGm+1 and signal SGm+2 are high level; In order to a plurality of first data switches 261 and a plurality of second data switches 266 of conducting (m+1) row, so a plurality of data-signal just can write a plurality of second storage elements 268 of (m+1) row from many data lines 230.In period T6; Signal SGm+1 remains on high level; Signal SGm+2 then switches to low level, in order to keeping the conducting state of a plurality of first data switches 261 of (m+1) row, and a plurality of second data switches 266 of (m+1) row is switched to cut-off state; So a plurality of data-signals just can write a plurality of first storage elements 263 of (m+1) row from many data lines 230, and keep a plurality of data-signals of a plurality of second storage elements 268 of (m+1) row.
Fig. 5 is the synoptic diagram of the LCD of third embodiment of the invention.As shown in Figure 5, LCD 500 comprises infrabasal plate 510 and upper substrate 590, and liquid crystal layer promptly is folded between infrabasal plate 510 and the upper substrate 590.Upper substrate 590 can be colored filter, is used for the display color picture.The 3rd supplementary gate polar curve 557 that the second supplementary gate polar curve 556 that the first supplementary gate polar curve 555 that infrabasal plate 510 comprises that many data lines that laterally arrange 530, many gate lines that laterally arrange 550, many laterally arrange, many laterally arrange, many laterally arrange, a plurality of first pixel cell 560, a plurality of second pixel cell 565, first rim area 580, second rim area 585, the 3rd rim area 588, image viewing area 595 and driver module 501.First rim area 580, second rim area 585, with the 3rd rim area 588 substantially around image viewing area 595, for example, first rim area 580, second rim area 585, be adjacent to three sides of image viewing area 595 substantially with the 3rd rim area 588.Many data lines 530, many gate lines 550, a plurality of first pixel cell 560, a plurality of second pixel cells 565 are arranged at image viewing area 595 with many first supplementary gate polar curves 555, and driver module 501 is arranged at the 3rd rim area 588.Many gate line 550 is orthogonal with many data lines 530 substantially.
Many gate lines 550 comprise first group of gate line 550, second group of gate line 550 and the 3rd group of gate line 550.Second group of gate line 550 is arranged at first interior zone 541 of image viewing area 595.First interior zone 541 is adjacent to the 3rd rim area 588.The 3rd group of gate line 550 is arranged at second interior zone 542 of image viewing area 595.First group of gate line 550 is arranged at the 3rd interior zone 543 of image viewing area 595; First interior zone 541 be positioned at the 3rd interior zone 543, first rim area 580, second rim area 585, with the 3rd rim area 588 around the zone that goes out, the 3rd interior zone 543 be positioned at second interior zone 542, first rim area 580, second rim area 585, with the 3rd rim area 588 around the zone that goes out.Many first supplementary gate polar curves 555 are parallel to the corresponding gate line 550 that many data lines 530, the first supplementary gate polar curves 555 are electrically connected on first group of gate line 550 respectively.Many second supplementary gate polar curves 556 are arranged at first rim area 580, and are parallel to the corresponding gate line 550 that many data lines 530, the second supplementary gate polar curves 556 are electrically connected on second group of gate line 550 respectively.Many articles the 3rd supplementary gate polar curves 557 are arranged at second rim area 585, and are parallel to the corresponding gate line 550 that many data lines 530, the three supplementary gate polar curves 557 are electrically connected on the 3rd group of gate line 550 respectively.In other words, each bar gate line 550 is electrically connected on the first supplementary gate polar curve 555, the second supplementary gate polar curve 556 or the 3rd supplementary gate polar curve 557.
In one embodiment; Driver module 501 comprises at least one driver 505; Be used to provide a plurality of data-signals bar data line 530 at the most, and a plurality of signals the bar first supplementary gate polar curve 555, many second supplementary gate polar curves 556 and many articles the 3rd supplementary gate polar curves 557 at the most are provided.In another embodiment, driver module 501 comprises a plurality of drivers 505, and a plurality of drivers 505 comprise at least one source electrode driver and at least one gate drivers.Source electrode driver is electrically connected on many data lines 530, in order to a plurality of data-signals to be provided.Gate drivers is electrically connected on many first supplementary gate polar curves 555, many second supplementary gate polar curves 556 and many articles the 3rd supplementary gate polar curves 557, in order to a plurality of signals bar gate line 550 at the most to be provided.Perhaps; A plurality of drivers 505 comprise at least one source electrode driver, at least one first grid driver, at least one second grid driver and at least one the 3rd gate drivers; The first grid driver provides the bar first supplementary gate polar curve 555 at the most with a plurality of first grid signals; The second grid driver provides a plurality of second grid signals at the most, and the bar second supplementary gate polar curve 556, the three gate drivers provide article the 3rd supplementary gate polar curve 557 at the most with a plurality of the 3rd signals.Grid wave during LCD 500 work is just as in signal waveform shown in Figure 4, so its principle of work that repeats no more.
Because many first supplementary gate polar curves 555 are arranged at image viewing area 595; That is the set second supplementary gate polar curve 556 of first rim area 580 and second rim area 585 and the number of the 3rd supplementary gate polar curve 557 can significantly reduce, and therefore can significantly dwindle the size of the width of first rim area 580 and second rim area 585 with reduction infrabasal plate 510.So LCD 500 also is suitable as the miniscope that portable electron device is installed.
Fig. 6 is the synoptic diagram of the LCD of fourth embodiment of the invention.As shown in Figure 6, the circuit structure of LCD 596 is similar to LCD shown in Figure 5 500.Driver module 501 comprises first group of output port, second group of output port and the 3rd group of output port in addition.First group of output port comprises a plurality of first output port P1～Px to see a plurality of first grid signal GO1～GOx off; Second group of output port comprises a plurality of data-out port Px+1, Px+3～Py-2, Py to see a plurality of data-signal DO1, DO2～DOt-1, Dot off; And a plurality of second output port Px+2, Px+4～Py-1 to be to see a plurality of second grid signal GOx+1, GOx+2～GOw-1 off, and the 3rd group of output port comprises a plurality of the 3rd output port Py+1, Py+2～Pz-1, Pz to see a plurality of the 3rd signal GOw, GOw+1～GOu-1, GOu off.First group of output port is electrically connected on 556, the second groups of output ports of many second supplementary gate polar curves and is electrically connected on many first supplementary gate polar curves 555 and is electrically connected on many articles the 3rd supplementary gate polar curves 557 with 530, the three groups of output ports of many data lines.That is; First group of gate line is electrically connected to second group of output port through many first supplementary gate polar curves 555; Second group of gate line is electrically connected to first group of output port through many second supplementary gate polar curves 556, and the 3rd group of gate line is electrically connected to the 3rd group of output port through many articles the 3rd supplementary gate polar curves 557.
Please continue with reference to figure 6; A plurality of data-out port Px+1～Py of second group of output port and a plurality of second output port Px+2～Py-1 are with interleaving mode and be arranged at driver module 501 according to first direction, that is many data line DL1～DLt reach a plurality of data-out port Px+1～Py and a plurality of second output port Px+2～Py-1 that is electrically connected on second group of output port according to first direction respectively with many first supplementary gate polar curve GAx+1～GAw-1 with interleaving mode.For example; Data-out port Px+1 is electrically connected on data line DL1; The second output port Px+2 is electrically connected on gate lines G x+1 through the first supplementary gate polar curve GAx+1; Data-out port Px+3 is electrically connected on data line DL2, and the second output port Px+4 is electrically connected on gate lines G x+2 through the first supplementary gate polar curve GAx+2, and data-out port Py-2 is electrically connected on data line DLt-1; The second output port Py-1 is electrically connected on gate lines G w-1 through the first supplementary gate polar curve GAw-1, and data-out port Py is electrically connected on data line DLt.Many gate lines G 1～Gx of second group of gate line are electrically connected on a plurality of first output port Px～P1 of first group of output port in regular turn according to second direction.For example, the first output port P1 is electrically connected on gate lines G x, and the first output port P2 is electrically connected on gate lines G x-1, and the first output port Px-1 is electrically connected on gate lines G 2, the first output port Px and is electrically connected on gate lines G 1.Many gate lines G w～Gu of the 3rd group of gate line are electrically connected on a plurality of the 3rd output port Py+1～Pz of the 3rd group of output port in regular turn according to first direction.For example, the 3rd output port Py+1 is electrically connected on gate lines G w, and the 3rd output port Py+2 is electrically connected on gate lines G w+1, and the 3rd output port Pz-1 is electrically connected on gate lines G u-1, and the 3rd output port Pz is electrically connected on gate lines G u.
Fig. 7 is the signal waveform synoptic diagram of the LCD work of Fig. 6, and wherein transverse axis is a time shaft.In Fig. 7, basipetal signal be respectively first grid signal GOx (SG1), first grid signal GOx-1 (SG2) ..., first grid signal GO2 (SGx-1), first grid signal GO1 (SGx), second grid signal GOx+1 (SGx+1), second grid signal GOx+2 (SGx+2) ..., second grid signal GOw-1 (SGw-1), the 3rd signal GOw (SGw), the 3rd signal GOw+1 (SGw+1) ..., the 3rd signal GOu-1 (SGu-1) and the 3rd signal GOu (SGu).Basically, the driving sequence of many gate lines 550 for to be urged to the last item gate lines G u in regular turn from article one gate lines G 1, that is to say that driver module 501 is in order to be fed into gate lines G 1～Gu with enable signal in regular turn.
According to a plurality of output port P1～Pz of Fig. 6 and the electrical connection of a plurality of gate lines G 1～Gu; For carrying out the running of driving in regular turn of article one gate lines G 1 to the last item gate lines G u; First group of output port exported a plurality of first grid signal GOx～GO1 from a plurality of first output port Px～P1 according to second direction in regular turn, and is sent to second group of gate line through a plurality of second supplementary gate polar curves 556; Second group of output port exported a plurality of second grid signal GOx+1～GOw-1 from a plurality of second output port Px+2～Py-1 according to first direction in regular turn, and is sent to first group of gate line through a plurality of first supplementary gate polar curves 555; The 3rd group of output port exported a plurality of the 3rd signal GOw～GOu from a plurality of the 3rd output port Py+1～Pz according to first direction in regular turn, and is sent to the 3rd group of gate line through a plurality of the 3rd supplementary gate polar curves 557.
Fig. 8 is the synoptic diagram of the LCD of fifth embodiment of the invention.As shown in Figure 8; The circuit structure of LCD 597 is similar to LCD shown in Figure 6 596, and main difference is the electrical connection between many gate lines G 1～Gx of a plurality of first output port P1～Px and second group of gate line of first group of output port.Basically, LCD 597 all is electrically connected to first group of output port through many second supplementary gate polar curves 556 with second group of gate line of LCD 596.Yet in LCD 597, many gate lines G 1～Gx of second group of gate line are electrically connected on a plurality of first output port P1～Px of first group of output port in regular turn according to first direction.For example, the first output port P1 is electrically connected on gate lines G 1, the first output port P2 and is electrically connected on gate lines G 2, the first output port Px-1 and is electrically connected on gate lines G x-1, and the first output port Px is electrically connected on gate lines G x.Except above-mentioned points, all the other structures of LCD 597 and the circuit relation of coupling is same as LCD shown in Figure 6 596, so repeat no more.
Fig. 9 is the signal waveform synoptic diagram of the LCD work of Fig. 8, and wherein transverse axis is a time shaft.In Fig. 9, basipetal signal be respectively first grid signal GO1 (SG1), first grid signal GO2 (SG2) ..., first grid signal GOx-1 (SGx-1), first grid signal GOx (SGx), second grid signal GOx+1 (SGx+1), second grid signal GOx+2 (SGx+2) ..., second grid signal GOw-1 (SGw-1), the 3rd signal GOw (SGw), the 3rd signal GOw+1 (SGw+1) ..., the 3rd signal GOu-1 (SGu-1) and the 3rd signal GOu (SGu).In like manner, still for to be urged to the last item gate lines G u in regular turn from article one gate lines G 1, that is driver module 501 is in order to be fed into gate lines G 1～Gu with enable signal in regular turn to the driving sequence of many gate lines 550.
According to a plurality of output port P1～Pz of Fig. 8 and the electrical connection of a plurality of gate lines G 1～Gu; For carrying out the work of driving in regular turn of article one gate lines G 1 to the last item gate lines G u; First group of output port exported a plurality of first grid signal GO1～GOx from a plurality of first output port P1～Px according to first direction in regular turn, and is sent to second group of gate line through a plurality of second supplementary gate polar curves 556; Second group of output port exported a plurality of second grid signal GOx+1～GOw-1 from a plurality of second output port Px+2～Py-1 according to first direction in regular turn, and is sent to first group of gate line through a plurality of first supplementary gate polar curves 555; The 3rd group of output port exported a plurality of the 3rd signal GOw～GOu from a plurality of the 3rd output port Py+1～Pz according to first direction in regular turn, and is sent to the 3rd group of gate line through a plurality of the 3rd supplementary gate polar curves 557.
Figure 10 is the synoptic diagram of the LCD of sixth embodiment of the invention.Shown in figure 10; The circuit structure of LCD 598 is similar to LCD shown in Figure 6 596, and main difference is the electrical connection between many gate lines G w～Gu of a plurality of the 3rd output port Py+1～Pz and the 3rd group of gate line of the 3rd group of output port.Basically, LCD 598 all is electrically connected to the 3rd group of output port through many articles the 3rd supplementary gate polar curves 557 with the 3rd group of gate line of LCD 596.Yet in LCD 598, many gate lines G w～Gu of the 3rd group of gate line are electrically connected on a plurality of the 3rd output port Pz～Py+1 of the 3rd group of output port in regular turn according to second direction.For example, the 3rd output port Py+1 is electrically connected on gate lines G u, and the 3rd output port Py+2 is electrically connected on gate lines G u-1, and the 3rd output port Pz-1 is electrically connected on gate lines G w+1, and the 3rd output port Pz is electrically connected on gate lines G w.Except above-mentioned points, all the other structures of LCD 598 and the circuit relation of coupling is same as LCD shown in Figure 6 596, so repeat no more.
Figure 11 is the signal waveform synoptic diagram of the LCD work of Figure 10, and wherein transverse axis is a time shaft.In Figure 11, basipetal signal be respectively first grid signal GOx (SG1), first grid signal GOx-1 (SG2) ..., first grid signal GO2 (SGx-1), first grid signal GO1 (SGx), second grid signal GOx+1 (SGx+1), second grid signal GOx+2 (SGx+2) ..., second grid signal GOw-1 (SGw-1), the 3rd signal GOu (SGw), the 3rd signal GOu-1 (SGw+1) ..., the 3rd signal GOw+1 (SGu-1) and the 3rd signal GOw (SGu).In like manner, still for to be urged to the last item gate lines G u in regular turn from article one gate lines G 1, that is driver module 501 is in order to be fed into gate lines G 1～Gu with enable signal in regular turn to the driving sequence of many gate lines 550.
According to a plurality of output port P1～Pz of Figure 10 and the electrical connection of a plurality of gate lines G 1～Gu; For carrying out the work of driving in regular turn of article one gate lines G 1 to the last item gate lines G u; First group of output port exported a plurality of first grid signal GOx～GO1 from a plurality of first output port Px～P1 according to second direction in regular turn, and is sent to second group of gate line through a plurality of second supplementary gate polar curves 556; Second group of output port exported a plurality of second grid signal GOx+1～GOw-1 from a plurality of second output port Px+2～Py-1 according to first direction in regular turn, and is sent to first group of gate line through a plurality of first supplementary gate polar curves 555; The 3rd group of output port exported a plurality of the 3rd signal GOu～GOw from a plurality of the 3rd output port Pz～Py+1 according to second direction in regular turn, and is sent to the 3rd group of gate line through a plurality of the 3rd supplementary gate polar curves 557.
Figure 12 is the synoptic diagram of the LCD of seventh embodiment of the invention.Shown in figure 12; The circuit structure of LCD 599 is similar to LCD shown in Figure 10 598, and main difference is the electrical connection between many gate lines G 1～Gx of a plurality of first output port P1～Px and second group of gate line of first group of output port.Basically, LCD 599 all is electrically connected to first group of output port through many second supplementary gate polar curves 556 with second group of gate line of LCD 598.Yet in LCD 599, many gate lines G 1～Gx of second group of gate line are electrically connected on a plurality of first output port P1～Px of first group of output port in regular turn according to first direction.For example, the first output port P1 is electrically connected on gate lines G 1, the first output port P2 and is electrically connected on gate lines G 2, the first output port Px-1 and is electrically connected on gate lines G x-1, and the first output port Px is electrically connected on gate lines G x.Except above-mentioned points, all the other structures of LCD 599 and the circuit relation of coupling is same as LCD shown in Figure 10 598, so repeat no more.
Figure 13 is the signal waveform synoptic diagram of the LCD work of Figure 12, and wherein transverse axis is a time shaft.In Figure 13, basipetal signal be respectively first grid signal GO1 (SG1), first grid signal GO2 (SG2) ..., first grid signal GOx-1 (SGx-1), first grid signal GOx (SGx), second grid signal GOx+1 (SGx+1), second grid signal GOx+2 (SGx+2) ..., second grid signal GOw-1 (SGw-1), the 3rd signal GOu (SGw), the 3rd signal GOu-1 (SGw+1) ..., the 3rd signal GOw+1 (SGu-1) and the 3rd signal GOw (SGu).In like manner, still for to be urged to the last item gate lines G u in regular turn from article one gate lines G 1, that is driver module 501 is in order to be fed into gate lines G 1～Gu with enable signal in regular turn to the driving sequence of many gate lines 550.
According to a plurality of output port P1～Pz of Figure 12 and the electrical connection of a plurality of gate lines G 1～Gu; For carrying out the running of driving in regular turn of article one gate lines G 1 to the last item gate lines G u; First group of output port exported a plurality of first grid signal GO1～GOx from a plurality of first output port P1～Px according to first direction in regular turn, and is sent to second group of gate line through a plurality of second supplementary gate polar curves 556; Second group of output port exported a plurality of second grid signal GOx+1～GOw-1 from a plurality of second output port Px+2～Py-1 according to first direction in regular turn, and is sent to first group of gate line through a plurality of first supplementary gate polar curves 555; The 3rd group of output port exported a plurality of the 3rd signal GOu～GOw from a plurality of the 3rd output port Pz～Py+1 according to second direction in regular turn, and is sent to the 3rd group of gate line through a plurality of the 3rd supplementary gate polar curves 557.
Figure 14 is the synoptic diagram of the LCD of eighth embodiment of the invention.Shown in figure 14; The circuit structure of LCD 593 is similar to LCD shown in Figure 5 500; Main difference is that many strange ordering second supplementary gate polar curves 556 and many strange ordering the 3rd supplementary gate polar curves 557 are arranged at first rim area 580, and many idol ordering second supplementary gate polar curves 556 are arranged at second rim area 585 with many idol ordering the 3rd supplementary gate polar curves 557.Many the strange ordering second supplementary gate polar curves 556 are electrically connected on many strange ordering gate lines 550 of second group of gate line, and many idol ordering second supplementary gate polar curves 556 are electrically connected on many idol ordering gate lines 550 of second group of gate line.Many strange ordering the 3rd supplementary gate polar curves 557 are electrically connected on many strange ordering gate lines 550 of the 3rd group of gate line, and many idol ordering the 3rd supplementary gate polar curves 557 are electrically connected on many idol ordering gate lines 550 of the 3rd group of gate line.Except above-mentioned points; All the other structures of LCD 593 and the circuit relation of coupling is same as LCD shown in Figure 5 500, the signal driving method that can be provided according to the 4th to the 7th embodiment as for the signal driving method of LCD 593 and in like manner analogizing.
In another embodiment; Many the strange ordering second supplementary gate polar curves 556 are electrically connected on many idol ordering gate lines 550 of second group of gate line; Many the idol ordering second supplementary gate polar curves 556 are electrically connected on many strange ordering gate lines 550 of second group of gate line; Many strange ordering the 3rd supplementary gate polar curves 557 are electrically connected on many idol ordering gate lines 550 of the 3rd group of gate line, and many idol ordering the 3rd supplementary gate polar curves 557 are electrically connected on many strange ordering gate lines 550 of the 3rd group of gate line.
Figure 15 is the synoptic diagram of the LCD of nineth embodiment of the invention.Shown in figure 15, LCD 600 comprises infrabasal plate 610 and upper substrate 690, and liquid crystal layer promptly is folded between infrabasal plate 610 and the upper substrate 690.Upper substrate 690 can be colored filter, is used for the display color picture.The second supplementary gate polar curve 658 that the first supplementary gate polar curve 655 that infrabasal plate 610 comprises that many data lines that laterally arrange 630, many gate lines that laterally arrange 650, many laterally arrange, many laterally arrange, a plurality of first pixel cell 660, a plurality of second pixel cell 665, first rim area 680, second rim area 685, the 3rd rim area 688, image viewing area 695 and driver module 601.First rim area 680, second rim area 685, with the 3rd rim area 688 substantially around image viewing area 695; For example; First rim area 680, second rim area 685, be adjacent to three sides of image viewing area 695 substantially with the 3rd rim area 688, the 3rd rim area 688 is substantially between first rim area 680 and second rim area 685.Many data lines 630, many gate lines 650, a plurality of first pixel cell 660, a plurality of second pixel cells 665 are arranged at image viewing area 695 with many first supplementary gate polar curves 655, and driver module 601 is arranged at the 3rd rim area 688.Many gate line 650 is orthogonal with many data lines 630 substantially.
In one embodiment, driver module 601 comprises at least one driver 605, is used to provide a plurality of data-signals bar data line 630 at the most, and a plurality of signals bar first supplementary gate polar curve 655 and many second supplementary gate polar curves 658 at the most is provided.In another embodiment, driver module 601 comprises a plurality of drivers 605, and a plurality of drivers 605 comprise at least one source electrode driver and at least one gate drivers.Source electrode driver is electrically connected on many data lines 630, in order to a plurality of data-signals to be provided.Gate drivers is electrically connected on many first supplementary gate polar curves 655 and many second supplementary gate polar curves 658, in order to a plurality of signals bar gate line 650 at the most to be provided.Perhaps; A plurality of drivers 605 comprise at least one source electrode driver, at least one first grid driver and at least one second grid driver; The first grid driver provides the bar first supplementary gate polar curve 655 at the most with a plurality of first grid signals, and the second grid driver provides the bar second supplementary gate polar curve 658 at the most with a plurality of second grid signals.Grid wave during LCD 600 work is just as in signal waveform shown in Figure 4, so its principle of work that repeats no more.
Because many first supplementary gate polar curves 655 are arranged at image viewing area 695, that is the number of the set second supplementary gate polar curve 658 of first rim area 680 can significantly reduce, and therefore can significantly dwindle the width of first rim area 680.In addition, 685 of second rim area are not provided with any supplementary gate polar curve, thus more can significantly dwindle its width, and the size of infrabasal plate 610 just can significantly be dwindled.So LCD 600 also is suitable as the miniscope that portable electronic devices is installed.
Figure 16 is the synoptic diagram of the LCD of tenth embodiment of the invention.Shown in figure 16; The circuit structure of LCD 696 is similar to LCD shown in Figure 15 600; Main difference is that many strange ordering second supplementary gate polar curves 658 are arranged at first rim area 680, and many idol ordering second supplementary gate polar curves 658 are arranged at second rim area 685.Many the strange ordering second supplementary gate polar curves 658 are electrically connected on many strange ordering gate lines 650 of second group of gate line, and many idol ordering second supplementary gate polar curves 658 are electrically connected on many idol ordering gate lines 650 of second group of gate line.Except above-mentioned points; All the other structures of LCD 696 and the circuit relation of coupling is same as LCD shown in Figure 15 600, the signal driving method that can be provided according to the 4th to the 7th embodiment as for the signal driving method of LCD 696 and in like manner analogizing.
In another embodiment, many strange ordering second supplementary gate polar curves 658 are electrically connected on many idol ordering gate lines 650 of second group of gate line, and many idol ordering second supplementary gate polar curves 658 are electrically connected on many strange ordering gate lines 650 of second group of gate line.
Figure 17 is the synoptic diagram of the LCD of eleventh embodiment of the invention.Shown in figure 17, LCD 700 comprises infrabasal plate 710 and upper substrate 790, and liquid crystal layer promptly is folded between infrabasal plate 710 and the upper substrate 790.Upper substrate 790 can be colored filter, is used for the display color picture.The second supplementary gate polar curve 759 that the first supplementary gate polar curve 755 that infrabasal plate 710 comprises that many data lines that laterally arrange 730, many gate lines that laterally arrange 750, many laterally arrange, many laterally arrange, a plurality of first pixel cell 760, a plurality of second pixel cell 765, first rim area 780, second rim area 785, the 3rd rim area 788, image viewing area 795 and driver module 701.First rim area 780, second rim area 785, with the 3rd rim area 788 substantially around image viewing area 795, for example, first rim area 780, second rim area 785, be adjacent to three sides of image viewing area 795 substantially with the 3rd rim area 788.Many data lines 730, many gate lines 750, a plurality of first pixel cell 760, a plurality of second pixel cells 765 are arranged at image viewing area 795 with many first supplementary gate polar curves 755, and driver module 701 is arranged at the 3rd rim area 788.Many gate line 750 is orthogonal with many data lines 730 substantially.
In one embodiment, driver module 701 comprises at least one driver 705, is used to provide a plurality of data-signals bar data line 730 at the most, and a plurality of signals bar first supplementary gate polar curve 755 and many second supplementary gate polar curves 759 at the most is provided.In another embodiment, driver module 701 comprises a plurality of drivers 705, and a plurality of drivers 705 comprise at least one source electrode driver and at least one gate drivers.Source electrode driver is electrically connected on many data lines 730, in order to a plurality of data-signals to be provided.Gate drivers is electrically connected on many first supplementary gate polar curves 755 and many second supplementary gate polar curves 759, in order to a plurality of signals bar gate line 750 at the most to be provided.Perhaps; A plurality of drivers 705 comprise at least one source electrode driver, at least one first grid driver and at least one second grid driver; The first grid driver provides the bar first supplementary gate polar curve 755 at the most with a plurality of first grid signals, and the second grid driver provides the bar second supplementary gate polar curve 759 at the most with a plurality of second grid signals.Grid wave during LCD 700 work is just as in signal waveform shown in Figure 4, so its principle of work that repeats no more.
Because many first supplementary gate polar curves 755 are arranged at image viewing area 795, that is the number of the set second supplementary gate polar curve 759 of second rim area 785 can significantly reduce, and therefore can significantly dwindle the width of second rim area 785.In addition, 780 of first rim area are not provided with any supplementary gate polar curve, thus more can significantly dwindle its width, and the size of infrabasal plate 710 just can significantly be dwindled.So LCD 700 also is suitable as the miniscope that portable electronic devices is installed.
Figure 18 is the synoptic diagram of the LCD of twelveth embodiment of the invention.Shown in figure 18; The circuit structure of LCD 796 is similar to LCD shown in Figure 17 700; Main difference is that many strange ordering second supplementary gate polar curves 759 are arranged at first rim area 780, and many idol ordering second supplementary gate polar curves 759 are arranged at second rim area 785.Many the strange ordering second supplementary gate polar curves 759 are electrically connected on many strange ordering gate lines 750 of second group of gate line, and many idol ordering second supplementary gate polar curves 759 are electrically connected on many idol ordering gate lines 750 of second group of gate line.Except above-mentioned points; All the other structures of LCD 796 and the circuit relation of coupling is same as LCD shown in Figure 17 700, the signal driving method that can be provided according to the 4th to the 7th embodiment as for the signal driving method of LCD 796 and in like manner analogizing.
In another embodiment, many strange ordering second supplementary gate polar curves 759 are electrically connected on many idol ordering gate lines 750 of second group of gate line, and many idol ordering second supplementary gate polar curves 759 are electrically connected on many strange ordering gate lines 750 of second group of gate line.
Figure 19 is the synoptic diagram of the LCD of thriteenth embodiment of the invention.Shown in figure 19, the circuit structure of LCD 797 is similar to LCD shown in Figure 17 700.LCD 797 more comprises the first adjustment layer 781 and is positioned at first rim area 880; And second adjustment layer 786 be positioned at second rim area 881 with many second supplementary gate polar curves 759, a plurality of common electrode lines 770 are electrically connected on a plurality of first pixel cells 760 respectively and are positioned at image viewing area 795 with a plurality of second pixel cells 765.Many second supplementary gate polar curves 759 are for being arranged at many leads of identical layer or being crisscross arranged in many leads of dissimilar layer.The first adjustment layer, the 781 and second adjustment layer 786 is electrically connected on a plurality of common electrode lines 770 to transmit common voltage.The first adjustment layer, the 781 and second adjustment layer 786 can be lighttight metal level, also transparent electrode layer, such as ITO (Indium-Tin-Oxide) electrode layer.Between many second supplementary gate polar curves 759 and the second adjustment layer 786, be provided with insulation course, and the coupling capacitance between the second supplementary gate polar curve 759 and the second adjustment layer 786 can be adjusted the time constant that transmits signal.The first supplementary gate polar curve 755 compared to image viewing area 795; If there is not coupling capacitance corresponding to the second adjustment layer 786; Then the second supplementary gate polar curve 759 has less coupling capacitance, so just utilize the coupling capacitance corresponding to the second adjustment layer 786 to make the transmission delay time of all signals identical to avoid scintillation.
Figure 20 is arranged at the LCD of many second supplementary gate polar curves of identical layer along the diagrammatic cross-section of dotted line AA ' for the tool of Figure 19.Shown in figure 20, many second supplementary gate polar curves 759 are set on infrabasal plate 710, between many second supplementary gate polar curves 759 and the second adjustment layer 786, be provided with first insulation course 776 and second insulation course 777.Therefore, many second supplementary gate polar curves 759 are the lead that is arranged at identical layer.In one embodiment; The second adjustment layer 786 is the transparent electrode layer of about 400～800 dusts of thickness (Angstrom); The second supplementary gate polar curve 759 is the lead of about 1000～3000 dusts of thickness, and first insulation course 776 and second insulation course 777 are the insulation course of about 2000～3000 dusts of thickness.
Figure 21 is arranged at the LCD of many second supplementary gate polar curves of dissimilar layer along the diagrammatic cross-section of dotted line AA ' for the tool of Figure 19.Diagrammatic cross-section shown in Figure 21 is similar to diagrammatic cross-section shown in Figure 20, and main difference is that many second supplementary gate polar curves 759 are for to be crisscross arranged in the lead of dissimilar layer.Shown in figure 21; The part lead of many second supplementary gate polar curves 759 is arranged between the infrabasal plate 710 and first insulation course 776; And another part lead of many second supplementary gate polar curves 759 is arranged between first insulation course 776 and second insulation course 777, and the second adjustment layer 786 is arranged on many second supplementary gate polar curves 759.
Figure 22 is the synoptic diagram of the LCD of fourteenth embodiment of the invention.Shown in figure 22, the circuit structure of LCD 798 is similar to LCD shown in Figure 19 797, and main difference is the adjustment layer 787 of second rim area 882, for be the conductive layer of step distribution pattern along third direction.Therefore, adjustment layer 787 is covered in the area of the top of many second supplementary gate polar curves 759, successively decreases successively along third direction, uses so that the coupling capacitance between the second supplementary gate polar curve 759 and the adjustment layer 787 successively decreases along third direction successively.Because the length of many second supplementary gate polar curves 759 is increased progressively toward outermost (promptly along third direction) by the most inboard successively; So the resistance of many second supplementary gate polar curves 759 is increased progressively toward outermost by the most inboard successively; Yet the resistance difference of many second supplementary gate polar curves 759 can cause transmitting the time constant difference of signal; Therefore just utilize the coupling capacitance between many second supplementary gate polar curves 759 and the adjustment layer 787 to change, be used for making the transmission delay time of all signals identical to avoid scintillation with compensating resistance difference.
Basically, many second supplementary gate polar curves 759 of LCD 798 are for being arranged at many leads of identical layer.In another embodiment; Many second supplementary gate polar curves 759 of LCD 798 can be many leads that are crisscross arranged in dissimilar layer; Yet be arranged at the second supplementary gate polar curve 759 of lower floor and adjust between the layer 787 and insert and put two layer insulatings; But be arranged at the second supplementary gate polar curve 759 on upper strata and adjust between the layer 787 and then only insert and put a layer insulating; So the second supplementary gate polar curve 759 that is arranged at the upper strata has bigger capacitance in 787 region covered of adjustment layer, the adjustment layer 787 that therefore is the step distribution pattern can reduce at the overlay length corresponding to the second supplementary gate polar curve 759 on upper strata.In a word, can cover the length of each second supplementary gate polar curve 759 so that the transmission delay time of all signals is identical, avoid the purpose of glimmering and reach through adjustment adjustment layer 787.
Figure 23 is the synoptic diagram of the LCD of fifteenth embodiment of the invention.Shown in figure 23; The circuit structure of LCD 799 is similar to LCD shown in Figure 19 797; Main difference is that the adjustment layer 887 of second rim area 883 has a plurality of openings 775; And in the zone of opening 775, adjustment layer 887 does not cover the second supplementary gate polar curve 759, increases progressively successively along third direction as for the length/area of a plurality of openings 775.Therefore; Adjustment layer 887 covers the length/area of many second supplementary gate polar curves 759; Successively decrease successively along third direction; So the coupling capacitance between the second supplementary gate polar curve 759 and the adjustment layer 787 successively decreases along third direction successively, also can compensate the resistance difference of many second supplementary gate polar curves 759, is used for making the transmission delay time of all signals identical to avoid scintillation.
Basically, many second supplementary gate polar curves 759 of LCD 799 are for being arranged at many leads of identical layer.In another embodiment; Many second supplementary gate polar curves 759 of LCD 799 can be many leads that are crisscross arranged in dissimilar layer; Yet as stated; The second supplementary gate polar curve 759 that is arranged at the upper strata has bigger capacitance in 887 region covered of adjustment layer, and therefore the length/area corresponding to the opening 775 of the second supplementary gate polar curve 759 on upper strata can increase.In a word, can cover the length/area of each second supplementary gate polar curve 759 so that the transmission delay time of all signals is identical, avoid the purpose of glimmering and reach through adjustment adjustment layer 887.
Figure 24 is arranged at the LCD of many second supplementary gate polar curves of identical layer along the diagrammatic cross-section of dotted line BB ' for the tool of Figure 23.Diagrammatic cross-section shown in Figure 24 is similar to diagrammatic cross-section shown in Figure 20, and main difference is to adjust layer 887 has a plurality of openings 775 directly over many second supplementary gate polar curves 759.
Figure 25 is arranged at the LCD of many second supplementary gate polar curves 759 of dissimilar layer along the diagrammatic cross-section of dotted line BB ' for the tool of Figure 23.Diagrammatic cross-section shown in Figure 25 is similar to diagrammatic cross-section shown in Figure 21, and main difference is to adjust layer 887 has a plurality of openings 775 in the top of many second supplementary gate polar curves 759.
Figure 26 is the synoptic diagram of the LCD of sixteenth embodiment of the invention.Shown in figure 26, the circuit structure of LCD 893 is similar to LCD shown in Figure 19 797, and main difference is that the adjustment layer 888 of second rim area 884 has a plurality of openings 873.Many the second supplementary gate polar curves 759 that second rim area 884 of LCD 893 is comprised are for to be crisscross arranged in many leads of dissimilar layer; And adjustment layer 888 only has opening 873 in the cabling zone corresponding to the second supplementary gate polar curve 759 on upper strata; And will be than the opening 873 not in the cabling zone of the second supplementary gate polar curve 759 of lower floor; In Figure 27; The second supplementary gate polar curve 759 on so-called upper strata is meant the second supplementary gate polar curve 759 between first insulation course 776 and second insulation course 777, and the second supplementary gate polar curve 759 of lower floor is meant the second supplementary gate polar curve 759 between first insulation course 776 and infrabasal plate 710.Figure 27 is arranged at the LCD of many second supplementary gate polar curves of dissimilar layer along the diagrammatic cross-section of dotted line CC ' for the tool of Figure 26.Diagrammatic cross-section shown in Figure 27 is similar to diagrammatic cross-section shown in Figure 25, and main difference is to adjust layer 888 and does not have opening 873 in the top of the second supplementary gate polar curve 759 of lower floor.
Figure 28 is the synoptic diagram of the LCD of seventeenth embodiment of the invention.Shown in figure 28; The circuit structure of LCD 895 is similar to LCD shown in Figure 19 797; The adjustment layer 889 that main difference is second rim area 885 is for being the conductor layer of step distribution pattern along third direction, and adjustment layer 889 has a plurality of openings 875, and in the zone of opening 875; Adjustment layer 889 is not covered in the top of the second supplementary gate polar curve 759, increases progressively successively along third direction as for the length/area of a plurality of openings 875.Therefore; Adjustment layer 889 is covered in the length/area of the top of many second supplementary gate polar curves 759; Successively decrease successively along third direction; So the coupling capacitance between the second supplementary gate polar curve 759 and the adjustment layer 889 successively decreases along third direction successively, also can compensate the resistance difference of many second supplementary gate polar curves 759, is used for making the transmission delay time of all signals identical to avoid scintillation.In addition, many second supplementary gate polar curves of LCD 895 759 are for being arranged at many leads of identical layer or being crisscross arranged in many leads of dissimilar layer, that is can be same as Figure 24 or diagrammatic cross-section shown in Figure 25 along the diagrammatic cross-section of dotted line DD '.In another embodiment; If many second supplementary gate polar curves 759 of LCD 895 are for to be crisscross arranged in many leads of dissimilar layer; Then 889 on adjustment layer has opening 875 above the second supplementary gate polar curve 759 on upper strata, that is is same as diagrammatic cross-section shown in Figure 27 along the diagrammatic cross-section of dotted line DD '.
In the 3rd to the 12 embodiment of the invention described above LCD; Be arranged at many supplementary gate polar curves of first rim area or second rim area; All can cooperate the arbitrary embodiment among the 13 embodiment to the 17 embodiment; Adjustment transmits the time constant of signal, with avoid scintillation so that the transmission delay time of all signals is identical.
In sum; In LCD of the present invention; Because part supplementary gate polar curve is arranged at the image viewing area at least, the width that therefore can significantly dwindle rim area is to dwindle the size of infrabasal plate, so be suitable as the miniscope that portable electron device is installed.
Certainly; The present invention also can have other various embodiments; Under the situation that does not deviate from spirit of the present invention and essence thereof; Those of ordinary skill in the art work as can make various corresponding changes and distortion according to the present invention, but these corresponding changes and distortion all should belong to the protection domain of the appended claim of the present invention.
Claims (11)
1. the display device of a tool narrow frame structure is characterized in that, comprises:
One substrate, it has an image viewing area and a rim area, and this rim area comprises one first rim area, one second rim area and the 3rd rim area, and this first rim area, second rim area and the 3rd rim area are substantially around said image viewing area;
Many data lines are arranged at the image viewing area of this substrate;
Many gate lines are arranged at the image viewing area of this substrate, and orthogonal with said data line substantially, said gate line comprises one first group of gate line, one second group of gate line;
Many first supplementary gate polar curves are arranged at the image viewing area of this substrate, and parallel to each other with said data line substantially, each bar first supplementary gate polar curve is electrically connected on a corresponding gate line of said first group of gate line;
Many second supplementary gate polar curves are arranged at this second rim area, and are parallel to said many data lines, and each bar second supplementary gate polar curve is electrically connected on a corresponding gate line of this second group of gate line;
One driver module is arranged at the 3rd rim area of this substrate, is electrically connected on said data line and the said first supplementary gate polar curve, the second supplementary gate polar curve;
A plurality of pixel cells are arranged at this image viewing area;
Many common electrode lines are electrically connected on said pixel cell, and are positioned at this image viewing area;
One first adjustment layer is arranged at this first rim area, and one second adjustment layer is arranged at this second rim area, and this said first, second adjustment layer is electrically connected on these many common electrode lines and uses voltage altogether to transmit;
One insulation course is arranged at this second rim area, is arranged between said second supplementary gate polar curve and the said second adjustment layer.
2. display device according to claim 1 is characterized in that, this driver module comprises:
At least one source electrode driver is electrically connected on said data line, is used to provide a plurality of data-signals to said data line; And
At least one gate drivers; Be electrically connected on said many first supplementary gate polar curves, many second supplementary gate polar curves, in order to a plurality of signals that provided are fed into said many gate lines through said many first supplementary gate polar curves, many second supplementary gate polar curves.
3. display device according to claim 1 is characterized in that, said first supplementary gate polar curve and said data line are arranged at this image viewing area with interleaving mode.
4. display device according to claim 1 is characterized in that, this second adjustment layer is covered in the top of the said second supplementary gate polar curve with the step distribution pattern.
5. display device according to claim 1 is characterized in that, this second adjustment layer has a plurality of openings, and each opening is positioned at the top of corresponding second a supplementary gate polar curve.
6. display device according to claim 1 is characterized in that, in said many second supplementary gate polar curves, each bar second supplementary gate polar curve is electrically connected between the corresponding gate line and this driver module of this second group of gate line.
7. display device according to claim 1; It is characterized in that; Said a plurality of pixel cell comprises in addition: a plurality of first pixel cells, be arranged at this image viewing area, and each first pixel cell is electrically connected on the gate line of a strange ordering of a corresponding data line and said gate line; And
A plurality of second pixel cells are arranged at this image viewing area, and each second pixel cell is electrically connected on the adjacent even gate line that sorts of gate line of corresponding first pixel cell and said strange ordering, and wherein this first pixel cell comprises:
One data switch; Comprise one first end, a gate terminal and one second end; Wherein first end of this data switch is electrically connected on this respective data lines, and the gate terminal of this data switch is electrically connected on the gate line of this strange ordering, and second end of this data switch is electrically connected on corresponding second pixel cell; And
One storage element comprises one first end and one second end, and wherein first end of this storage element is electrically connected on second end of this data switch, and second end of this storage element is used voltage altogether in order to receive.
8. the driving method of each said display device in the claim 1～7 is characterized in that, comprises:
One display device is provided, and this display device comprises:
One substrate has an image viewing area, one first rim area, one second rim area and one the 3rd rim area, and this first rim area, second rim area and the 3rd rim area are substantially around said image viewing area;
Many data lines are arranged at this image viewing area of substrate;
One first group of gate line and one second group of gate line are arranged at the image viewing area of this substrate;
Many first supplementary gate polar curves are arranged at the image viewing area of this substrate, and each bar first supplementary gate polar curve is electrically connected on a corresponding gate line of this first group of gate line;
Many second supplementary gate polar curves are arranged at second rim area of this substrate, and each bar second supplementary gate polar curve is electrically connected on a corresponding gate line of this second group of gate line; And
One driver module; Be arranged at the 3rd rim area of this substrate; This driver module has a plurality of data-out ports, a plurality of first output port and a plurality of second output port; Each data-out port is electrically connected on a corresponding data line; Each first output port is electrically connected on corresponding second a supplementary gate polar curve, and each second output port is electrically connected on corresponding first a supplementary gate polar curve, and wherein said data-out port and said second output port are arranged at this driver module with interleaving mode;
Export a plurality of first grid signals to the said second supplementary gate polar curve from said first output port according to one first order; And
The order that a plurality of second grid signals are complied with a first direction from said second output port exports the said first supplementary gate polar curve to.
9. driving method according to claim 8 is characterized in that other comprises:
Export a plurality of data-signals to said data line from said data-out port.
10. driving method according to claim 9 is characterized in that, this first order is for being in reverse to the order of a second direction of this first direction according to the order of this first direction or for basis.
11. driving method according to claim 9 is characterized in that, said first output port is electrically connected on the said second supplementary gate polar curve in regular turn according to this first direction or the second direction that is in reverse to this first direction.
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| CN2009100056330A CN101487962B (en) | 2009-01-20 | 2009-01-20 | Display equipment with narrow frame structure and its driving method |
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