CN105425439A - Display device - Google Patents
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- CN105425439A CN105425439A CN201410481678.6A CN201410481678A CN105425439A CN 105425439 A CN105425439 A CN 105425439A CN 201410481678 A CN201410481678 A CN 201410481678A CN 105425439 A CN105425439 A CN 105425439A
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Abstract
The invention relates to a display device. The display device comprises a display panel, at least one gate driver used for driving the gate lines, at least one data driver used for driving the data lines and a substrate; the display panel comprises multiple gate lines and multiple data lines, and the substrate is electrically connected with the display panel and located on one side of the display panel; the gate drivers and the data drivers are arranged on the substrate, and the data drivers are closer to the display panel than the gate drivers.
Description
Technical field
The invention relates to a kind of display device, particularly a kind of display device reducing frame size.
Background technology
Current display device, as Thin Film Transistor-LCD (TFT-LCD), normal needs increase the space of frame around its display panel, and it is that the space needing a certain size due to the gate drivers of display device and data driver is placed.As a kind of known Thin Film Transistor-LCD 101 of Fig. 1, mainly comprise multiple gate drivers 102, multiple data driver 103 and a display panel 104, wherein said gate drivers 102 and described data driver 103 are arranged at left side and the top of this display panel 104 respectively, therefore the both sides of this display 101 all need the size retaining frame, also therefore this display, by needing larger volume, causes the consumption in space and needs more manufacturing cost.
Although have people in recent years by described gate line driver 102 with membrane of flip chip (COF, chiponfilm), glass engages (GOF, chiponglass) or matrix liquid crystal integrate the mode of (arraycell) and manufacture, but all cannot in response to required on yield, and described method is still minor face gate line driver 102 being placed in this liquid crystal display 102, and need the region of cabling, be therefore still the size that cannot reduce frame in a large number.
Therefore need to provide a kind of new display device, the size of frame can be reduced, and there is good yield with in response to required.
Summary of the invention
An object of the present invention is to provide a kind of display device, comprising: a display panel, comprises many gate lines and many data lines; At least one gate drivers, in order to drive described gate line; At least one data driver, in order to drive described data line; And a substrate, be electrically connected with this display panel and be positioned at the side of this display panel; Wherein, this gate drivers and this data driver are arranged on this substrate, and this data driver comparatively this gate drivers closer to this display panel.Thus, this display device can reduce the gate line driver space of display panel minor face, and then can reach the effect of the frame size reducing this display device.
Accompanying drawing explanation
For further illustrating technology contents of the present invention, be described in detail as follows below in conjunction with embodiment and accompanying drawing, wherein:
Fig. 1 is the structural representation of thin films transistors liquid crystal display.
Fig. 2 is the primary structure schematic diagram of the first embodiment of display device of the present invention.
Fig. 3 (A)-(D) be the first embodiment each substrate on the various configuration schematic diagram of this gate drivers and this data driver.
Fig. 4 (A)-(C) is the various configuration schematic diagram of this gate drivers and this data driver in Fig. 3 (D) configuration.
Fig. 5 is the primary structure schematic diagram of the second embodiment of display device of the present invention.
Fig. 6 (A)-(D) be the second embodiment each substrate on the various configuration schematic diagram of this gate drivers and this data driver.
Fig. 7 (A)-(C) is the various configuration schematic diagram of this gate drivers and this data driver in Fig. 6 (D) configuration.
Fig. 8 is the wiring schematic diagram of the second embodiment drive wire on display panel.
Fig. 9 (A) is the configuration scenario schematic diagram after the cabling of driver of the present invention enters this display panel.
Fig. 9 (B) is the thin portion enlarged drawing of the cabling of Fig. 9 (A).
Figure 10 is the schematic diagram of further embodiment of this invention.
Embodiment
Fig. 2 is the primary structure schematic diagram of the first embodiment of a kind of display device 1 of the present invention, and this display device 1 mainly comprises a display panel 10, at least one gate drivers 11 and at least one data driver 12.This display panel 10 includes many gate lines 13 and many data lines 14, be connected to this at least one gate drivers 11 and this at least one data driver 12 separately, this at least one gate drivers 11 is in order to control the driving of described gate line 13, and this at least one data driver 12 is in order to control the driving of described data line 14.Wherein, many gate lines 13 on this display panel 10 are the picture element scans carrying out a first direction D1 in time receiving drive singal, and many data lines 14 on this display panel 10 are the data signal transmission carrying out a second direction D2 direction in time receiving drive singal, this first direction D1 is substantially perpendicular to this second direction D2.
As shown in Figure 2, this at least one gate drivers 11 and this at least one data driver 12 are the same sides being arranged at this display panel 10, preferably, one data driver 12 arranges on a substrate 51 with a gate drivers 11, this substrate 51 is preferably membrane of flip chip substrate, but also can be other substrate, if glass bonded substrate etc. is (in order to make explanation clearer and more definite, below all with membrane of flip chip substrate as an example), described driver is arranged at the same side of this display panel 10 thus.In the present embodiment, it is be positioned at the side parallel with this first direction D1, this display panel 10 edge with each gate drivers 11 that this same side refers to that each data driver 12 is.
Fig. 3 (A) to (D) be Fig. 2 embodiment membrane of flip chip substrate on the configuration schematic diagram of this gate drivers 11 and this data driver 12, preferably, this data driver 12 is configured at comparatively that this gate drivers 11 is close to this liquid crystal panel 10, but and non-limiting.As shown in Fig. 3 (A), this gate drivers 11 is that separate configurations is on same membrane of flip chip substrate with this data driver 12, and cabling does not each other intermesh, raster data model line 15 is interted between meaning and every two adjacent data drive wires 16, or between every two adjacent these raster data model lines 15, intert data drive wire 16, can reduce the chance of signal disturbing between cabling thus, wherein said data drive wire 16 extends along this second direction D2 with described raster data model line 15 and is spaced along this first direction D1.Fig. 3 (B) is another configuration of the present embodiment, as Fig. 3 (A), this gate drivers 11 is and this data driver 12 separate configurations separately, and cabling does not each other intermesh, raster data model line 15 is interted between meaning and every two adjacent data drive wires 16, or between every two adjacent these raster data model lines 15, intert data drive wire 16, the chance of signal disturbing between cabling can be reduced thus, wherein said data drive wire 16 extends along this second direction with described raster data model line 15 and is spaced along this first direction, this gate drivers 11 and this data driver 12 arrangement position on first direction D1 to stagger and not side by side, issuable interference when operating between driver can be reduced thus.Fig. 3 (C) is the another configuration of the present embodiment, as shown in Fig. 3 (C), this gate drivers 11 is also that separate configurations is on same membrane of flip chip substrate with this data driver 12, and this data driver 12 has cabling more more than this gate drivers 11, in other words the area of this data driver 12 is greater than this gate drivers 11, now this gate drivers 11 is likely subject to the interference of this data driver 12, therefore by described driver respective array, not overlapping in this second direction D2 each other, in addition, because this data driver 12 has many cablings, this data driver 12 is configured at comparatively close to this liquid crystal panel 10, path during signal transmission can be shortened, reduce possible loss and interference thus.It should be noted that this gate drivers 11 of Fig. 3 (A) to (C) and the arrangement position of this data driver 12 on this first direction D1 also can right and left mutually changings, not as limit.Fig. 3 (D) is also a configuration again of the present embodiment, with Fig. 3 (A) to (C) unlike the raster data model line 15 of Fig. 3 (D) and data driver line 16 not separate configurations, and raster data model line 15 is through this data driver 12, as shown in Fig. 3 (D), this gate drivers 11 is the top being positioned at this data driver 12 on this second direction D2, i.e. this data driver 12 comparatively this gate drivers 11 this liquid crystal panel 10 contiguous on this second direction D2, the width of this membrane of flip chip substrate on first direction D1 can be made thus narrower and save space, and also possess Fig. 3 (C) and configure most advantage.
Fig. 4 (A) to (C) is the better trace configurations schematic diagram of Fig. 3 (D), in order to make description clearer, schematic diagram being with dotted line to represent raster data model line 15, and representing data drive wire 16 with solid line.As shown in Fig. 4 (A), the first preferably trace configurations situation be through after this data driver 12 by raster data model line 15, coordinate the mode of a raster data model line 15 to configure with many data drive wires 16, described data drive wire 16 extends along this second direction D2 with described raster data model line 15 and is spaced along this first direction D1, it should be noted that, although this raster data model line 15 is through this data driver 12, but described raster data model line 15 is staggered with described data drive wire 16 and cabling insulated from each other and unshared.Fig. 4 (B) is the second preferably trace configurations, this raster data model line 15 is through after this data driver 12, coordinate the mode of many raster data model lines 15 to configure with many data drive wires 16, described data drive wire 16 extends along this second direction with described raster data model line 15 and is spaced along this first direction, and wherein said raster data model line 15 is still and interlocks and cabling insulated from each other and unshared with described data drive wire 16.As the configuration of Fig. 4 (A) and 4 (B), all can reach the present invention and save space-efficient effect, but be staggered with this data drive wire 16 due to this raster data model line 15, still have and may cause a little mutual interference problem.Fig. 4 (C) is the third preferably trace configurations situation, this raster data model line 15 is after passing this data line driver 12, by all described raster data model line 15 centralized configuration, and this data drive wire 16 is configured at both sides, described data drive wire 16 extends along this second direction with described raster data model line 15 and is spaced along this first direction, namely meaning only configures described raster data model line 15 between two adjacent described data drive wires 16, distance between this raster data model line 15 and this data drive wire 16 is increased, reduce the chance of interference mutually to each other thus.Thus, the first embodiment of the present invention can reach the effect reducing membrane of flip chip substrate space.It should be noted that aforementioned trace configurations situation makes raster data model line 15 pass through by the chip perforate at this data line driver 12 place, or by the line layer of this membrane of flip chip substrate, raster data model line 15 is passed through, but not as limit.
In addition, gate line 13 on display panel 10 of the present invention is still and extends along this first direction D1 the scanning carrying out pixel, but in the present embodiment, this at least one raster data model line 15 extends along this second direction, therefore cannot directly scan, this gate line 13 needs extra wiring to be connected to this at least one raster data model line 15, and wiring is parallel with data line 14, can transmit to make signal.
In addition, in the first embodiment, described driver is positioned at above this display panel 10, this field tool knows that the knowledgeable can understand usually, the replaceable below being described driver and being positioned at this display panel 10 of the present invention, and the configuration direction of Fig. 3 (A) to Fig. 4 (C) is changed to reverse direction.
Fig. 5 is the primary structure schematic diagram of the second embodiment of the present invention, and as the first embodiment, the display device 2 of the second embodiment mainly also comprises a display panel 20, at least one gate drivers 21 and at least one data driver 22.This display panel 20 also has many gate lines 23 and many data lines 24, and is connected to this at least one gate drivers 21 and this at least one data driver 22 separately.With the first embodiment unlike, this at least one gate drivers 21 and this at least one data driver 22 are arranged at this display panel 20 sides aligned parallel in the side of this second direction D2, and data driver 22 is preferably and is arranged on a membrane of flip chip substrate with gate drivers 21.As shown in Figure 5, this at least one gate drivers 21 and this at least one data driver 22 are the left sides being arranged at this display frame.
Fig. 6 (A) to (D) be Fig. 5 embodiment each membrane of flip chip substrate on the configuration schematic diagram of this gate drivers 21 and this data driver 22.As shown in Fig. 6 (A), this gate drivers 21 is with this data driver 22 and side by side on same membrane of flip chip substrate, and be that separate configuration is to make cabling separate configurations each other, raster data model cabling 25 is interted between meaning and every two adjacent data drive wires 26, or between every two adjacent raster data model lines 25, intert data drive wire 26, reduce the chance of interference mutually, wherein said data drive wire 26 extends along this first direction D1 with described raster data model line 25 and is spaced along this second direction D2.Fig. 6 (B) is another configuration of the present embodiment, this gate drivers 21 is independent separately with this data driver 22, but the arrangement position on this second direction D2 is also not quite identical, offsets one from another not side by side, issuable mutual interference when driver itself operates can be reduced thus.Fig. 6 (C) is the another configuration of the present embodiment, this gate drivers 21 is also also separate configuration with this data driver 22, and this data driver 22 has than the more cabling of this gate drivers 21 and larger area, now this gate drivers 21 is likely subject to the interference of this data driver 22, therefore by described driver spaced apart, completely not overlapping on this second direction D2 each other, and keep certain distance to reduce mutual interference, this display panel 10 is connected in addition because this data driver 22 has more cabling, therefore this data driver 22 is configured at path when comparatively can shorten signal transmission close to this liquid crystal panel 10, reduce possible loss and interference thus.It should be noted that this gate drivers 21 of Fig. 6 (A) to (C) also can exchange, not as limit up and down with the arrangement position of this data driver 22 on this second direction D2.Fig. 6 (D) is also a configuration again of the present embodiment, raster data model line 25 and data drive wire 26 not separate configurations, but raster data model line 25 will through this data line driver 22, as shown in Fig. 6 (D), this gate line driver 21 is the left being positioned at this data line driver 22 on this first direction D1, namely this data line driver 22 comparatively this gate line driver 21 this liquid crystal panel 10 contiguous on this first direction D1, can make the width of this membrane of flip chip substrate on this second direction D2 narrower thus and save space.
Fig. 7 (A) to (C) is the cabling advantageous configurations schematic diagram of Fig. 6 (D), as the first embodiment, schematic diagram is with dotted line to represent raster data model line 25, and represents data drive wire 26 with solid line.As shown in Fig. 7 (A), the first preferably trace configurations situation be through after this data driver 22 by raster data model line 25, coordinate the mode of a raster data model line 25 to configure with many data drive wires 26, described data drive wire 26 extends along this first direction D1 with described raster data model line 25 and is spaced along this second direction D2.Fig. 7 (B) is the second preferably trace configurations, this raster data model line 25 is through after this data driver 22, coordinate the mode of many raster data model lines 25 to configure with many data drive wires 26, described data drive wire 26 extends along this first direction D1 with described raster data model line 25 and is spaced along this second direction D2.Fig. 7 (C) is the third preferably trace configurations situation, this raster data model line 25 is after passing this data driver 22, by all described raster data model line 25 centralized configuration, and described data drive wire 26 is configured at the both sides of this data line driver 22, described data drive wire 26 extends along this first direction D1 with described raster data model line 25 and is spaced along this second direction D2, namely meaning only configures described raster data model line 25 between two adjacent described data drive wires 26, distance between this raster data model line 25 and this data line drive wire 26 is increased, reduce the chance of interference mutually to each other thus.Thus, the second embodiment of the present invention can reach the effect reducing membrane of flip chip space.It should be noted that aforementioned trace configurations situation makes raster data model line 25 pass through by the chip perforate at this data line driver 22 place, or by the line layer of this membrane of flip chip substrate, raster data model line 25 is passed through, but not as limit.
In this external second embodiment, described driver is on the substrate of the left being positioned at this display panel 20, this field tool knows that the knowledgeable can understand usually, the present invention is replaceable to be positioned on the substrate of the right of this display panel 20 for described driver, and the configuration direction of Fig. 6 (A) to Fig. 7 (C) is changed to reverse direction.
In addition, data line 24 on the display panel 20 of the second embodiment is still and extends with the transmission carrying out data along this second direction D2, but in the present embodiment, this at least one data drive wire 26 extends along this first direction D1, therefore directly cannot carry out the transmission of data, therefore, as shown in Figure 8, this data line 24 needs extra wiring 27 to be connected to this at least one data drive wire 26, and wiring 27 is parallel with gate line 23, can transmit to make data.This field tool knows that the knowledgeable can understand in the first embodiment by Fig. 8 usually in addition, and the cabling of the gate line driver 11 on display panel 10 must connect into the configuration scenario of parallel this first direction D1 via extra wiring.
Fig. 9 (A) is the schematic diagram after the cabling of described driver on membrane of flip chip substrate of the present invention enters this display panel, Fig. 9 (B) is the thin portion enlarged drawing at Fig. 9 (A) place, be with the second embodiment (namely driver is arranged at the left side of display panel) as an example, but affiliated field tool know that the knowledgeable can know the situation of the first embodiment after reference diagram 9 (A) and Fig. 9 (B) by inference usually herein.As shown in Fig. 9 (A) and Fig. 9 (B), after entering this display panel 30, coordinate a gate line 32 to configure with many data lines 31, and in order to reduce the interference between dissimilar cabling, a wire 33 is provided with between this gate line 32 and this data line 31, to reduce mutual interference, this wire 33 is preferably common electrode (VCOM), and wherein this data line 31, this gate line 32 all extend and are spaced along second direction D2 along this first direction D1 with this wire 33.
In addition, as shown in Figure 10, in another embodiment, one gate line driver 41 is jointly arranged on a membrane of flip chip substrate with a data line driver 42, and this gate line driver 41 is arranged on same chip 43 with this data line driver 42, controlled the output of the drive singal of this gate line driver 41 and the drive singal of this data line driver 42 by the controller (not shown) in this chip 43, avoid the problem that cabling disturbs thus.
Thus, the invention provides a kind of display device, by gate line driver and data line driver being arranged at the same side of the display panel of this display device, saving more space thus, make the frame of display device can be narrower.In addition, by gate line driver and data line driver in the configuration of same substrate upward wiring, the chance mutually disturbed between gate line drive singal and data line drive singal can be made to reduce, to provide better display quality.
Above-described embodiment is only citing for convenience of description, and the interest field that the present invention advocates from should being as the criterion with described in right, but not is only limitted to above-described embodiment.
Claims (10)
1. a display device, comprising:
One display panel, comprises many gate lines and many data lines;
At least one gate drivers, in order to drive described gate line;
At least one data driver, in order to drive described data line; And
One substrate, is electrically connected with this display panel and is positioned at the side of this display panel;
Wherein, this gate drivers and this data driver are arranged on this substrate, and this data driver comparatively this gate drivers closer to this display panel.
2. display device as claimed in claim 1, wherein this substrate is a membrane of flip chip substrate.
3. display device as claimed in claim 1, wherein the area of this gate drivers is less than the area of this data driver.
4. display device as claimed in claim 1, this substrate has the many raster data model lines connecting this gate drivers and many data drive wires connecting this data driver, wherein said raster data model line runs through this data driver.
5. display device as claimed in claim 4, wherein intert between two adjacent described data drive wires described raster data model line at least one of them.
6. display device as claimed in claim 1, this substrate have many raster data model lines connecting this gate drivers and connect many data drive wires of this data driver, wherein between every two adjacent described data drive wires, interting described raster data model line.
7. display device as claimed in claim 1, wherein this display panel have a wiring connect at least one of them and the described raster data model line of described gate line at least one of them, and this wiring is parallel with described data line.
8. display device as claimed in claim 1, this display panel have a wiring connect at least one of them and the described data drive wire of described data line at least one of them, and this wiring is parallel with described gate line.
9. display device as claimed in claim 1, wherein said data line and described sweep trace at least there is between one of them a wire, and described data line, this sweep trace and this wire extend along a first direction and be spaced along a second direction, this first direction is perpendicular to this second direction.
10. display device as claimed in claim 9, wherein this wire is a common electrode.
Priority Applications (1)
| Application Number | Priority Date | Filing Date | Title |
|---|---|---|---|
| CN201410481678.6A CN105425439A (en) | 2014-09-19 | 2014-09-19 | Display device |
Applications Claiming Priority (1)
| Application Number | Priority Date | Filing Date | Title |
|---|---|---|---|
| CN201410481678.6A CN105425439A (en) | 2014-09-19 | 2014-09-19 | Display device |
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| CN105425439A true CN105425439A (en) | 2016-03-23 |
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| CN101487962A (en) * | 2009-01-20 | 2009-07-22 | 友达光电股份有限公司 | Display equipment with narrow frame structure and its driving method |
| CN101673015A (en) * | 2009-10-19 | 2010-03-17 | 友达光电股份有限公司 | Active-element array substrate and display panel |
| CN101842742A (en) * | 2007-12-04 | 2010-09-22 | 夏普株式会社 | Display device and method for manufacturing the same |
| CN103578443A (en) * | 2012-08-10 | 2014-02-12 | 乐金显示有限公司 | Display device and driving method thereof |
| CN103886844A (en) * | 2013-12-31 | 2014-06-25 | 深圳市华星光电技术有限公司 | Display panel assembly and adjusting method thereof, and display device |
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2014
- 2014-09-19 CN CN201410481678.6A patent/CN105425439A/en active Pending
Patent Citations (6)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| JP2007226229A (en) * | 2006-02-20 | 2007-09-06 | Samsung Electronics Co Ltd | Display device and method of driving the same |
| CN101842742A (en) * | 2007-12-04 | 2010-09-22 | 夏普株式会社 | Display device and method for manufacturing the same |
| CN101487962A (en) * | 2009-01-20 | 2009-07-22 | 友达光电股份有限公司 | Display equipment with narrow frame structure and its driving method |
| CN101673015A (en) * | 2009-10-19 | 2010-03-17 | 友达光电股份有限公司 | Active-element array substrate and display panel |
| CN103578443A (en) * | 2012-08-10 | 2014-02-12 | 乐金显示有限公司 | Display device and driving method thereof |
| CN103886844A (en) * | 2013-12-31 | 2014-06-25 | 深圳市华星光电技术有限公司 | Display panel assembly and adjusting method thereof, and display device |
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Application publication date: 20160323 |