CN101467351A - 用于带宽受限的负载的三态驱动器 - Google Patents
用于带宽受限的负载的三态驱动器 Download PDFInfo
- Publication number
- CN101467351A CN101467351A CNA2007800217219A CN200780021721A CN101467351A CN 101467351 A CN101467351 A CN 101467351A CN A2007800217219 A CNA2007800217219 A CN A2007800217219A CN 200780021721 A CN200780021721 A CN 200780021721A CN 101467351 A CN101467351 A CN 101467351A
- Authority
- CN
- China
- Prior art keywords
- mos
- drive circuit
- equipment
- tri
- signal
- Prior art date
- Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
- Granted
Links
Images
Classifications
-
- H—ELECTRICITY
- H03—ELECTRONIC CIRCUITRY
- H03K—PULSE TECHNIQUE
- H03K19/00—Logic circuits, i.e. having at least two inputs acting on one output; Inverting circuits
- H03K19/02—Logic circuits, i.e. having at least two inputs acting on one output; Inverting circuits using specified components
- H03K19/08—Logic circuits, i.e. having at least two inputs acting on one output; Inverting circuits using specified components using semiconductor devices
- H03K19/094—Logic circuits, i.e. having at least two inputs acting on one output; Inverting circuits using specified components using semiconductor devices using field-effect transistors
- H03K19/09425—Multistate logic
- H03K19/09429—Multistate logic one of the states being the high impedance or floating state
-
- H—ELECTRICITY
- H03—ELECTRONIC CIRCUITRY
- H03K—PULSE TECHNIQUE
- H03K19/00—Logic circuits, i.e. having at least two inputs acting on one output; Inverting circuits
- H03K19/0175—Coupling arrangements; Interface arrangements
- H03K19/0185—Coupling arrangements; Interface arrangements using field effect transistors only
Landscapes
- Engineering & Computer Science (AREA)
- Computer Hardware Design (AREA)
- Physics & Mathematics (AREA)
- Computing Systems (AREA)
- General Engineering & Computer Science (AREA)
- Mathematical Physics (AREA)
- Power Engineering (AREA)
- Logic Circuits (AREA)
- Dc Digital Transmission (AREA)
Abstract
Description
(DIN)中的数据 | D1N | D0N | M1 | M2 | D | SIG |
与在前的位相同的逻辑值 | “1” | “0” | 截止 | 截止 | 高阻抗 | Z |
与在前的位相反的逻辑值,现在为逻辑“1” | “1” | “0” | 导通 | 截止 | 低阻抗 | ↑VDD |
与在前的位相反的逻辑值,现在为逻辑“0” | “0” | “1” | 截止 | 导通 | 低阻抗 | ↓GND |
Claims (10)
Applications Claiming Priority (5)
Application Number | Priority Date | Filing Date | Title |
---|---|---|---|
US81351506P | 2006-06-14 | 2006-06-14 | |
US60/813,515 | 2006-06-14 | ||
US11/807,150 | 2007-05-25 | ||
US11/807,150 US7567094B2 (en) | 2006-06-14 | 2007-05-25 | Tri-stated driver for bandwidth-limited load |
PCT/US2007/013487 WO2007146110A2 (en) | 2006-06-14 | 2007-06-07 | Tri-stated driver for bandwidth-limited load |
Publications (2)
Publication Number | Publication Date |
---|---|
CN101467351A true CN101467351A (zh) | 2009-06-24 |
CN101467351B CN101467351B (zh) | 2011-12-14 |
Family
ID=38832399
Family Applications (1)
Application Number | Title | Priority Date | Filing Date |
---|---|---|---|
CN2007800217219A Expired - Fee Related CN101467351B (zh) | 2006-06-14 | 2007-06-07 | 用于带宽受限的负载的三态驱动器 |
Country Status (7)
Country | Link |
---|---|
US (1) | US7567094B2 (zh) |
EP (1) | EP2027652A4 (zh) |
JP (1) | JP4928606B2 (zh) |
KR (1) | KR101384024B1 (zh) |
CN (1) | CN101467351B (zh) |
CA (1) | CA2654553C (zh) |
WO (1) | WO2007146110A2 (zh) |
Families Citing this family (6)
Publication number | Priority date | Publication date | Assignee | Title |
---|---|---|---|---|
US7567097B2 (en) * | 2007-09-29 | 2009-07-28 | Hewlett-Packard Development Company, L.P. | Pre-driver circuit and appparatus using same |
US8359372B2 (en) * | 2008-06-29 | 2013-01-22 | Microsoft Corporation | Automatic transfer of information through physical docking of devices |
KR101219439B1 (ko) * | 2011-10-05 | 2013-01-11 | (주) 와이팜 | 프리 엠퍼시스 회로 |
KR101689159B1 (ko) * | 2015-07-10 | 2016-12-23 | 울산과학기술원 | 3진수 논리회로 |
US20170250301A1 (en) | 2016-02-29 | 2017-08-31 | Zafer Termanini | Solar panel with optical light enhancement device |
KR102206020B1 (ko) | 2019-05-08 | 2021-01-21 | 울산과학기술원 | 로직-인-메모리를 위한 3진 메모리 셀 및 이를 포함하는 메모리 장치 |
Family Cites Families (17)
Publication number | Priority date | Publication date | Assignee | Title |
---|---|---|---|---|
JPS5490941A (en) * | 1977-12-26 | 1979-07-19 | Hitachi Ltd | Driving circuit of tristate type |
US5165046A (en) | 1989-11-06 | 1992-11-17 | Micron Technology, Inc. | High speed CMOS driver circuit |
JP2888722B2 (ja) * | 1993-04-12 | 1999-05-10 | 株式会社東芝 | インターフェース回路 |
GB2282284B (en) | 1993-09-28 | 1998-01-21 | Plessey Semiconductors Ltd | Modulators |
US5467031A (en) | 1994-09-22 | 1995-11-14 | Lsi Logic Corporation | 3.3 volt CMOS tri-state driver circuit capable of driving common 5 volt line |
US5966026A (en) * | 1995-02-14 | 1999-10-12 | Advanced Micro Devices, Inc. | Output buffer with improved tolerance to overvoltage |
US5646550A (en) * | 1996-02-22 | 1997-07-08 | Motorola, Inc. | High reliability output buffer for multiple voltage system |
JP3487723B2 (ja) * | 1996-09-19 | 2004-01-19 | 沖電気工業株式会社 | インタフェース回路及び信号伝送方法 |
US6181166B1 (en) | 1998-06-19 | 2001-01-30 | Intel Corporation | Tristate driver for integrated circuit interconnects |
TW488138B (en) | 1999-06-30 | 2002-05-21 | Texas Instruments Inc | ISI-rejecting differential receiver |
US6826390B1 (en) * | 1999-07-14 | 2004-11-30 | Fujitsu Limited | Receiver, transceiver circuit, signal transmission method, and signal transmission system |
AU2002228878A1 (en) | 2000-11-13 | 2002-05-21 | Primarion, Inc. | Method and circuit for pre-emphasis equalization in high speed data communications |
JP4005086B2 (ja) * | 2003-01-20 | 2007-11-07 | 株式会社ルネサステクノロジ | 半導体集積回路 |
CA2523298C (en) | 2003-05-08 | 2013-10-01 | Sioptical, Inc. | High speed, silicon-based electro-optic modulator |
CN2722503Y (zh) * | 2004-02-13 | 2005-08-31 | 上海英联电子科技有限公司 | 具有斜率控制的宽摆幅输出cmos驱动器电路 |
US7154301B2 (en) | 2004-03-26 | 2006-12-26 | Intel Corporation | Apparatus and method for a low jitter predriver for differential output drivers |
US7177352B1 (en) | 2004-05-28 | 2007-02-13 | Pmc-Sierra, Inc. | Pre-cursor inter-symbol interference cancellation |
-
2007
- 2007-05-25 US US11/807,150 patent/US7567094B2/en active Active
- 2007-06-07 JP JP2009515428A patent/JP4928606B2/ja not_active Expired - Fee Related
- 2007-06-07 WO PCT/US2007/013487 patent/WO2007146110A2/en active Application Filing
- 2007-06-07 KR KR1020097000518A patent/KR101384024B1/ko active IP Right Grant
- 2007-06-07 CA CA2654553A patent/CA2654553C/en not_active Expired - Fee Related
- 2007-06-07 CN CN2007800217219A patent/CN101467351B/zh not_active Expired - Fee Related
- 2007-06-07 EP EP20070795888 patent/EP2027652A4/en not_active Withdrawn
Also Published As
Publication number | Publication date |
---|---|
JP2009540750A (ja) | 2009-11-19 |
WO2007146110A3 (en) | 2008-04-10 |
US7567094B2 (en) | 2009-07-28 |
KR20090034335A (ko) | 2009-04-07 |
EP2027652A2 (en) | 2009-02-25 |
KR101384024B1 (ko) | 2014-04-17 |
CA2654553A1 (en) | 2007-12-21 |
JP4928606B2 (ja) | 2012-05-09 |
EP2027652A4 (en) | 2015-03-25 |
CN101467351B (zh) | 2011-12-14 |
CA2654553C (en) | 2016-11-08 |
US20080007295A1 (en) | 2008-01-10 |
WO2007146110A2 (en) | 2007-12-21 |
Similar Documents
Publication | Publication Date | Title |
---|---|---|
CN101467351B (zh) | 用于带宽受限的负载的三态驱动器 | |
US6977534B2 (en) | Low voltage differential signaling [LVDS] driver with pre-emphasis | |
JP4267655B2 (ja) | 電子回路、該電子回路として構成された差分送信機、及び、自己直列終端送信機を形成する方法(振幅制御、プリ・エンファシス制御及びスルー・レート制御のためのセグメント化と振幅精度及び高電圧保護のための電圧調整とを有する自己直列終端シリアル・リンク送信機) | |
KR101290080B1 (ko) | 프리엠퍼시스 회로 및 이를 구비한 차동 전류 신호전송 시스템 | |
JP6185171B2 (ja) | 多相クロック生成方法 | |
US9455713B1 (en) | Split resistor source-series terminated driver | |
WO2016134606A1 (en) | Transmitter apparatus and method | |
US7974304B2 (en) | Out of band signaling enhancement for high speed serial driver | |
US8705605B1 (en) | Technique for providing loopback testing with single stage equalizer | |
US7920014B2 (en) | Semiconductor integrated circuit device | |
KR102347434B1 (ko) | 송신기 및 이를 포함하는 디스플레이 및 시스템 | |
CN103297036A (zh) | 低功耗电流模式逻辑电路 | |
CN103248352A (zh) | 低电压差动信号驱动电路以及相容于有线传输的电子装置 | |
EP1065850A2 (en) | ISI-rejecting differential receiver | |
US7279950B2 (en) | Method and system for high frequency clock signal gating | |
TWI523438B (zh) | 用於高速串列傳輸器之架構 | |
US20040037362A1 (en) | Controlled frequency signals | |
US10389315B2 (en) | Three-input continuous-time amplifier and equalizer for multi-level signaling | |
US11949425B2 (en) | Digital-to-analog converter (DAC)-based voltage-mode transmit driver architecture with tunable impedance control and transition glitch reduction techniques | |
US20240056075A1 (en) | Continuous Time Linear Equalizers (CTLEs) of Data Interfaces | |
US20230155591A1 (en) | Transmit driver architecture with a jtag configuration mode, extended equalization range, and multiple power supply domains | |
Li et al. | A 5 Gbps serial link pre-emphasis transmitter with a novel-designed register based multiplexer | |
CN108563599B (zh) | 一种利用电压差匹配等效电阻的M-phy驱动电路 | |
CN116974978A (zh) | 一种混合驱动器及其驱动方法、串行通信设备 | |
Mondal et al. | A mathematical formulation to design and implementation of a low voltage swing transceiver circuit |
Legal Events
Date | Code | Title | Description |
---|---|---|---|
C06 | Publication | ||
PB01 | Publication | ||
C10 | Entry into substantive examination | ||
SE01 | Entry into force of request for substantive examination | ||
C14 | Grant of patent or utility model | ||
GR01 | Patent grant | ||
ASS | Succession or assignment of patent right |
Owner name: CISCO TECH IND. Free format text: FORMER OWNER: LIGHTWIRE INC. Effective date: 20130627 |
|
C41 | Transfer of patent application or patent right or utility model | ||
C56 | Change in the name or address of the patentee |
Owner name: LIGHTWIRE INC. Free format text: FORMER NAME: SIOPTICAL INC. |
|
CP01 | Change in the name or title of a patent holder |
Address after: American Pennsylvania Patentee after: LIGHTWIRE, Inc. Address before: American Pennsylvania Patentee before: LIGHTWIRE, Inc. Address after: American Pennsylvania Patentee after: LIGHTWIRE, Inc. Address before: American Pennsylvania Patentee before: SIOPTICAL, Inc. |
|
TR01 | Transfer of patent right |
Effective date of registration: 20130627 Address after: California, USA Patentee after: Cisco Technology, Inc. Address before: American Pennsylvania Patentee before: Lightwire, Inc. |
|
CF01 | Termination of patent right due to non-payment of annual fee |
Granted publication date: 20111214 Termination date: 20210607 |
|
CF01 | Termination of patent right due to non-payment of annual fee |