CN101459124B - Chemical mechanical grinding method and wafer cleaning method - Google Patents
Chemical mechanical grinding method and wafer cleaning method Download PDFInfo
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- CN101459124B CN101459124B CN2007100945453A CN200710094545A CN101459124B CN 101459124 B CN101459124 B CN 101459124B CN 2007100945453 A CN2007100945453 A CN 2007100945453A CN 200710094545 A CN200710094545 A CN 200710094545A CN 101459124 B CN101459124 B CN 101459124B
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Abstract
The invention discloses a method of chemical mechanical polishing, which comprises steps of placing a chip to-be-polished on a chemical mechanical polishing device, wherein a dielectric layer, a through hole opening arranged in the dielectric layer, and a metal layer arranged in the through hole and on the dielectric layer are formed on the chip, performing first polishing on the chip to expose the surface of the chip out of the dielectric layer and form a metal structure in the through hole opening, performing second polishing on the chip to lead the metal structure in the through hole opening to be higher than the dielectric layer, mixing de-ionized water with hydrofluoric acid to form hydrofluoric acid solution of concentration ranging from 0.03% to 0.08%, and finally utilizing the hydrofluoric acid solution to clean the polished chip. The invention further correspondingly discloses a cleaning method for polished chips. By utilizing the mechanical polishing method and the chip cleaning method, defected particle number on the chip surface after the metal layer is polished can be effectively reduced.
Description
Technical field
The present invention relates to technical field of manufacturing semiconductors, particularly a kind of chemical and mechanical grinding method and wafer cleaning method.
Background technology
Along with the develop rapidly of very lagre scale integrated circuit (VLSIC) ULSI (Ultra Large Scale Integration), integrated circuit fabrication process becomes and becomes increasingly complex with meticulous, and is also more and more stricter to the evenness requirement of wafer surface.And the polylaminate wiring technique of extensive use now can cause wafer surface uneven, and is extremely unfavorable to graphic making.For this reason, need carry out planarization (Planarization) to wafer and handle, make each layer all have higher overall evenness.At present, chemical and mechanical grinding method (CMP, Chemical Mechanical Polishing) be the best approach of reaching overall planarization, especially after semiconductor fabrication process entered sub-micron (sub-micron) field, cmp had become an indispensable manufacture craft technology.
Chemical and mechanical grinding method (CMP) is a kind of technical process of complexity, and it comes the planarization wafer surface by the relative motion between wafer and the grinding head.Fig. 1 is the structural representation of existing chemical-mechanical grinding device, as shown in Figure 1, during cmp, by the grinding head 101 that rotates wafer 102 is pressed on certain pressure on the grinding pad 103 on the rotating disk 104 of rotation, the lapping liquid 105 that is mixed with minimum abrasive grains drips on grinding pad 103 by lapping liquid feed tube 106, and under the effect of the transmission of grinding pad 103 and rotary centrifugal force, be uniformly distributed on it, between wafer 102 and grinding pad 103, form one deck fluid film, chemical composition in the lapping liquid and wafer produce chemical reaction, insoluble matter is converted into lyotrope matter, by the micromechanics friction of abrasive grains these chemical reactants are removed from wafer surface then, thereby obtained smooth undamaged planarized surface.
In addition, coarse and have lapping liquid residual in the grinding pad of hole for the clean surface, need a grinding pad collating unit, it is used for the particle on grinding pad surface is removed, and the reparation grinding pad, make grinding pad recover coarse surface, more stable to guarantee grinding technics.Usually used grinding pad collating unit is made up of support arm 108 and correction-plate (brush) 107 as shown in Figure 1.
Along with developing rapidly of very lagre scale integrated circuit (VLSIC), the integrated level of chip is more and more higher, the size of components and parts is more and more littler, because of the high density of device, the influence that the various effects of small size initiation are made the result to semiconductor technology become increasingly conspicuous, some new requirements also can be proposed to each step process processing procedure.
To utilize the chemical and mechanical grinding method planarization metal layer is example.Fig. 2 to Fig. 4 has illustrated the existing device profile schematic diagram that utilizes the chemical and mechanical grinding method planarization metal layer.
Fig. 2 utilizes existing chemical and mechanical grinding method planarization metal layer device profile schematic diagram before, as shown in Figure 2, forms dielectric layer 202 on the substrate 201 with conductive structure (not shown), and it can be formed by materials such as silica usually; Utilize photoetching, lithographic method in this dielectric layer 202, to form via openings (its bottom links to each other with conductive structure in the substrate 201) again; Then, depositing metal layers 203 in this dielectric layer 202 and via openings thereof can be tungsten, copper etc. usually.Can see that because the existence of via openings, metal level 203 surface irregularities of deposition need it is carried out planarization.
In the existing metal level milled processed technology, the grinding technics of this planarization metal layer was divided into for two steps, wherein, first grind expose wafer grinding to surface to the open air dielectric layer 202 till; Second grinds the dielectric layer will expose to the open air again slightly removes one deck, makes the metal structure in each via openings protrude from wafer surface, to improve the switching performance between the upper metal layers that metal structure in the via openings and back will form.
Fig. 3 is the device profile schematic diagram that utilizes after existing chemical and mechanical grinding method carries out first grinding, as shown in Figure 3, utilize the lapping liquid that grinds removal metal level 203 that wafer is carried out first and grind, be not higher than the interior metal structure 203 ' of via openings of dielectric layer 202.
Fig. 4 is the device profile schematic diagram that utilizes after existing chemical and mechanical grinding method carries out second grinding, as shown in Figure 4, utilize the lapping liquid of abrasive media layer 202 (being generally silica material) that wafer is carried out second processing of grinding, remove the skim on dielectric layer surface, make the metal structure 203 ' in the via openings protrude from wafer surface, promptly be higher than the dielectric layer 202 on next door.
Along with constantly dwindling of device size in the wafer, spacing between each metal structure 203 ' can further reduce, new problem has appearred in the method for above-mentioned traditional planarization metal layer: between each metal structure 203 ', often there is part abrasive grains 210 to be entrained in therebetween, even also can't remove through after the step of clean wafers, just introduced new particle contamination source, caused the decrease in yield of producing to device production.
As shown in Figure 5, there is many places particle contamination 502 in Fig. 5 on wafer 501 surfaces for adopting the wafer surface particle contamination situation schematic diagram after existing chemical and mechanical grinding method cleans.
Cleannes for the wafer surface behind the raising cmp, publication number is the method that the Chinese patent application of CN101062503A has proposed clean wafers behind a kind of new cmp on October 31st, 2007 is open, this method has added chemical agent to reduce the stickiness of wafer surface, to improve cleaning performance when cleaning.But this method is mainly used in the organic contamination source of clean to remove grinding the back wafer surface, reduces can't solve in this method of the problem that is mingled with abrasive grains between each metal structure because of size for above-mentioned.
Summary of the invention
The invention provides a kind of chemical and mechanical grinding method and wafer cleaning method, to improve wafer behind the existing grinding metal layer easy phenomenon of residual fraction abrasive grains still after cleaning.
A kind of chemical and mechanical grinding method provided by the invention comprises step:
Wafer to be ground is positioned in the chemical-mechanical grinding device, and formed dielectric layer on the described wafer, be positioned at the via openings of described dielectric layer and be positioned at described via openings and described dielectric layer on metal level;
Described wafer is carried out first grind, make described wafer surface expose described dielectric layer, in described via openings, form metal structure;
Described wafer is carried out second grind, make the metal structure in the described via openings be higher than described dielectric layer;
Deionized water is mixed mutually with hydrofluoric acid, form the hydrofluoric acid solution of concentration between 0.03% to 0.08%;
Utilize the wafer after described hydrofluoric acid solution cleans grinding.
Alternatively, described metal level comprises tungsten or metallic copper, and described dielectric layer comprises silicon oxide layer.
Alternatively, the metal structure after described second grinding is than described medium floor height 100 to 200
Alternatively, deionized water mixed mutually with hydrofluoric acid comprise step:
Hydrofluoric acid is added in the deionized water;
Utilize the deionized water mixing after the pump order adds hydrofluoric acid.
Alternatively, utilize the wafer after described hydrofluoric acid solution cleans grinding, comprise step:
Described hydrofluoric acid solution is fed in the described rinse bath;
Described wafer is put into rinse bath, described wafer is cleaned.
Preferably, the flow velocity of described hydrofluoric acid solution is between 300 to 800cc/min, and the time of described cleaning is between 20 to 40 seconds.
Alternatively, when utilizing the wafer after described hydrofluoric acid solution cleans described grinding, also utilize the correction-plate of described hydrofluoric acid solution cleaning grinding pad.
The present invention has a kind of wafer cleaning method of identical or relevant art feature, comprises step:
Wafer after the grinding is provided, and the metal structure that has dielectric layer, is positioned at the via openings of described dielectric layer and is positioned at described via openings on the described wafer, and described metal structure is higher than described dielectric layer;
Deionized water is mixed mutually with hydrofluoric acid, form the hydrofluoric acid solution of concentration between 0.03% to 0.08%;
Utilize the wafer after described hydrofluoric acid solution cleans described grinding.
Alternatively, described metal structure comprises tungsten or metallic copper, and described dielectric layer comprises silicon oxide layer.
Alternatively, described metal structure is than described medium floor height 100 to 200
Alternatively, deionized water mixed mutually with hydrofluoric acid comprise step:
Hydrofluoric acid is added in the deionized water;
Utilize the deionized water mixing after the pump order adds hydrofluoric acid.
Alternatively, utilize the wafer after described hydrofluoric acid solution cleans grinding, comprise step:
Described hydrofluoric acid solution is fed in the described rinse bath;
Described wafer is put into rinse bath, described wafer is cleaned.
Preferably, the flow velocity of described hydrofluoric acid solution is between 300 to 800cc/min, and the time of described cleaning is between 20 to 40 seconds.
Compared with prior art, the present invention has the following advantages:
Chemical and mechanical grinding method of the present invention and wafer cleaning method, behind grinding metal layer, utilize the hydrofluoric acid solution of 0.03%-0.08% concentration to replace traditional deionized water that wafer is cleaned, with the abrasive grains that is mingled with between each metal structure--silica dioxide granule is removed totally comparatively up hill and dale, has reduced the grain defect number that grinds the back wafer surface.
Chemical and mechanical grinding method of the present invention and wafer cleaning method, also utilize this hydrofluoric acid solution to clean the correction-plate of grinding pad simultaneously, to prevent residual on correction-plate abrasive grains being arranged, further improved the repairing quality of grinding pad, and the Grinding Quality of grinding technics.
Description of drawings
Fig. 1 is the structural representation of existing chemical-mechanical grinding device;
Fig. 2 utilizes existing chemical and mechanical grinding method planarization metal layer device profile schematic diagram before;
Fig. 3 is the device profile schematic diagram that utilizes after existing chemical and mechanical grinding method carries out first grinding;
Fig. 4 is the device profile schematic diagram that utilizes after existing chemical and mechanical grinding method carries out second grinding;
Fig. 5 is for adopting the wafer surface particle contamination situation schematic diagram after existing chemical and mechanical grinding method cleans;
Fig. 6 is the flow chart of the chemical and mechanical grinding method in the first embodiment of the invention;
Fig. 7 is for carrying out chemical and mechanical grinding method planarization metal layer device profile schematic diagram before in the first embodiment of the invention;
Fig. 8 is for utilizing the device profile schematic diagram after chemical and mechanical grinding method carries out first grinding in the first embodiment of the invention;
Fig. 9 is for utilizing the device profile schematic diagram after chemical and mechanical grinding method carries out second grinding in the first embodiment of the invention;
Figure 10 is for utilizing the schematic diagram of chemical-mechanical grinding device preparation hydrofluoric acid solution in the first embodiment of the invention;
Figure 11 is for utilizing the device profile schematic diagram after chemical and mechanical grinding method carries out the wafer cleaning in the first embodiment of the invention;
Figure 12 is the flow chart of the wafer cleaning method in the second embodiment of the invention.
Embodiment
For above-mentioned purpose of the present invention, feature and advantage can be become apparent more, the specific embodiment of the present invention is described in detail below in conjunction with accompanying drawing.
Processing method of the present invention can be widely used in the every field; and can utilize many suitable material; be to be illustrated below by specific embodiment; certainly the present invention is not limited to this specific embodiment, and the known general replacement of one of ordinary skilled in the art is encompassed in protection scope of the present invention far and away.
Secondly, the present invention utilizes schematic diagram to describe in detail, when the embodiment of the invention is described in detail in detail, for convenience of explanation, the profile of expression device architecture can be disobeyed general ratio and be done local the amplification, should be with this as limitation of the invention, in addition, in the making of reality, should comprise the three dimensions size of length, width and the degree of depth.
During semiconductor device is produced, need to make the through-hole structure of multiple layer metal and interlayer to form the electrical connection of large amount of complex between device.Wherein, in the forming process of the metal of each layer and through-hole structure, often need utilize chemical and mechanical grinding method that metal level is carried out planarization.
Yet; along with constantly dwindling of device size; spacing between the metal structure in each via openings is more and more littler; regular meeting has the part abrasive grains and is sandwiched in therebetween phenomenon after grinding; even and this abrasive grains that is mingled with has been introduced new particle contamination source removing through also being difficult to after the step of clean wafers to device production.
For addressing the above problem, the present invention proposes a kind of new chemical and mechanical grinding method and wafer cleaning method.
First embodiment:
Present embodiment has been introduced a kind of new method of utilizing the chemical mechanical milling tech planarization metal layer.This metal level can be metallic copper or tungsten etc.
Fig. 6 is the flow chart of the chemical and mechanical grinding method in the first embodiment of the invention, and Fig. 7 to Figure 11 describes in detail to the first embodiment of the present invention below in conjunction with Fig. 6 to Figure 11 for the device profile map of explanation first embodiment of the invention.
Step 601: wafer to be ground is positioned in the chemical-mechanical grinding device, and formed dielectric layer on the described wafer, be positioned at the via openings of described dielectric layer and be positioned at described via openings and described dielectric layer on metal level.
Fig. 7 as shown in Figure 7, forms dielectric layer 702 earlier for carrying out chemical and mechanical grinding method planarization metal layer device profile schematic diagram before in the first embodiment of the invention on the substrate 701 with conductive structure (not shown).
In the present embodiment, this substrate can be for forming the substrate of metal oxide semiconductor transistor, also can be for forming the substrate of underlying metal connecting line construction.702 of this dielectric layers can be the silicon oxide layers that utilizes the method formation of chemical vapour deposition (CVD).
Then, utilize the method for photoetching on this dielectric layer 702, to form via hole image again, utilize method etching in this dielectric layer 702 of dry etching to form via openings (its bottom should link to each other with the conductive structure in the substrate 701).In order to ensure uniformity, the consistency of etching, can also between substrate 701 and dielectric layer 702, form the slower etching stop layer (not shown) of one deck etch rate earlier, make etching stop in this etching stop layer more consistently.
In other embodiments of the invention, this dielectric layer 702 can also be the sandwich construction of being made up of different materials.
In other embodiments of the invention, this via openings also comprises the opening of dual-damascene structure, to form the metal connecting line of dual-damascene structure.
Then, depositing metal layers 703 on this dielectric layer 702 and in the via openings.In the present embodiment, can be tungsten, copper etc.
In order to improve the switching performance between the upper metal layers that metal structure and back will form in the via openings, need make metal structure in the via openings be higher than the dielectric layer on next door usually.For this reason, the grinding technics with planarization metal layer divided for two steps.
Step 602: described wafer is carried out first grind, make described wafer surface expose described dielectric layer, in described via openings, form metal structure.
Fig. 8 is for utilizing the device profile schematic diagram after chemical and mechanical grinding method carries out first grinding in the first embodiment of the invention, as shown in Figure 8, utilizing the lapping liquid that grinds removal metal level 703 that wafer is carried out first grinds, the interior metal structure 703 ' of via openings that is not higher than dielectric layer 702, this moment metal of in via openings, filling, wafer surface expose to the open air outside be dielectric layer 702.
Used lapping liquid is the lapping liquid that is used for grinding metal layer 703 in first grinding, it can be divided into multistep and finish, and in each step, adopt different grinding technics conditions: as being further divided into for two steps, the grinding rate of the first step very fast (grinding efficiency height) wherein, the grinding rate in second step is slow (Grinding Quality is good), to take into account the requirement of grinding efficiency and Grinding Quality better.
Because lapping liquid used in first grinding is at metal level, its grinding rate to metal level will be higher than dielectric layer.Utilize the grinding rate of the two poor, can control grinding endpoint preferably, after this step first grinding was finished, wafer surface was exposed dielectric layer, and the metal structure 703 ' in the via openings can not be higher than dielectric layer.In order to improve the electrical connection quality between metal structure and upper metal layers, need make the dielectric layer that metal structure is higher than the next door in the via openings, for this reason, also carried out second grinding steps.
Step 603: described wafer is carried out second grind, make the metal structure in the described via openings be higher than described dielectric layer.
Fig. 9 is for utilizing the device profile schematic diagram after chemical and mechanical grinding method carries out second grinding in the first embodiment of the invention, as shown in Figure 9, in second grinding steps, utilize the lapping liquid of abrasive media layer 702 (being generally silica material) that wafer is carried out milled processed.Its grinding rate to dielectric layer can realize making the metal structure 703 ' in the via openings to protrude from the wafer dielectric layer far above the grinding rate to metal structure 703 '.
In the present embodiment, after second grinding was finished, metal structure 703 ' can exceed 100 to 200 than dielectric layer 702
, can effectively improve the electrical connection properties between the upper metal layers of metal structure and follow-up formation in the via openings.
Yet, as shown in Figure 9,, formed metal salient point because metal structure 703 ' is higher than the surface of wafer dielectric layer; When device size is little to a certain degree the time, easily between each metal salient point, be mingled with abrasive grains 710.This abrasive grains 710 is stuck between each salient point, utilizes the method for washed with de-ionized water wafer to be difficult to its removal after adopting traditional grinding.
For removing the abrasive grains between each metal structure 703 ', reduce the grain defect number of wafer surface, in the present embodiment, cleaning method is improved, utilize the mixed solution of deionized water and hydrofluoric acid that the wafer after grinding is cleaned.Because used abrasive grains silica dioxide granule normally in the lapping liquid, adopt this solution that wafer is cleaned after, can effectively remove the abrasive grains that is mingled with between each metal structure 703 ' on the wafer.
Step 604: deionized water is mixed mutually with hydrofluoric acid, form the hydrofluoric acid solution of concentration between 0.03% to 0.08%.
This moment, the dielectric layer 702 of wafer surface was a silicon dioxide layer, it can react with hydrofluoric acid equally, for this reason, the concentration of used hydrofluoric acid solution is extremely low in the present embodiment, as long as, can make abrasive grains get final product by coming off between each metal salient point (metal structure 703 ') to silicon dioxide corrosiveness slightly.
Through a large amount of experiments, adopted the hydrofluoric acid solution of concentration between 0.03% to 0.08%, the hydrofluoric acid solution as 0.05%, it both can reach the effect of cleaning abrasive grains preferably, and was little to the dielectric layer influence of wafer surface again.
In the present embodiment, the blend step of this step deionized water and hydrofluoric acid can utilize the pipeline of chemical-mechanical grinding device itself to realize.
Figure 10 is for utilizing the schematic diagram of chemical-mechanical grinding device preparation hydrofluoric acid solution in the first embodiment of the invention, as shown in figure 10, utilizes existing pipeline in the chemical machinery equipment can realize the preparation of hydrofluoric acid solution.Concrete steps are:
A, utilize deionized water pipeline 1001 to feed deionized waters, and utilize spare duct 1002 that hydrofluoric acid is added in the deionized water pipeline 1001;
B, the hydrofluoric acid that utilizes pump 1003 order to add fully mix with deionized water, to prevent when the clean wafers, because of the structure on solution concentration inequality damage wafers surface;
C, mixed hydrofluoric acid solution fed lead in the pipeline of rinse bath (cleaner) 1004.
In other embodiments of the invention, also can adopt alternate manner preparation hydrofluoric acid solution, prepare the hydrofluoric acid solution of this concentration, stir, directly feed again in the rinse bath etc. as directly utilizing container.
Step 605: utilize the wafer after described hydrofluoric acid solution cleans grinding.It specifically can comprise step again:
Described hydrofluoric acid solution is fed in the described rinse bath;
Described wafer is put into rinse bath, described wafer is cleaned.
In the present embodiment, the flow velocity of the hydrofluoric acid solution of feeding can be between 300 to 800cc/min, as are 500cc/min, and the time of cleaning can not be oversize, to prevent damage wafers, usually can be between 20 to 40 seconds, as be 30 seconds.
Figure 11 is for utilizing the device profile schematic diagram after chemical and mechanical grinding method carries out the wafer cleaning in the first embodiment of the invention, as shown in figure 11, the abrasive grains that is mingled with between each metal structure 703 ' has been cleaned removal.Because the concentration of used hydrofluoric acid solution is very low, scavenging period is not long yet, and its influence to dielectric layer 702 is little, experiment confirm, and under above-mentioned cleaning condition, dielectric layer 702 removed thickness are about 20 to 30
Between, device architecture is not had big influence.
In addition, in the present embodiment, when utilizing hydrofluoric acid solution to clean grinding back wafer, also utilize this hydrofluoric acid solution to clean the correction-plate of grinding pad.
This correction-plate is used for the particle on grinding pad surface is removed, and repairs grinding pad, makes grinding pad recover coarse surface, carries out to guarantee that grinding technics is stable.This correction-plate also can the adhesion section abrasive grains when repairing the grinding pad surface, removes if this part abrasive grains fails to clean, and can influence the repairing effect of correction-plate to grinding pad, and then influence the Grinding Quality of wafer.In the present embodiment, adopt the above-mentioned hydrofluoric acid solution of preparation that correction-plate is cleaned, can further reduce the amount of abrasive particles that may adhere on it, favourable to improving Grinding Quality.
Second embodiment:
The present invention goes back the wafer cleaning method after correspondence provides a kind of the grinding.Figure 12 is the flow chart of the wafer cleaning method in the second embodiment of the invention, below in conjunction with Figure 12 the second embodiment of the present invention is described in detail.
Wafer cleaning method in the present embodiment comprises step:
Step 1201: the wafer after the grinding is provided, and the metal structure that has dielectric layer, is positioned at the via openings of described dielectric layer and is positioned at described via openings on the described wafer, and described metal structure is higher than described dielectric layer.
Wafer after the grinding that provides in the present embodiment as shown in Figure 9, wherein, substrate 701 can be for forming the substrate of metal oxide semiconductor transistor, also can be for forming the substrate of underlying metal connecting line construction.702 of dielectric layers that form on this substrate 701 can be the silicon oxide layers that utilizes the method formation of chemical vapour deposition (CVD).
Also formed a plurality of via openings in dielectric layer 702, in other embodiments of the invention, via openings also comprises the opening of dual-damascene structure, to form the metal connection structure of dual damascene.
In each via openings, also formed metal structure 703 '.In the present embodiment, this metal structure can comprise tungsten, copper etc.
In addition, in order to improve the switching performance between the upper metal layers that metal structure and back will form in the via openings, need make metal structure in the via openings be higher than the dielectric layer on next door usually.In the present embodiment, the metal structure on the wafer after this grinds is than the medium floor height 100 to 200 on next door
, as 150
Yet, as shown in Figure 9,,, between the metal structure 703 ' of each protrusion, easily be mingled with abrasive grains 710 when device size is little to a certain degree the time because metal structure 703 ' is higher than the surface of wafer dielectric layer 702.This abrasive grains 710 is stuck between each salient point, adopt traditional grinding after the washed with de-ionized water method be difficult to its removal.
For removing the abrasive grains between each metal structure 703 ', reduce the grain defect number of wafer surface, in the present embodiment, the cleaning method after grinding is improved, utilize the mixed solution of deionized water and hydrofluoric acid that the wafer after grinding is cleaned.
Because used abrasive grains silica dioxide granule normally in the lapping liquid, adopt this solution that wafer is cleaned after, can effectively remove the abrasive grains that is mingled with between each metal structure 703 ' on the wafer.
Step 1202: deionized water is mixed mutually with hydrofluoric acid, form the hydrofluoric acid solution of concentration between 0.03% to 0.08%.
Through a large amount of experiments, adopted the hydrofluoric acid solution of concentration between 0.03% to 0.08%, hydrofluoric acid solution as 0.05%, it both can make the abrasive grains that is mingled with by coming off between each salient point (metal structure 703 '), reach the effect of cleaning abrasive grains preferably, little to the dielectric layer influence of wafer surface again.
In the present embodiment, behind the preparation hydrofluoric acid solution, utilize pump to realize fully mixing of deionized water and hydrofluoric acid again, concrete steps can for:
A, utilize the deionized water pipeline to feed deionized water, and hydrofluoric acid is added in the deionized water pipeline;
B, the deionized water that utilizes pump order to add behind the hydrofluoric acid fully mix the dielectric layer on damage wafers surface to prevent solution concentration inequality when cleaning;
C, mixed hydrofluoric acid solution fed lead in the pipeline of rinse bath (cleaner).
In other embodiments of the invention, also can adopt alternate manner preparation hydrofluoric acid solution,, stir, directly feed again in the rinse bath etc. as the direct hydrofluoric acid solution of this concentration of preparation in container.
Step 1203: utilize the wafer after described hydrofluoric acid solution cleans described grinding.It specifically can comprise step again:
Described hydrofluoric acid solution is fed in the described rinse bath;
Described wafer is put into rinse bath, described wafer is cleaned.
In the present embodiment, the flow velocity of the hydrofluoric acid solution of feeding can be between 300 to 800cc/min, as are 500cc/min, and the time of cleaning can not be oversize, to prevent damage wafers, usually can be between 20 to 40 seconds, as be 30 seconds.
As shown in figure 11, the abrasive grains that is mingled with between each metal structure 703 ' has been cleaned removal.Because the concentration of used hydrofluoric acid solution is very low, scavenging period is not long yet, and its influence to dielectric layer 702 is little.Experiment confirm, under above-mentioned cleaning condition, dielectric layer 702 removed thickness are 20 to 30
Between, device architecture is not had big influence.
After adopting the wafer cleaning method in the present embodiment, the abrasive grains that is mingled with between each metal structure of protruding--silica dioxide granule can be cleaned more up hill and dale and be removed, and has reduced the grain defect number that grinds the back wafer surface, has improved device yield.
Though the present invention with preferred embodiment openly as above; but it is not to be used for limiting the present invention; any those skilled in the art without departing from the spirit and scope of the present invention; can make possible change and modification, so protection scope of the present invention should be as the criterion with the scope that claim of the present invention was defined.
Claims (15)
1. a chemical and mechanical grinding method is characterized in that, comprises step:
Wafer to be ground is positioned in the chemical-mechanical grinding device, and formed dielectric layer on the described wafer, be positioned at the via openings of described dielectric layer and be positioned at described via openings and described dielectric layer on metal level;
Described wafer is carried out first grind, make described wafer surface expose described dielectric layer, in described via openings, form metal structure;
Described wafer is carried out second grind, make the metal structure in the described via openings be higher than described dielectric layer;
Deionized water is mixed mutually with hydrofluoric acid, form the hydrofluoric acid solution of concentration between 0.03% to 0.08%;
Utilize the wafer after described hydrofluoric acid solution cleans grinding, remove the abrasive grains that is mingled with between described metal structure.
2. chemical and mechanical grinding method as claimed in claim 1 is characterized in that: described metal level comprises tungsten or metallic copper, and described dielectric layer comprises silicon oxide layer.
3. chemical and mechanical grinding method as claimed in claim 1 is characterized in that: described second after grinding metal structure than described medium floor height 100 to
4. chemical and mechanical grinding method as claimed in claim 1 is characterized in that: deionized water is mixed mutually with hydrofluoric acid comprise step:
Hydrofluoric acid is added in the deionized water;
Utilize the deionized water mixing after the pump order adds hydrofluoric acid.
5. as claim 1 or 4 described chemical and mechanical grinding methods, it is characterized in that, utilize the wafer after described hydrofluoric acid solution cleans grinding, comprise step:
Described hydrofluoric acid solution is fed in the described rinse bath;
Described wafer is put into rinse bath, described wafer is cleaned.
6. chemical and mechanical grinding method as claimed in claim 5 is characterized in that: the flow velocity of described hydrofluoric acid solution is between 300 to 800cc/min.
7. chemical and mechanical grinding method as claimed in claim 5 is characterized in that: the time of described cleaning is between 20 to 40 seconds.
8. chemical and mechanical grinding method as claimed in claim 1 is characterized in that: when utilizing the wafer after described hydrofluoric acid solution cleans described grinding, also utilize the correction-plate of described hydrofluoric acid solution cleaning grinding pad.
9. a wafer cleaning method is characterized in that, comprises step:
Wafer after the grinding is provided, and the metal structure that has dielectric layer, is positioned at the via openings of described dielectric layer and is positioned at described via openings on the described wafer, and described metal structure is higher than described dielectric layer;
Deionized water is mixed mutually with hydrofluoric acid, form the hydrofluoric acid solution of concentration between 0.03% to 0.08%;
Utilize the wafer after described hydrofluoric acid solution cleans described grinding, remove the abrasive grains that is mingled with between described metal structure.
10. cleaning method as claimed in claim 9 is characterized in that: described metal structure comprises tungsten or metallic copper, and described dielectric layer comprises silicon oxide layer.
11. cleaning method as claimed in claim 9 is characterized in that: described metal structure than described medium floor height 100 to
12. cleaning method as claimed in claim 9 is characterized in that: deionized water mixed mutually with hydrofluoric acid comprise step:
Hydrofluoric acid is added in the deionized water;
Utilize the deionized water mixing after the pump order adds hydrofluoric acid.
13., it is characterized in that as claim 9 or 12 described cleaning methods, utilize the wafer after described hydrofluoric acid solution cleans grinding, comprise step:
Described hydrofluoric acid solution is fed in the described rinse bath;
Described wafer is put into rinse bath, described wafer is cleaned.
14. cleaning method as claimed in claim 13 is characterized in that: the flow velocity of described hydrofluoric acid solution is between 300 to 800cc/min.
15. cleaning method as claimed in claim 13 is characterized in that: the time of described cleaning is between 20 to 40 seconds.
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|---|---|---|---|---|
| CN103035504B (en) * | 2011-10-09 | 2016-07-06 | 中芯国际集成电路制造(北京)有限公司 | Cmp method and chemical-mechanical polisher |
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| CN101459124A (en) | 2009-06-17 |
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