CN101452992A - Phase changing storage device and its making method - Google Patents
Phase changing storage device and its making method Download PDFInfo
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- CN101452992A CN101452992A CNA2007101961237A CN200710196123A CN101452992A CN 101452992 A CN101452992 A CN 101452992A CN A2007101961237 A CNA2007101961237 A CN A2007101961237A CN 200710196123 A CN200710196123 A CN 200710196123A CN 101452992 A CN101452992 A CN 101452992A
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- 238000000034 method Methods 0.000 title claims abstract description 15
- 238000003860 storage Methods 0.000 title abstract description 10
- 239000012782 phase change material Substances 0.000 claims abstract description 60
- 238000004519 manufacturing process Methods 0.000 claims abstract description 12
- 238000005530 etching Methods 0.000 claims description 28
- 230000015572 biosynthetic process Effects 0.000 claims description 8
- 239000003989 dielectric material Substances 0.000 claims description 8
- 150000001786 chalcogen compounds Chemical class 0.000 claims description 2
- 239000000463 material Substances 0.000 description 13
- VYPSYNLAJGMNEJ-UHFFFAOYSA-N Silicium dioxide Chemical compound O=[Si]=O VYPSYNLAJGMNEJ-UHFFFAOYSA-N 0.000 description 11
- 230000008859 change Effects 0.000 description 10
- 239000004065 semiconductor Substances 0.000 description 10
- 239000005380 borophosphosilicate glass Substances 0.000 description 6
- 238000009792 diffusion process Methods 0.000 description 4
- 238000010438 heat treatment Methods 0.000 description 4
- 230000009467 reduction Effects 0.000 description 4
- 239000000377 silicon dioxide Substances 0.000 description 4
- 238000004528 spin coating Methods 0.000 description 4
- GDFCWFBWQUEQIJ-UHFFFAOYSA-N [B].[P] Chemical compound [B].[P] GDFCWFBWQUEQIJ-UHFFFAOYSA-N 0.000 description 3
- QVGXLLKOCUKJST-UHFFFAOYSA-N atomic oxygen Chemical compound [O] QVGXLLKOCUKJST-UHFFFAOYSA-N 0.000 description 3
- 238000006243 chemical reaction Methods 0.000 description 3
- 238000005516 engineering process Methods 0.000 description 3
- 239000011521 glass Substances 0.000 description 3
- 229910052760 oxygen Inorganic materials 0.000 description 3
- 239000001301 oxygen Substances 0.000 description 3
- 238000000059 patterning Methods 0.000 description 3
- 239000002210 silicon-based material Substances 0.000 description 3
- 238000005229 chemical vapour deposition Methods 0.000 description 2
- 150000001875 compounds Chemical class 0.000 description 2
- 239000004020 conductor Substances 0.000 description 2
- 238000010586 diagram Methods 0.000 description 2
- 238000005240 physical vapour deposition Methods 0.000 description 2
- 239000000126 substance Substances 0.000 description 2
- 229910000967 As alloy Inorganic materials 0.000 description 1
- 229910052581 Si3N4 Inorganic materials 0.000 description 1
- RTAQQCXQSZGOHL-UHFFFAOYSA-N Titanium Chemical compound [Ti] RTAQQCXQSZGOHL-UHFFFAOYSA-N 0.000 description 1
- 239000004411 aluminium Substances 0.000 description 1
- XAGFODPZIPBFFR-UHFFFAOYSA-N aluminium Chemical compound [Al] XAGFODPZIPBFFR-UHFFFAOYSA-N 0.000 description 1
- 229910052782 aluminium Inorganic materials 0.000 description 1
- 230000008901 benefit Effects 0.000 description 1
- 229910052798 chalcogen Inorganic materials 0.000 description 1
- 150000004770 chalcogenides Chemical class 0.000 description 1
- 150000001787 chalcogens Chemical class 0.000 description 1
- 238000000151 deposition Methods 0.000 description 1
- 230000008021 deposition Effects 0.000 description 1
- 230000006872 improvement Effects 0.000 description 1
- 238000012986 modification Methods 0.000 description 1
- 230000004048 modification Effects 0.000 description 1
- 230000002441 reversible effect Effects 0.000 description 1
- 229910052710 silicon Inorganic materials 0.000 description 1
- 239000010703 silicon Substances 0.000 description 1
- HQVNEWCFYHHQES-UHFFFAOYSA-N silicon nitride Chemical compound N12[Si]34N5[Si]62N3[Si]51N64 HQVNEWCFYHHQES-UHFFFAOYSA-N 0.000 description 1
- -1 silicon nitrides Chemical class 0.000 description 1
- 239000000758 substrate Substances 0.000 description 1
- 239000010936 titanium Substances 0.000 description 1
- 229910052719 titanium Inorganic materials 0.000 description 1
- WFKWXMTUELFFGS-UHFFFAOYSA-N tungsten Chemical compound [W] WFKWXMTUELFFGS-UHFFFAOYSA-N 0.000 description 1
- 239000010937 tungsten Substances 0.000 description 1
- 229910052721 tungsten Inorganic materials 0.000 description 1
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Abstract
The invention provides a phase-change storage device, which comprises a first conductive electrode, a second dielectric layer, a phase-change material layer, an empty chamber and a second conductive electrode, wherein the first conductive electrode is arranged in a first dielectric layer; the second dielectric layer is arranged on one side of the first dielectric layer; the phase-change material layer is embedded in the second dielectric layer; the phase-change material layer and the first conductive electrode are in electrical connection; the empty chamber is arranged in the second dielectric layer and is between the second dielectric layer and the sidewall of the phase-change material layer to isolate one sidewall of the phase-change material layer from the adjacent second dielectric layer; and the second conductive electrode is stacked on one side of the phase-change material layer and is in electrical connection with the phase-change material layer. The invention also provides a method for manufacturing the phase-change storage device.
Description
Technical field
The present invention relates to a kind of storage device and manufacture method thereof, and be particularly to a kind of phase-change memory and manufacture method thereof.
Background technology
The speciality that phase-change memory has is non-volatile, height reads signal, high density, high erasable number of times and low-work voltage/electric current is quite potential non-volatility memorizer.Wherein improving storage density, reducing current density is the important techniques pointer.
The phase-transition material that in phase-change memory, is adopted in the memory cell can present at least two kinds solid-state, comprise crystalline state and noncrystalline attitude.In general, the operation of phase change memory cell system utilizes the change of temperature to carry out conversion between binary states, owing to the atomic arrangement of noncrystalline attitude confusion has higher resistance, therefore measure crystalline state and the noncrystalline attitude that to distinguish phase-transition material easily by simple electrical property.Since phase-transition material change a kind of reversible reaction mutually into, when therefore phase-transition material is used for being used as storage medium, be to store, that is to say that bank bit rank (0,1) are to utilize between binary states the difference of resistance to distinguish by the conversion between noncrystalline attitude and the crystalline state binary states.
In order to promote the using value of phase-change memory, just need further to reduce the size of phase-change memory memory cell, to promote the density of phase-change memory memory cell.Yet, reduction along with memory cell size, mean the also reduction thereupon of spacing of memory cell, thereby the heat that has increased possibly between phase change memory cell disturbs the generation of (thermal disturb) or hot cross-talk (thermal cross-talk), and then interferes with adjacent phase change memory cell and thereby cause position storage errors situation in the phase-change memory when operation.
Therefore, just need a kind of phase-change memory of structure improvement to address the above problem.
Summary of the invention
In view of this, in order to address the above problem, the invention provides a kind of phase-change memory and manufacture method thereof.
According to an embodiment, the invention provides a kind of phase-change memory, comprising:
One first conductive electrode is arranged in one first dielectric layer; One second dielectric layer is arranged at a side of this first dielectric layer; One phase-change material layer is embedded in this second dielectric layer, and this phase-change material layer is electrically connected with this first conductive electrode; One empty chamber is arranged in this second dielectric layer, between this second dielectric layer and this phase-change material layer sidewall, isolates a sidewall of this phase-change material layer and this adjacent second dielectric layer thereof; And one second conductive electrode, be stacked in a side of this phase-change material layer, and be electrically connected with this phase-change material layer.
According to another embodiment, the invention provides a kind of manufacture method of phase-change memory, comprising:
One first dielectric layer is provided, is provided with one first conductive electrode in it; Form a phase-change material layer on this first dielectric layer of part, this phase-change material layer is stacked on this first conductive electrode; Form a sacrifice layer, an etching stopping layer in regular turn on this first dielectric layer, conformably to cover this first dielectric layer and this phase-change material layer; Smooth one second dielectric layer that forms on this etching stopping layer with covering; Remove part this second dielectric layer and this sacrifice layer and make formation one gap between this phase-change material layer and this etching stopping layer; Smooth one the 3rd dielectric layer that forms and then seals this gap and formed the chamber between this phase-change material layer and this etching stopping layer on this etching stopping layer, this phase-change material layer and this gap with covering; And forming one second conductive electrode in the 3rd dielectric layer, this second conductive electrode is stacked on this phase-change material layer.
For above and other objects of the present invention, feature and advantage can be become apparent, a preferred embodiment cited below particularly, and conjunction with figs. are described in detail below.
Description of drawings
Fig. 1～5 are a series of schematic diagrames, have shown the section situation of phase-change memory in the different fabrication stages according to one embodiment of the invention; And
Fig. 6 is a schematic diagram, has shown the section situation according to the phase-change memory of another embodiment of the present invention.
Description of reference numerals
100～semiconductor structure; 102～dielectric layer;
104～diffusion impervious layer; 106～conductive layer;
108,118,150～dielectric layer; 110,152～conductive electrode;
112～phase-change material layer; 114,114 '～sacrifice layer;
116,116 '～etching stopping layer; 154～conductive layer;
300～etching program; G, G '～gap/empty chamber.
Embodiment
It is as follows that the manufacture method of phase-change memory of the present invention will cooperate Fig. 1 to 5 work one to be described in detail.At this, above-mentioned graphic in only part illustrated the section situation of a plurality of memory cell when making in the phase-change memory, those skilled in the art will be understood that the phase change memory cell in the present embodiment can more comprise suitable conductive member (as interior connect to insert fasten or internal connecting line etc.) it is electrically connected on elements such as an active device (for example transistor or diode) and a lead.Yet, based on the purpose of simplicity of illustration, these a little members be not illustrated in above-mentioned graphic in.
Please refer to Fig. 1, a phase variation storage unit structure for preparing substantially at first is provided, it has comprised semiconductor structure 100.100 of semiconductor structures include be arranged on the semiconductor substrate or within an active device (not shown), for example be transistor or diode.On semiconductor structure 100, then be formed with a dielectric layer 102, in dielectric layer, then be formed with two conduction contactants (conductivecontact) respectively, its may contact respectively be formed in the semiconductor structure 100 or on an active device (not shown).
As shown in Figure 1, be formed in the dielectric layer 102 and comprise a conductive layer 106 and be arranged at conductive layer 106 and a diffusion impervious layer 104 of 102 of adjacent dielectric at this conduction contactant.At this, diffusion impervious layer 104 has coated the sidewall and the bottom surface of conductive layer 106, and can avoid electric conducting materials in the conductive layer 106 to diffuse in contiguous dielectric layer 102 or the semiconductor structure 100 and influenced the performance of active device in it by the setting of diffusion impervious layer 104.By the setting of above-mentioned conduction contactant, can form being electrically connected between the memory cell structure of the active device that is arranged in the semiconductor structure 100 and follow-up formation.The material and technology of above-mentioned conduction contactant can adopt general existing conduction contactant technology to form, so at this in detail its relevant manufacturing is not described in detail.
Please refer to Fig. 2, then form a dielectric layer 108 on dielectric layer 102, and then a plurality of electrically conductive electrodes 110 independently of formation in dielectric layer 108 in, wherein each conductive electrode 110 respectively aligned in general in a conductive layer 106 of below and pile up setting thereon.At this, compared to conductive layer 106, the size of conductive electrode 110 is less relatively.Conductive electrode 110 can comprise the electric conducting materials such as alloy as titanium, aluminium, tungsten or above-mentioned material, and its formation method can adopt the physical vapour deposition (PVD) mode as sputter to form.Dielectric layer 102 then can comprise as boron phosphorus doping silica glass (Borophosphosilicate glass, BPSG), silica or spin-coating glass oxygen containing silicon materials such as (SOG).
Please refer to Fig. 3, then form one deck phase-transition material (not shown) on dielectric layer 108, its thickness is approximately between 300 dusts～2000 dusts, to cover as dielectric layer 108 and the conductive electrode 110 shown in Fig. 2.At this, above-mentioned phase-transition material comprises chalcogen (chalcogenide) compound, for example is Ge-Te-Sb ternary chalcongen compound or Te-Sb binary chalcogen compound.The formation method of this layer phase-transition material for example is physical vaporous deposition and follows then by existing little shadow and this layer of etching program (not shown) patterning phase-transition material, thereby a plurality of phase-change material layer 112 that formed patterning respectively are on dielectric layer 108, and these a little phase-change material layer 112 have covered a conductive electrode 110 of below respectively.Phase-change material layer 112 is electrically connected with conductive electrode 110.
Please continue with reference to Fig. 3, then form a sacrifice layer 114 and an etching stopping layer 116 in regular turn on dielectric layer 108 and phase-change material layer 112, wherein sacrifice layer 114 conformably is formed on dielectric layer 108 and the phase-change material layer 112 with etching stopping layer 116.At this, sacrifice layer 114 comprises as dielectric materials such as silica or silicon nitrides, and its thickness is about 30 dusts～200 dusts and can be identical or inequality with the contained dielectric material of the dielectric layer 108 of below.And etching stopping layer 116 comprises the dielectric material as silicon nitride, and its thickness is about 200 dusts～500 dusts and inequality with the contained dielectric material of sacrifice layer 114, and then shows under the same etch chemicals and the suitable etching selectivity of 114 of sacrifice layers.Follow the smooth dielectric layer 118 that forms on etching stopping layer 116 with covering, dielectric layer 118 comprises as boron phosphorus doping silica glass (Borophosphosilicate glass, BPSG), silica or spin-coating glass oxygen containing silicon materials such as (SOG), its thickness is about 3000 dusts～8000 dusts and can be identical or inequality with the contained dielectric material of the dielectric layer 108 of below.At this, the material of dielectric layer 118 for example is to be same as the contained dielectric material of sacrifice layer 114, to remove it simultaneously aspire to adopting the same etch chemicals in the subsequent etch program.After forming dielectric layer 118, can obtain the smooth surface of a cardinal principle as shown in Figure 3.
Please refer to Fig. 4, then implement a planarization program (not shown), for example be chemico-mechanical polishing program (CMP), to remove the parts such as dielectric layer 118, etching stopping layer 116 and sacrifice layer 114 that are higher than phase-change material layer 112 end faces, and then expose the end face of phase-change material layer 112 and formed sacrifice layer 114 ' and etching stopping layer 116 ' respectively, and on etching stopping layer 116 ', stay dielectric layer 118 with cardinal principle U type in the side-walls of being close to phase-change material layer 112.
Then implement an etching program 300, remove sacrifice layer 114, and then stop to form between the layer 116 ' clearance G in the sidewall and the adjacent etched of phase-change material layer 112 to remove remaining dielectric layer 118 and part.As shown in Figure 4, this moment, clearance G was exposed a sacrifice layer 114 ' of its below.Above-mentioned etching program 300 for example is a wet etching program, and can control the degree that removes sacrifice layer 114 by the execution time of control etching program.
Please refer to Fig. 5, follow smooth another dielectric layer 150 that forms on phase-change material layer 112 and etching stopping layer 116 ', with covering to form a smooth substantially surface.Dielectric layer 150 can comprise boron phosphorus doping silica glass (Borophosphosilicate glass, BPSG), silica or spin-coating glass oxygen containing silicon materials such as (SOG) and can be by forming as methods such as chemical vapour deposition (CVD) or spin coatings.When forming dielectric layer 150,,, the material of formation dielectric layer 150 stops clearance G between layer 116 ' so can't filling in the sidewall that is positioned at phase-change material layer 112 and adjacent etched because the width of clearance G be little relatively.Therefore after forming dielectric layer 150, can between a sidewall of phase-change material layer 112 and adjacent etching stopping layer 116 ' and dielectric layer 150, form chamber G.Empty chamber G is between dielectric layer 150 and phase-change material layer 112 sidewalls.May include air among the G of this space-time chamber and be in situation near vacuum (owing to may be in an environment of utmost point low pressure when forming dielectric layer 150) most probably, so the coefficient of heat conduction will be far below the coefficient of heat conduction that comprises dielectric material in the adjacent rete (as sacrifice layer 114 ', etching stopping layer 116 ' and dielectric layer 150) in the zone.Therefore when memory cell operation, for example be in heating Fig. 5 left side phase-change material layer 112 when writing bit data, this moment can't be via the phase-change material layer 112 (promptly be positioned at the phase-change material layer 112 on Fig. 5 right side) of the direction on heat exchange pattern 100 surfaces along level in the semiconductor structure transfer of heat energy in it to the consecutive storage unit structure through the phase-change material layer 112 of heating, and then can improve that heat between existing adjacent phase change memory cell with dimension reduction is disturbed and problem such as hot cross-talk.
Then can form a plurality of conductive electrodes 152 in dielectric layer 150, these a little conductive electrodes 152 form and are stacked in a side of phase-change material layer 112 substantially, and are electrically connected with this phase-change material layer 112.The material of conductive electrode 152 can be with reference to the making of conductive electrode 110, so no longer be repeated in this description at this with making.Then on dielectric layer 150, form the conductive layer 154 of a patterning, it has also covered the conductive electrode 152 that is arranged in dielectric layer 150, and then has been electrically connected these a little phase change memory cells and has been positioned at the contactant of each phase change memory cell below and element such as active device.
Fig. 6 has then illustrated the section situation according to the phase-change memory of another embodiment.As shown in Figure 6, comprised chamber G ' this moment in phase-change memory, it has further exposed the dielectric layer 108 of below.The formation situation of so empty chamber G ' can form by prolonging the etching period of implementing in the etching program 300 (seeing also Fig. 4).Therefore when memory cell operation, for example be in heating Fig. 6 left side phase-change material layer 112 when writing bit data, this moment can't be via the phase-change material layer 112 (promptly be positioned at the phase-change material layer 112 on Fig. 6 right side) of the direction on heat exchange pattern 100 surfaces along level in the semiconductor structure transfer of heat energy in it to the consecutive storage unit structure through the phase-change material layer 112 of heating, and then can improve that heat between existing adjacent phase change memory cell with dimension reduction is disturbed and problem such as hot cross-talk.
Though the present invention discloses as above with embodiment; right its is not in order to limit the present invention; any those skilled in the art; without departing from the spirit and scope of the present invention; when can being used for a variety of modifications and variations, so protection scope of the present invention is as the criterion when looking the appending claims person of defining.
Claims (10)
1. phase-change memory comprises:
First conductive electrode is arranged in first dielectric layer;
Second dielectric layer is arranged at a side of this first dielectric layer;
Phase-change material layer is embedded in this second dielectric layer, and this phase-change material layer is electrically connected with this first conductive electrode;
Empty chamber is arranged in this second dielectric layer, between this second dielectric layer and this phase-change material layer sidewall, isolates this second dielectric layer that the sidewall of this phase-change material layer is adjacent; And
Second conductive electrode is stacked in a side of this phase-change material layer, and is electrically connected with this phase-change material layer.
2. phase-change memory as claimed in claim 1 more comprises the etching stopping layer that is embedded in this second dielectric layer, and this etching stopping layer is at this sky chamber and this second dielectric layer and between this first dielectric layer and this second dielectric layer.
3. phase-change memory as claimed in claim 2 more comprises the sacrifice layer that is embedded between this second dielectric layer and this first dielectric layer, wherein should sky chamber this sacrifice layer of exposed portions serve.
4. phase-change memory as claimed in claim 2, more comprise the sacrifice layer that is embedded between this second dielectric layer and this first dielectric layer, wherein should sky chamber part expose this first dielectric layer, and should isolate this phase-change material layer and this sacrifice layer and this etching stopping layer fully in the sky chamber.
5. phase-change memory as claimed in claim 3, more comprise and be positioned at three dielectric layer of this first dielectric layer with respect to the opposite side of this second dielectric layer, and be embedded with at least one conductive layer in the 3rd dielectric layer, wherein this first conductive electrode is electrically connected on this conductive layer.
6. phase-change memory as claimed in claim 1, wherein this phase-change material layer comprises chalcogen compound.
7. phase-change memory as claimed in claim 1 wherein should the sky chamber comprises air or is in state near vacuum.
8. the manufacture method of a phase-change memory comprises:
First dielectric layer is provided, is provided with first conductive electrode in it;
Form phase-change material layer on this first dielectric layer of part, this phase-change material layer is stacked on this first conductive electrode;
Form sacrifice layer, etching stopping layer in regular turn on this first dielectric layer, conformably to cover this first dielectric layer and this phase-change material layer;
Smooth second dielectric layer that forms on this etching stopping layer with covering;
Removing part this second dielectric layer and this sacrifice layer makes and forms the gap between this phase-change material layer and this etching stopping layer;
Smooth the 3rd dielectric layer that forms and then seals this gap and the empty chamber of formation between this phase-change material layer and this etching stopping layer with covering on this etching stopping layer, this phase-change material layer and this gap; And
Form second conductive electrode in the 3rd dielectric layer, this second conductive electrode is stacked on this phase-change material layer.
9. the manufacture method of phase-change memory as claimed in claim 8, wherein this etching stopping layer and this sacrifice layer comprise dissimilar dielectric materials.
10. the manufacture method of phase-change memory as claimed in claim 8, wherein this etching program removes an one of this sacrifice layer, and this gap is exposed one one of this sacrifice layer, and should isolate this phase-change material layer and this sacrifice layer and this etching stopping layer in the sky chamber.
Priority Applications (1)
| Application Number | Priority Date | Filing Date | Title |
|---|---|---|---|
| CNA2007101961237A CN101452992A (en) | 2007-11-28 | 2007-11-28 | Phase changing storage device and its making method |
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| Application Number | Priority Date | Filing Date | Title |
|---|---|---|---|
| CNA2007101961237A CN101452992A (en) | 2007-11-28 | 2007-11-28 | Phase changing storage device and its making method |
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| Publication Number | Publication Date |
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| CN101452992A true CN101452992A (en) | 2009-06-10 |
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| CNA2007101961237A Pending CN101452992A (en) | 2007-11-28 | 2007-11-28 | Phase changing storage device and its making method |
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Cited By (3)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| CN101930989B (en) * | 2009-06-23 | 2012-05-02 | 南亚科技股份有限公司 | Phase-change memory and method of making same |
| CN107886987A (en) * | 2016-09-29 | 2018-04-06 | 爱思开海力士有限公司 | Storage system and its operating method |
| WO2022241635A1 (en) * | 2021-05-18 | 2022-11-24 | Yangtze Advanced Memory Industrial Innovation Center Co., Ltd | Three-dimensional phase-change memory devices and methods for forming the same |
-
2007
- 2007-11-28 CN CNA2007101961237A patent/CN101452992A/en active Pending
Cited By (4)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| CN101930989B (en) * | 2009-06-23 | 2012-05-02 | 南亚科技股份有限公司 | Phase-change memory and method of making same |
| CN107886987A (en) * | 2016-09-29 | 2018-04-06 | 爱思开海力士有限公司 | Storage system and its operating method |
| CN107886987B (en) * | 2016-09-29 | 2021-04-27 | 爱思开海力士有限公司 | Storage system and operation method thereof |
| WO2022241635A1 (en) * | 2021-05-18 | 2022-11-24 | Yangtze Advanced Memory Industrial Innovation Center Co., Ltd | Three-dimensional phase-change memory devices and methods for forming the same |
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Open date: 20090610 |