CN101438405B - 用于在集成电路制造中指示方向性的方法和装置 - Google Patents

用于在集成电路制造中指示方向性的方法和装置 Download PDF

Info

Publication number
CN101438405B
CN101438405B CN2007800066717A CN200780006671A CN101438405B CN 101438405 B CN101438405 B CN 101438405B CN 2007800066717 A CN2007800066717 A CN 2007800066717A CN 200780006671 A CN200780006671 A CN 200780006671A CN 101438405 B CN101438405 B CN 101438405B
Authority
CN
China
Prior art keywords
integrated circuit
indicator
indicating device
injection
injects
Prior art date
Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
Active
Application number
CN2007800066717A
Other languages
English (en)
Chinese (zh)
Other versions
CN101438405A (zh
Inventor
爱德华·O·特拉维斯
梅于尔·D·施罗夫
唐纳德·E·斯梅尔策
特拉西·L·史密斯
Current Assignee (The listed assignees may be inaccurate. Google has not performed a legal analysis and makes no representation or warranty as to the accuracy of the list.)
NXP USA Inc
Original Assignee
Freescale Semiconductor Inc
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed by Freescale Semiconductor Inc filed Critical Freescale Semiconductor Inc
Publication of CN101438405A publication Critical patent/CN101438405A/zh
Application granted granted Critical
Publication of CN101438405B publication Critical patent/CN101438405B/zh
Active legal-status Critical Current
Anticipated expiration legal-status Critical

Links

Images

Classifications

    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L21/00—Processes or apparatus adapted for the manufacture or treatment of semiconductor or solid state devices or of parts thereof
    • H01L21/67—Apparatus specially adapted for handling semiconductor or electric solid state devices during manufacture or treatment thereof; Apparatus specially adapted for handling wafers during manufacture or treatment of semiconductor or electric solid state devices or components ; Apparatus not specifically provided for elsewhere
    • H01L21/67005—Apparatus not specifically provided for elsewhere
    • H01L21/67242—Apparatus for monitoring, sorting or marking
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L21/00—Processes or apparatus adapted for the manufacture or treatment of semiconductor or solid state devices or of parts thereof
    • H01L21/67—Apparatus specially adapted for handling semiconductor or electric solid state devices during manufacture or treatment thereof; Apparatus specially adapted for handling wafers during manufacture or treatment of semiconductor or electric solid state devices or components ; Apparatus not specifically provided for elsewhere
    • H01L21/67005—Apparatus not specifically provided for elsewhere
    • H01L21/67242—Apparatus for monitoring, sorting or marking
    • H01L21/67282—Marking devices
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L22/00—Testing or measuring during manufacture or treatment; Reliability measurements, i.e. testing of parts without further processing to modify the parts as such; Structural arrangements therefor
    • H01L22/30—Structural arrangements specially adapted for testing or measuring during manufacture or treatment, or specially adapted for reliability measurements
    • H01L22/34—Circuits for electrically characterising or monitoring manufacturing processes, e. g. whole test die, wafers filled with test structures, on-board-devices incorporated on each die, process control monitors or pad structures thereof, devices in scribe line
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L23/00—Details of semiconductor or other solid state devices
    • H01L23/544—Marks applied to semiconductor devices or parts, e.g. registration marks, alignment structures, wafer maps
    • H—ELECTRICITY
    • H10—SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
    • H10D—INORGANIC ELECTRIC SEMICONDUCTOR DEVICES
    • H10D84/00—Integrated devices formed in or on semiconductor substrates that comprise only semiconducting layers, e.g. on Si wafers or on GaAs-on-Si wafers
    • H10D84/01—Manufacture or treatment
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L2223/00—Details relating to semiconductor or other solid state devices covered by the group H01L23/00
    • H01L2223/544—Marks applied to semiconductor devices or parts
    • H01L2223/54453—Marks applied to semiconductor devices or parts for use prior to dicing
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L2924/00—Indexing scheme for arrangements or methods for connecting or disconnecting semiconductor or solid-state bodies as covered by H01L24/00
    • H01L2924/0001—Technical content checked by a classifier
    • H01L2924/0002—Not covered by any one of groups H01L24/00, H01L24/00 and H01L2224/00

Landscapes

  • Engineering & Computer Science (AREA)
  • Manufacturing & Machinery (AREA)
  • Power Engineering (AREA)
  • Computer Hardware Design (AREA)
  • Microelectronics & Electronic Packaging (AREA)
  • Physics & Mathematics (AREA)
  • Condensed Matter Physics & Semiconductors (AREA)
  • General Physics & Mathematics (AREA)
  • Automation & Control Theory (AREA)
  • Semiconductor Integrated Circuits (AREA)
  • Design And Manufacture Of Integrated Circuits (AREA)
  • Testing Or Measuring Of Semiconductors Or The Like (AREA)
  • Metal-Oxide And Bipolar Metal-Oxide Semiconductor Integrated Circuits (AREA)
CN2007800066717A 2006-02-23 2007-01-09 用于在集成电路制造中指示方向性的方法和装置 Active CN101438405B (zh)

Applications Claiming Priority (3)

Application Number Priority Date Filing Date Title
US11/360,925 2006-02-23
US11/360,925 US7635920B2 (en) 2006-02-23 2006-02-23 Method and apparatus for indicating directionality in integrated circuit manufacturing
PCT/US2007/060257 WO2007100929A2 (en) 2006-02-23 2007-01-09 Method and apparatus for indicating directionality in integrated circuit manufacturing

Publications (2)

Publication Number Publication Date
CN101438405A CN101438405A (zh) 2009-05-20
CN101438405B true CN101438405B (zh) 2013-10-30

Family

ID=38427329

Family Applications (1)

Application Number Title Priority Date Filing Date
CN2007800066717A Active CN101438405B (zh) 2006-02-23 2007-01-09 用于在集成电路制造中指示方向性的方法和装置

Country Status (6)

Country Link
US (2) US7635920B2 (enExample)
JP (1) JP2009527926A (enExample)
KR (1) KR101357906B1 (enExample)
CN (1) CN101438405B (enExample)
TW (1) TWI433207B (enExample)
WO (1) WO2007100929A2 (enExample)

Families Citing this family (8)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
TWI368963B (en) * 2008-07-18 2012-07-21 Inotera Memories Inc An analysis method of wafer's ion implant
US7829939B1 (en) * 2009-04-20 2010-11-09 International Business Machines Corporation MOSFET including epitaxial halo region
JP5561823B2 (ja) * 2010-02-05 2014-07-30 ルネサスエレクトロニクス株式会社 半導体装置の製造方法および半導体装置
CN102509726A (zh) * 2011-11-14 2012-06-20 上海宏力半导体制造有限公司 具有加密结构的ip模块及其制造方法
TWI466296B (zh) * 2012-07-31 2014-12-21 瑞昱半導體股份有限公司 半導體元件及其形成方法
US20150087131A1 (en) * 2013-09-20 2015-03-26 Infineon Technologies Ag Method for processing a chip
US10002800B2 (en) * 2016-05-13 2018-06-19 International Business Machines Corporation Prevention of charging damage in full-depletion devices
CN109950133B (zh) * 2019-03-14 2021-07-27 北京大学深圳研究生院 一种便于识别的碳化硅外延片圆片制备方法

Citations (4)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
US4973217A (en) * 1987-02-09 1990-11-27 Svg Lithography Systems, Inc. Wafer handling system
US5686345A (en) * 1996-01-30 1997-11-11 International Business Machines Corporation Trench mask for forming deep trenches in a semiconductor substrate, and method of using same
US6190980B1 (en) * 1998-09-10 2001-02-20 Advanced Micro Devices Method of tilted implant for pocket, halo and source/drain extension in ULSI dense structures
US6911660B2 (en) * 2002-10-02 2005-06-28 Varian Semiconductor Equipment Associates, Inc. Method of measuring ion beam angles

Family Cites Families (12)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JPS60195923A (ja) * 1984-03-17 1985-10-04 Sumitomo Electric Ind Ltd メサ方向を表示した半導体ウエハおよびチツプ並びにその製法
JPS62113462A (ja) * 1985-11-12 1987-05-25 Nec Corp 半導体装置
JPH06350042A (ja) * 1993-06-08 1994-12-22 Sony Corp トランジスタの製造方法
US5742041A (en) 1996-05-29 1998-04-21 Intermec Corporation Method and apparatus for locating and decoding machine-readable symbols, including data matrix symbols
KR100289810B1 (ko) * 1999-05-10 2001-05-15 김영환 반도체 소자 제조를 위한 할로 이온 주입 방법
US6194278B1 (en) * 1999-06-21 2001-02-27 Infineon Technologies North America Corp. Device performance by employing an improved method for forming halo implants
US6842538B2 (en) 2001-03-23 2005-01-11 Shih-Jong J. Lee Automatic detection of alignment or registration marks
US6742708B2 (en) 2001-06-07 2004-06-01 Hewlett-Packard Development Company, L.P. Fiducial mark patterns for graphical bar codes
US6745708B2 (en) * 2001-12-19 2004-06-08 Conocophillips Company Method and apparatus for improving the efficiency of a combustion device
JP2004103612A (ja) * 2002-09-04 2004-04-02 Toshiba Corp 半導体装置とその製造方法
US6833307B1 (en) * 2002-10-30 2004-12-21 Advanced Micro Devices, Inc. Method for manufacturing a semiconductor component having an early halo implant
US7138318B2 (en) * 2003-05-28 2006-11-21 Advanced Micro Devices, Inc. Method of fabricating body-tied SOI transistor having halo implant region underlying hammerhead portion of gate

Patent Citations (4)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
US4973217A (en) * 1987-02-09 1990-11-27 Svg Lithography Systems, Inc. Wafer handling system
US5686345A (en) * 1996-01-30 1997-11-11 International Business Machines Corporation Trench mask for forming deep trenches in a semiconductor substrate, and method of using same
US6190980B1 (en) * 1998-09-10 2001-02-20 Advanced Micro Devices Method of tilted implant for pocket, halo and source/drain extension in ULSI dense structures
US6911660B2 (en) * 2002-10-02 2005-06-28 Varian Semiconductor Equipment Associates, Inc. Method of measuring ion beam angles

Also Published As

Publication number Publication date
KR101357906B1 (ko) 2014-02-06
CN101438405A (zh) 2009-05-20
US7635920B2 (en) 2009-12-22
TWI433207B (zh) 2014-04-01
US7858487B2 (en) 2010-12-28
KR20080107379A (ko) 2008-12-10
JP2009527926A (ja) 2009-07-30
US20100112779A1 (en) 2010-05-06
WO2007100929A2 (en) 2007-09-07
US20070194392A1 (en) 2007-08-23
TW200746238A (en) 2007-12-16
WO2007100929A3 (en) 2008-12-04

Similar Documents

Publication Publication Date Title
CN101438405B (zh) 用于在集成电路制造中指示方向性的方法和装置
KR100611169B1 (ko) 반도체장치
JP5697842B2 (ja) 半導体装置の製造方法及びこれに用いるｓｏｑ基板
US8043928B2 (en) Efficient provision of alignment marks on semiconductor wafer
CN101719477B (zh) 对准标记及缺陷检测方法
US20060278956A1 (en) Semiconductor wafer with non-rectangular shaped dice
TWI445135B (zh) 對還原工程有加強阻擋效果之半導體晶片
CN106057774A (zh) 半导体器件以及制造该半导体器件的方法
US10643006B2 (en) Semiconductor chip including integrated security circuit
CN101398630A (zh) 对准及叠对的标记、及其掩模结构与使用方法
US20140197553A1 (en) Method for manufacturing a substrate for a display device
US20120168751A1 (en) Integrated Circuit Test Units with Integrated Physical and Electrical Test Regions
US20100234973A1 (en) Pattern verifying method, method of manufacturing a semiconductor device and pattern verifying program
US7704848B2 (en) Method for designing semiconductor device and semiconductor device
TWI743792B (zh) 半導體製程用游標尺及使用其進行的微影製程檢測方法
JP2009251455A (ja) アライメントマーク及びアライメント方法
US6778876B1 (en) Methods of processing substrates based upon substrate orientation
CN111415881A (zh) 晶片的标记方法、晶圆及晶片
CN106981435A (zh) 一种光刻检查图形结构
TW201137933A (en) Method to compensate optical proximity correction
US11031346B2 (en) Advanced wafer security method including pattern and wafer verifications
JP2011138803A (ja) 半導体装置の製造方法、レチクル及び半導体基板
CN100392801C (zh) 制作用于双栅soi工艺的标记的方法和半导体晶片
JP2010186806A (ja) 半導体装置及びその製造方法
KR20070094234A (ko) 레티클의 설계방법

Legal Events

Date Code Title Description
C06 Publication
PB01 Publication
C10 Entry into substantive examination
SE01 Entry into force of request for substantive examination
C14 Grant of patent or utility model
GR01 Patent grant
CP01 Change in the name or title of a patent holder
CP01 Change in the name or title of a patent holder

Address after: Texas in the United States

Patentee after: NXP America Co Ltd

Address before: Texas in the United States

Patentee before: Fisical Semiconductor Inc.