CN101375282B - 用于对电路进行评估的方法、系统和程序产品 - Google Patents

用于对电路进行评估的方法、系统和程序产品 Download PDF

Info

Publication number
CN101375282B
CN101375282B CN2005800418577A CN200580041857A CN101375282B CN 101375282 B CN101375282 B CN 101375282B CN 2005800418577 A CN2005800418577 A CN 2005800418577A CN 200580041857 A CN200580041857 A CN 200580041857A CN 101375282 B CN101375282 B CN 101375282B
Authority
CN
China
Prior art keywords
design data
rule
adjustment
predictions
window
Prior art date
Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
Expired - Fee Related
Application number
CN2005800418577A
Other languages
English (en)
Chinese (zh)
Other versions
CN101375282A (zh
Inventor
米歇尔·K.·库克
布鲁斯·R.·阿查姆比尤尔特
查尔斯·R.·盖茨
德里克·D.·斯科特
Current Assignee (The listed assignees may be inaccurate. Google has not performed a legal analysis and makes no representation or warranty as to the accuracy of the list.)
Core Usa Second LLC
GlobalFoundries Inc
Original Assignee
International Business Machines Corp
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed by International Business Machines Corp filed Critical International Business Machines Corp
Publication of CN101375282A publication Critical patent/CN101375282A/zh
Application granted granted Critical
Publication of CN101375282B publication Critical patent/CN101375282B/zh
Anticipated expiration legal-status Critical
Expired - Fee Related legal-status Critical Current

Links

Images

Classifications

    • G—PHYSICS
    • G06—COMPUTING OR CALCULATING; COUNTING
    • G06F—ELECTRIC DIGITAL DATA PROCESSING
    • G06F30/00—Computer-aided design [CAD]
    • G06F30/30—Circuit design
    • G06F30/39—Circuit design at the physical level

Landscapes

  • Engineering & Computer Science (AREA)
  • Computer Hardware Design (AREA)
  • Physics & Mathematics (AREA)
  • Theoretical Computer Science (AREA)
  • Evolutionary Computation (AREA)
  • Geometry (AREA)
  • General Engineering & Computer Science (AREA)
  • General Physics & Mathematics (AREA)
  • Design And Manufacture Of Integrated Circuits (AREA)
CN2005800418577A 2004-12-07 2005-12-05 用于对电路进行评估的方法、系统和程序产品 Expired - Fee Related CN101375282B (zh)

Applications Claiming Priority (3)

Application Number Priority Date Filing Date Title
US10/904,950 US7240310B2 (en) 2004-12-07 2004-12-07 Method, system and program product for evaluating a circuit
US10/904,950 2004-12-07
PCT/US2005/043690 WO2006062827A2 (en) 2004-12-07 2005-12-05 Method, system and program product for evaluating a circuit

Publications (2)

Publication Number Publication Date
CN101375282A CN101375282A (zh) 2009-02-25
CN101375282B true CN101375282B (zh) 2010-12-01

Family

ID=36575834

Family Applications (1)

Application Number Title Priority Date Filing Date
CN2005800418577A Expired - Fee Related CN101375282B (zh) 2004-12-07 2005-12-05 用于对电路进行评估的方法、系统和程序产品

Country Status (5)

Country Link
US (1) US7240310B2 (https=)
JP (1) JP4763716B2 (https=)
CN (1) CN101375282B (https=)
TW (1) TW200632701A (https=)
WO (1) WO2006062827A2 (https=)

Families Citing this family (11)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
US8630917B2 (en) * 2005-06-09 2014-01-14 At&T Intellectual Property Ii, L.P. Arrangement for guiding user design of comprehensive product solution using on-the-fly data validation
CN101122622B (zh) * 2006-08-09 2011-05-04 鸿富锦精密工业（深圳）有限公司 信号线分支线段长度检查系统及方法
US8032338B2 (en) 2008-06-13 2011-10-04 Power Integrations, Inc. Method and apparatus for design of a power supply
US8782577B2 (en) * 2010-07-24 2014-07-15 Cadence Design Systems, Inc. Method, apparatus, and article of manufacture for providing in situ, customizable information in designing electronic circuits with electrical awareness
US9330222B2 (en) 2010-07-24 2016-05-03 Cadence Design Systems, Inc. Methods, systems, and articles of manufacture for implementing electronic circuit designs with electro-migration awareness
US8631381B2 (en) 2011-02-24 2014-01-14 Cadence Design Systems, Inc. Method and system for power delivery network analysis
CN102651038B (zh) * 2011-02-24 2015-06-17 益华公司 用于电力输送网络分析的方法和系统
JP5182973B1 (ja) * 2011-10-19 2013-04-17 三菱航空機株式会社 配線の接続確認システム
DE102015108244A1 (de) * 2014-06-06 2015-12-10 Synopsys, Inc. Verfahren und system zum generieren eines schaltungsentwurfs, verfahren zum kalibrieren einer inspektionsvorrichtung, und verfahren zur prozesssteuerung und zum ertragsmanagement
CN112084294B (zh) * 2020-09-14 2022-07-26 重庆长安新能源汽车科技有限公司 一种基于人工智能的整车电磁兼容分级管理方法
WO2022183490A1 (en) * 2021-03-05 2022-09-09 Paypal, Inc. Software process modification platform for compliance

Citations (3)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
US5883808A (en) * 1996-01-30 1999-03-16 Nec Corporation Logic circuit optimization apparatus and its method
US6405349B1 (en) * 1997-07-01 2002-06-11 General Dynamics Decision Systems, In. Electronic device parameter estimator and method therefor
CN1545049A (zh) * 2003-11-14 2004-11-10 清华大学 基于虚拟模块的大规模混合模式布图方法

Family Cites Families (20)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
US4488354A (en) * 1981-11-16 1984-12-18 Ncr Corporation Method for simulating and testing an integrated circuit chip
DE3587846T2 (de) * 1984-12-26 1994-10-06 Hitachi Ltd Verfahren und Gerät zum Prüfen der Geometrie von Mehrschichtmustern für integrierte Schaltungsstrukturen.
US5062054A (en) * 1988-03-10 1991-10-29 Matsushita Electric Industrial Co., Ltd. Layout pattern generation and geometric processing system for LSI circuits
US5051938A (en) * 1989-06-23 1991-09-24 Hyduke Stanley M Simulation of selected logic circuit designs
DE69427417T2 (de) * 1993-03-08 2002-05-29 Koninklijke Philips Electronics N.V., Eindhoven PCB-Simulation auf der Basis von reduzierten Ersatzschaltungen
US5774367A (en) * 1995-07-24 1998-06-30 Motorola, Inc. Method of selecting device threshold voltages for high speed and low power
JPH11120215A (ja) * 1997-10-14 1999-04-30 Mitsubishi Electric Corp 最適解探索支援装置
US6212490B1 (en) * 1998-06-24 2001-04-03 S3 Incorporated Hybrid circuit model simulator for accurate timing and noise analysis
JP2000029920A (ja) * 1998-07-13 2000-01-28 Mitsubishi Electric Corp シミュレーション装置、シミュレーション方法およびシミュレーションプログラムを記録した媒体
US6321186B1 (en) * 1999-05-03 2001-11-20 Motorola, Inc. Method and apparatus for integrated circuit design verification
DE60002897D1 (de) * 1999-08-31 2003-06-26 Sun Microsystems Inc System und verfahren zur analyse von störsignalen bei gleichzeitigem schalten
US6651228B1 (en) * 2000-05-08 2003-11-18 Real Intent, Inc. Intent-driven functional verification of digital designs
JP2002259481A (ja) * 2000-05-11 2002-09-13 Fujitsu Ltd ノイズ対策決定方法及び装置、記憶媒体並びにコンピュータプログラム
US6425113B1 (en) * 2000-06-13 2002-07-23 Leigh C. Anderson Integrated verification and manufacturability tool
US6834380B2 (en) * 2000-08-03 2004-12-21 Qualcomm, Incorporated Automated EMC-driven layout and floor planning of electronic devices and systems
JP2002073719A (ja) * 2000-08-31 2002-03-12 Hitachi Ltd 回路動作モデル記述の生成方法および論理設計検証装置
JP2002108960A (ja) * 2000-10-03 2002-04-12 Fujitsu Ltd 配置・配線処理システム
US6915501B2 (en) * 2001-01-19 2005-07-05 Cadence Design Systems, Inc. LP method and apparatus for identifying routes
JP4499938B2 (ja) * 2001-02-19 2010-07-14 富士通株式会社 素子モデル自動修正プログラム、素子モデル自動修正装置および素子モデル自動修正方法
JP2002259478A (ja) * 2001-02-28 2002-09-13 Nec Corp 統合デジタル回路設計システム及び設計方法

Patent Citations (3)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
US5883808A (en) * 1996-01-30 1999-03-16 Nec Corporation Logic circuit optimization apparatus and its method
US6405349B1 (en) * 1997-07-01 2002-06-11 General Dynamics Decision Systems, In. Electronic device parameter estimator and method therefor
CN1545049A (zh) * 2003-11-14 2004-11-10 清华大学 基于虚拟模块的大规模混合模式布图方法

Also Published As

Publication number Publication date
JP2008523470A (ja) 2008-07-03
WO2006062827A2 (en) 2006-06-15
WO2006062827A3 (en) 2008-10-16
TW200632701A (en) 2006-09-16
US7240310B2 (en) 2007-07-03
US20060123364A1 (en) 2006-06-08
JP4763716B2 (ja) 2011-08-31
CN101375282A (zh) 2009-02-25

Similar Documents

Publication Publication Date Title
US8806628B2 (en) Tuning of data loss prevention signature effectiveness
CN101375282B (zh) 用于对电路进行评估的方法、系统和程序产品
Chaikalis et al. Forecasting java software evolution trends employing network models
EP3570242B1 (en) Method and system for quantifying quality of customer experience (cx) of an application
CN109685089A (zh) 评估模型性能的系统及方法
US20070088598A1 (en) Mechanism for using processlets to model service processes
Saghir et al. Monitoring process variation using modified EWMA
US9372933B2 (en) Personalized quantitative measure of accessibility
CN112362971A (zh) 电源模块等效电阻测试方法、装置、设备及存储介质
CN107392259B (zh) 构建不均衡样本分类模型的方法和装置
CN115085196A (zh) 电力负荷预测值确定方法、装置、设备和计算机可读介质
CN115222149A (zh) 资源转换参数管理方法、装置、设备及存储介质
Unkel et al. A new measure of time-varying association for shared frailty models with bivariate current status data
CN114385499B (zh) 测试用例的生成方法、装置、计算机设备及存储介质
CN111191677A (zh) 用户特征数据生成方法、装置及电子设备
US9977721B2 (en) Evaluating and predicting computer system performance using kneepoint analysis
Kenderes et al. Sensitivity analysis with various parameters in undermoded reverberation chambers
US20120290263A1 (en) Evaluating And Predicting Computer System Performance Using Kneepoint Analysis
CN104252411B (zh) 一种系统压力分析方法及设备
CN116016250B (zh) 一种通信链路评估方法、装置、介质
CN118330038A (zh) 建筑幕墙隔音性能检测系统及方法
CN115169918A (zh) 一种评估银行交易日志趋势的方法、装置及相关设备
CN115062701B (zh) 数据处理方法、装置及电子设备
US7752580B2 (en) Method and system for analyzing an integrated circuit based on sample windows selected using an open deterministic sequencing technique
Harvey et al. Testing for nonlinear deterministic components when the order of integration is unknown

Legal Events

Date Code Title Description
C06 Publication
PB01 Publication
C10 Entry into substantive examination
SE01 Entry into force of request for substantive examination
C14 Grant of patent or utility model
GR01 Patent grant
TR01 Transfer of patent right

Effective date of registration: 20171127

Address after: Grand Cayman, Cayman Islands

Patentee after: GLOBALFOUNDRIES INC.

Address before: American New York

Patentee before: Core USA second LLC

Effective date of registration: 20171127

Address after: American New York

Patentee after: Core USA second LLC

Address before: American New York

Patentee before: International Business Machines Corp.

TR01 Transfer of patent right
CF01 Termination of patent right due to non-payment of annual fee

Granted publication date: 20101201

Termination date: 20191205

CF01 Termination of patent right due to non-payment of annual fee