CN101369560A - Packed electronic element - Google Patents
Packed electronic element Download PDFInfo
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- CN101369560A CN101369560A CNA200810169256XA CN200810169256A CN101369560A CN 101369560 A CN101369560 A CN 101369560A CN A200810169256X A CNA200810169256X A CN A200810169256XA CN 200810169256 A CN200810169256 A CN 200810169256A CN 101369560 A CN101369560 A CN 101369560A
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- substrate
- semiconductor element
- electronic component
- inner space
- metal part
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- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L23/00—Details of semiconductor or other solid state devices
- H01L23/16—Fillings or auxiliary members in containers or encapsulations, e.g. centering rings
- H01L23/18—Fillings characterised by the material, its physical or chemical properties, or its arrangement within the complete device
- H01L23/26—Fillings characterised by the material, its physical or chemical properties, or its arrangement within the complete device including materials for absorbing or reacting with moisture or other undesired substances, e.g. getters
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- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L2224/00—Indexing scheme for arrangements for connecting or disconnecting semiconductor or solid-state bodies and methods related thereto as covered by H01L24/00
- H01L2224/01—Means for bonding being attached to, or being formed on, the surface to be connected, e.g. chip-to-package, die-attach, "first-level" interconnects; Manufacturing methods related thereto
- H01L2224/10—Bump connectors; Manufacturing methods related thereto
- H01L2224/15—Structure, shape, material or disposition of the bump connectors after the connecting process
- H01L2224/16—Structure, shape, material or disposition of the bump connectors after the connecting process of an individual bump connector
- H01L2224/161—Disposition
- H01L2224/16151—Disposition the bump connector connecting between a semiconductor or solid-state body and an item not being a semiconductor or solid-state body, e.g. chip-to-substrate, chip-to-passive
- H01L2224/16221—Disposition the bump connector connecting between a semiconductor or solid-state body and an item not being a semiconductor or solid-state body, e.g. chip-to-substrate, chip-to-passive the body and the item being stacked
- H01L2224/16225—Disposition the bump connector connecting between a semiconductor or solid-state body and an item not being a semiconductor or solid-state body, e.g. chip-to-substrate, chip-to-passive the body and the item being stacked the item being non-metallic, e.g. insulating substrate with or without metallisation
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- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L2924/00—Indexing scheme for arrangements or methods for connecting or disconnecting semiconductor or solid-state bodies as covered by H01L24/00
- H01L2924/15—Details of package parts other than the semiconductor or other solid state devices to be connected
- H01L2924/161—Cap
- H01L2924/1615—Shape
- H01L2924/16195—Flat cap [not enclosing an internal cavity]
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- Physics & Mathematics (AREA)
- Condensed Matter Physics & Semiconductors (AREA)
- General Physics & Mathematics (AREA)
- Engineering & Computer Science (AREA)
- Computer Hardware Design (AREA)
- Microelectronics & Electronic Packaging (AREA)
- Power Engineering (AREA)
- Micromachines (AREA)
- Structures Or Materials For Encapsulating Or Coating Semiconductor Devices Or Solid State Devices (AREA)
- Piezo-Electric Or Mechanical Vibrators, Or Delay Or Filter Circuits (AREA)
Abstract
A first container member (9, 109, 212) mounting an electronic device (71, 171, 261) thereon and a second container member (2, 102, 202) are bonded with an adhesive (3, 103) or a metal layer (103, 251). Thus an inner space (90, 190, 211) is formed and the electronic device can be closed in the inner space at a low temperature. In the case the adhesive is used, an exposed surface of the adhesive is coated with a metal film (4) to improve the closeness of the inner space. Further, an electronic device (261, 272) may be mounted on the second container member so as to increase the electronic device arrangement density in a packaged electronic device.
Description
The application divides an application, its female case application number: 2004800360904; The applying date: on December 2nd, 2004; Denomination of invention: the electronic component of encapsulation, and the manufacture method of electronic package.
Technical field
The present invention relates to a kind of electronic package and manufacture method thereof that possesses electronic component in airtight inner space.
Background technology
At present; as a kind of method of protecting semiconductor element, surface acoustic wave device, other various electronic components because of the influence of the moisture that in atmosphere, exists or oxygen etc.; known have: electronic component is taken in the inside at container, the inner also technology of seal electronic element of closed container.In inner space configuration and be sealed with in the electronic component device of such electronic component, the air-tightness (seal) that has proposed to be used to make internal tank improves and further prevents the various technology of the intrusion of moisture etc. reliably.
In patent documentation 1, proposed: in semiconductor acceleration sensor, be used for terminal board is exported to the gas inside (degassing) of discharging housing after the groove of the notch of outside of housing thermo-compressed the outgas closed hole of usefulness and the technology of seal sensor chip with bonding agent sealing.In addition, container is under the metal situation, and joint and sealing each other also can be used soft solder for the parts that constitute container sometimes.
In addition, for example, cover the peristome of ceramic substrate, and utilize soft solder or glass dust to engage and sealed ceramic substrate and crown cap with the cavity (recess) that is equipped with electronic component in the bottom surface by metal lid.
On the other hand, also can to engage by flip-over type electronic component that (flip chip bonding) carry and the space between the substrate carry out airtight, and the technology of seal electronic element.For example, in patent documentation 2, disclose: in the manufacturing of surface acoustic wave apparatus, for a plurality of acoustic surface wave elements on the substrate resin was divided into for 2 steps and applies, and suppress bubble mix into and seal the technology of acoustic surface wave element by the high resin of viscosity.In patent documentation 3, disclose: in the manufacturing of surface elasticity wave apparatus, be sealed in the surface acoustic wave chip that flip-over type connects on the base plate for packaging, compare the high bubble-tight technology that obtains with the situation of using resin to seal by using low-melting glass.Further, in patent documentation 4, disclose: circuit block is being accommodated in the manufacturing of the electronic circuit module in the confined space, by being pasted in the casing (box-shaped) of inner surface at circuit blocks such as will being equipped with resistance or capacitor, embedding hard circuit substrate makes and is equipped with facing to the inside of circuit block, and effectively utilizes the technology of the space part of box house.
Patent documentation 1: the spy opens flat 11-No. 237401 communiques
Patent documentation 2: the spy opens communique 2003-No. 142972
Patent documentation 3: the spy opens communique 2003-No. 110402
Patent documentation 4: the spy opens clear 61-No. 278198 communiques
But,, therefore, then can not realize suitable seal or encapsulation according to the kind of electronic component sometimes if use resin as the sealing material because resin is not too high to the bubble-tight degree of moisture or oxygen.As above-mentioned patent documentation 3 is disclosed, engage under the situation of the parts that constitute container by the low-melting glass sealing or by soft solder or glass dust, can obtain high air-tightness, otherwise, need be used under for example about 260 ℃ high temperature, dissolving the heat treated of low-melting glass or soft solder, be unsuitable for the encapsulation of the low electronic component of thermal endurance.Particularly, because the thermal endurance of the electronic component of compound semiconductor etc. is low, therefore the possibility of damaging by heat is higher.
In addition, under and situation that packaging container inner airtight, owing to also require thermal endurance, therefore be difficult to resin etc. is used as material for the parts of the lid that forms container etc. by such heat treated, also limited to the reduction of container cost.
In addition,, develop the microminiaturization of electronic component gradually, also need to dispose more to high-density small electronic component along with the miniaturization of in recent years electronic equipment.In above-mentioned patent documentation 4 disclosed electronic circuit modules, because to take in flexible circuit board as prerequisite at internal tank, therefore the electronic unit that the relative IC bare chip of flexible circuit board etc. is small is thicker, is difficult to realize the densification consistent with the microminiaturization of electronic component and the miniaturization of encapsulation.
Summary of the invention
The present invention puts in view of the above problems and makes, it is a kind of that its purpose is to provide, in the electronic component of encapsulation can with electronic component low temperature, preferably more than room temperature～be accommodated in the electronic component of the encapsulation in the confined space below 150 ℃, further, a kind of electronic component highdensity configuration, encapsulation that is applicable to small electronic component is provided, a kind of manufacture method of above-mentioned encapsulation electronic component further, is provided.
Electronic component according to the encapsulation of the 1st mode of the present invention possesses:
Electronic component;
Be equipped with the 1st container parts of described electronic component;
Form the 2nd container parts in the space of taking in described electronic component with described the 1st container parts;
Engage described the 1st container parts and described the 2nd container parts and the bonding agent in airtight described space; With
Cover the metal film that exposes face of described bonding agent.
In addition, according to the manufacture method of the encapsulation electronic component of the 2nd mode of the present invention,
To be equipped with the 1st container parts of electronic component and engage and airtight described space with bonding agent, and cover the face that exposes of described bonding agent with metal film with the 2nd container parts that the 1st container parts forms the space of taking in described electronic component.
Electronic component according to the encapsulation of the 3rd mode possesses:
Electronic component;
Be equipped with the 1st container parts of described electronic component;
Form the 2nd container parts in the space of taking in described electronic component with described the 1st container parts; With
Metal level, it engages described the 1st container parts and described the 2nd container parts and airtight described space, by the 2nd metal part irradiation energy ripple to the 1st metal part of described the 1st container parts and described the 2nd container parts described the 1st metal part and described the 2nd metal part is in contact with one another and forms.
In addition, according to the manufacture method of the encapsulation electronic component of the 4th mode of the present invention,
Engage when being equipped with the 1st container parts of electronic component and forming the 2nd container parts in described space at metal level with described the 1st container parts by airtight space of taking in described electronic component,
Surface irradiation energy waves to the 2nd metal part of the 1st metal part of described the 1st container parts and described the 2nd container parts;
By being in contact with one another, irradiation described the 1st metal part of described energy waves and described the 2nd metal part form described metal level.
Electronic component according to the encapsulation of the 5th mode of the present invention possesses:
Container, it forms with the 1st inner face, 2nd inner face relative with the 1st inner face, reaches and described the 1st inner face side airtight inner space vertical with described the 2nd inner face;
The 1st electronic component, it is assemblied in the 1st fitting surface, and the 1st fitting surface is certain face in described the 1st inner face, described the 2nd inner face and the described side;
The 2nd electronic component, it is assemblied in the 2nd fitting surface, the 2nd fitting surface be described the 1st inner face, described the 2nd inner face and described side interior, with the different face of described the 1st fitting surface;
The 1st outer electrode, it is formed at the outside of the described container relative with described the 1st fitting surface, and is electrically connected with described the 1st electronic component; With
The 2nd outer electrode, it is formed at the outside of the described container relative with described the 2nd fitting surface, and is electrically connected with described the 2nd electronic component.
In addition, according to the manufacture method of the encapsulation electronic component of the 6th mode of the present invention,
On the 1st fitting surface of the cover that is formed with guiding path, be equipped with the 1st electronic component that is electrically connected with described guiding path;
On the 2nd fitting surface of the main element that forms guiding path, assemble the 2nd electronic component that is electrically connected with described guiding path, and form airtight inner space by main element and described cover;
, described the 1st electronic component and the mode of described the 2nd electronic component arrangements in described inner space form the electronic package of airtight described inner space so that engaging described cover and described main element;
According to the formation of described the 1st mode and the 2nd mode because with bonding the 1st container parts of bonding agent and the 2nd container parts, therefore can be at low temperatures with taking in electronic element at confined space.In addition, owing to cover the face that exposes of bonding agent, therefore can prevent to stop up pin hole and prevent gas or moisture etc. passes through bonding agent with metal film.Thereby, can be with high reliability airtight inner space.
Formation according to described the 3rd mode and the 4th mode, because surface irradiation energy waves to the 1st metal part and the 2nd metal part, the metal level that forms by described the 1st metal part and described the 2nd metal part are in contact with one another engages the 1st container parts and the 2nd container parts, and form airtight inner space, therefore can be at low temperatures with taking in electronic element at confined space, in addition, in metal level part, do not have passing through of gas or moisture etc., therefore can be with high reliability airtight inner space.
Formation according to described the 5th mode and the 6th mode, assembling electronic element on the inner face of the container that forms the inner space or side, further will be arranged on the container outside with the outer electrode that described electronic component is electrically connected, thereby can dispose small electronic component to high-density.
Description of drawings
Fig. 1 is the profile of formation of electronic component of the encapsulation of expression the 1st execution mode of the present invention;
Fig. 2 is the figure of manufacturing process of the electronic component of expression encapsulation;
Fig. 3 is the profile of formation of electronic component of the encapsulation of expression the 2nd execution mode;
Fig. 4 is the figure of manufacturing process of the electronic component of expression encapsulation;
Fig. 5 is illustrated in that loam cake is the figure of the situation of semiconductor element in the electronic component of encapsulation of the 2nd execution mode;
Fig. 6 is the figure of another manufacture method of electronic component that is used to illustrate the encapsulation of the 2nd execution mode;
Fig. 7 is the profile of formation of electronic component of the encapsulation of expression the 3rd execution mode;
Fig. 8 is the exploded perspective view of the electronic component of expression encapsulation;
Fig. 9 is the figure of manufacturing process of the electronic component of expression encapsulation;
Figure 10 is the profile of formation of electronic component of the encapsulation of expression the 4th execution mode;
Figure 11 is the expression cartridge reaches the semiconductor element that assembles on cartridge a exploded perspective view;
Figure 12 is the figure of manufacturing process of the electronic component of expression encapsulation;
Figure 13 is the profile of formation of electronic component of the encapsulation of expression the 5th execution mode;
Figure 14 is the figure of the assembly process of expression semiconductor element;
Figure 15 is the profile of formation of electronic component of the encapsulation of expression the 6th execution mode;
Figure 16 is the figure of the form when being illustrated on the substrate electronic component of encapsulation of assembling the 3rd～the 6th execution mode;
Figure 17 is the figure of the form when being illustrated on the substrate electronic component of encapsulation of assembling the 3rd～the 6th execution mode;
Figure 18 is the figure of the form when being illustrated on the substrate electronic component of encapsulation of assembling the 3rd～the 6th execution mode;
Figure 19 is the figure of the form when being illustrated on the substrate electronic component of encapsulation of assembling the 3rd～the 6th execution mode;
Figure 20 is the figure of the form when being illustrated on the substrate electronic component of encapsulation of assembling the 3rd～the 6th execution mode;
Figure 21 is the figure of the form when being illustrated on the substrate electronic component of encapsulation of assembling the 3rd～the 6th execution mode.
Among the figure: 1-encapsulationization electronic component, 2-cap assembly, 3-bonding agent, 3b-metallic, 4-overlay film, 9-substrate, 21-flange part, 22-hygroscopic agent, 23-recess, 71-semiconductor element, 90-inner space, 101-encapsulationization electronic component, 102-cover, 103-metal level, 109-substrate, 131-substrate metal portion, 132-lid metal part, 171-semiconductor element, 190-inner space, 201,201a, 201b, 201c-encapsulationization electronic component, 202-cover unit, 203-lower cover member, 204,204a-cartridge, 210-container, 211-inner space, 212-cavity substrate, 213-cavity, 221-above, 223-outer electrode, 224-guiding path, 231-below, 322-outer electrode, 234-guiding path, 241-side, 251-metal level, 261-semiconductor element, 271-semiconductor element, 272-chip part, 2511,2512-metal part.
Embodiment
Below, embodiments of the present invention are described, but in the accompanying drawings for the additional identical reference marks of identical parts.
The 1st execution mode
Fig. 1 is the profile of formation of the electronic package 1 of expression one embodiment of the present invention.In addition, in this manual, so-called electronic package is not to refer to encapsulation and element, is meant the encapsulation behind the electronic component of having taken in taking in of electronic component in encapsulation, is designated as the electronic component or the encapsulationization electronic component of encapsulation yet.
Substrate 9, be in the side that is equipped with semiconductor element 71 interarea 9a, and and the inside 9b of the substrate 9 of the face of inner space 90 opposition sides on be formed with the multilager base plate of electrode 9c, by low-temperature sintering ceramic (below, be called " LTCC (Low Temperature Cofired Ceramics) ".) form, it to form operation and (in order distinguishing with LTCC, below to be called " HTCC (HighTemperature Cofired Ceramics) with common pottery.) system the substrate difference.
In electronic package 1, the flange part 21 of substrate 9 and cap assembly 2, when for example being principal component, via the bonding agent 3 of the particle 3b that contains silver (Ag), the bonding and airtight inner space 90 of so-called silver-colored conductive paste with the thermosetting resin that under the temperature below 150 ℃, makes resin material sclerosis such as epoxy resin, acrylic resin, phenolic resin.Also can use copper (Cu) to wait other metallics 3b to replace above-mentioned silver particles.In addition, the surface in the outside of exposing face 3a and cap assembly 2 of bonding agent 3 is covered by the overlay film 4 of nickel (Ni) and gold (Au).In addition, overlay film 4 is not limited to nickel, gold, also can be other metals.Thereby, the gas of the pin hole in the bonding agent 3 etc. and moisture to pass through path blocked, can keep the air-tightness of inner space 90.Further, be provided with on cap assembly 2 hygroscopic agent of installing 22 that for example forms in inner space 90 by magnesium oxide etc.And, the inner space 90 of can dehumidifying reliably.
Fig. 2 is the figure of the manufacturing process of expression electronic package 1.In manufacturing electronic package 1, at first, semiconductor element 71 is positioned on the rigging position of the regulation on the substrate 9, under the state of the electrode butt of projection 72 and substrate 9, semiconductor element 71 is pushed to substrate 9, and give the ultrasonic waves vibration, and then projection 72 is assemblied in (step S11) on the substrate 9 with electrode engagement.The assembling of semiconductor element 71 also can be undertaken by additive method, for example, also can carry out via anisotropic conductive resin film or conductive paste, non-conductive resin film or conductive paste.Further, irradiation energy also engages in a vacuum on the electrode of projection 72 and substrate 9, promptly also can adopt so-called normal temperature to engage.In addition, projection 72 also can be formed on the electrode of substrate 9.The number of the semiconductor element 71 of assembling also can be a plurality of.Or be not limited to semiconductor element 71, also can be other electronic components as described later.
Then, the inboard of cap assembly 2, on the bottom surface 23a of the face relative, recess 23 hygroscopic agent 22 (step S12) is installed when being installed on the substrate 9 with substrate 9.Thereafter, be coated with bonding agent 3 on flange part 21 relative with interarea 9a substrate 9 the face 21a of bonding location that is bonded with cap assembly 2 on the interarea 9a of substrate 9 and/or cap assembly 2, cap assembly 2 is installed on the substrate 9 via bonding agent 3.The substrate 9 that cap assembly 2 is installed makes bonding agent 3 sclerosis, adhesive base plate 9 and cap assembly 2 and airtight inner space 90 (step S13) in lower temperature below 150 ℃, preferably carry out heat treated under about 120 ℃～130 ℃.Thus, by dehumidify reliably inner space 90 and improve the moisture-proof reliability of hygroscopic agent 22.
In addition, because therefore the flange part 21 and the substrate 9 of bonding cap assembly 2 are compared bonding area and increased with the situation that does not have flange part 21, the joint between substrate 9 and the cap assembly 2 is further stable.Its result improves the airtight reliability of inner space 90.In addition, also can form flange part 21 with lateral approach towards recess 23.
Then, after the masked material of the part of electrode at least of the inside 9b of substrate 9 covers, apply electroless plating to electronic package 1, form successively nickel coating and gold plate (below, be generically and collectively referred to as " coating ".) and the surface of overlay electronic component package 1 and mask material.In electronic package 1, can easily form metal film by utilizing electroless plating as coating.Further, owing to contain silver particles in bonding agent 3, therefore stable the and growth easily of nickel coating in the surface in the outside of bonding agent 3 is promptly electroplated and is adhered to easily, can further easily form metal film.
If the coating of electronic package 1 finishes, then by removing mask material from electronic package 1, only the surface beyond the position that masked material covered stays coating, thereby finishes the manufacturing (step S14) of the electronic package 1 with the overlay film 4 that is formed by nickel and gold.
As mentioned above, in electronic package 1, at low temperatures, promptly compare under the low temperature, preferred with the common soft solder or the joint of glass dust, by more than the room temperature～below 150 ℃ the sclerosis bonding agent 3 come adhesive base plate 9 and cap assembly 2, airtight inner space 90 of taking in semiconductor element 71.Its result even the low semiconductor element 71 of thermal endurance can not bring by thermogenetic damage yet, can be accommodated in the confined space by enough low temperature.In addition, compare the resinous cap assembly 2 that can use the low cheapness of thermal endurance, can reduce the manufacturing cost of electronic package 1 with pottery or metal etc.
In electronic package 1, owing to the surface in the outside of bonding agent 3, promptly expose face 3a and covered by the overlay film 4 of metal, therefore prevent that moisture etc. from immersing inner spaces 90 by bonding agent 3, compare the air-tightness that can improve inner space 90 with the situation that expose in the gas externally on the surface that with the resin is the bonding agent 3 of principal component.In addition, because the surface in the outside of resinous cap assembly 2 is also covered by the overlay film 4 of metal, therefore realize coming airtight inner space 90 with the high reliability of free of pinholes.
In addition, in electronic package 1, because the semiconductor element 71 that assembles on smooth substrate 9 is by possessing the recess 23 (parts that contain concavity.) cap assembly 2 seal, therefore on substrate 9, can omit the operation that forms the cavity that is equivalent to recess 23, can reduce the manufacturing cost of electronic package 1.Particularly, need in order to form cavity can reduce the manufacturing cost of electronic package 1 greatly under the situation of substrate 9 of LTCC system of cost comparing use with HTCC.
More than, embodiments of the present invention are illustrated, but the present invention is not limited to above-mentioned execution mode, can carry out various changes.For example, when the manufacturing of electronic package 1 finishes, be engraved under the fully few situation of the moisture amount of the gas of existence inner space 90 in, also can omit hygroscopic agent 22.
From the viewpoint that manufacturing cost reduces, cap assembly 2 is preferably formed by resin, but also can be formed by the other materials of metal or pottery etc.Substrate 9 and cap assembly 2 also can be respectively the substrate with cavity, so-called " cavity substrate ", and cover the smooth lid of the peristome of cavity.Even in this case,, cover the surface in the outside of bonding agents 3 by the overlay film 4 of metal, and then can make the high electronic package of air-tightness 1 at low temperatures by bonding agent 3 adhesive base plate 9 and cap assembly 2.
In the manufacturing process of electronic package 1, want to do one's utmost to avoid under the situation of heat treated, without the heat treated of ray hardening resin etc. and make the bonding agent 3 of its sclerosis, be used in bonding between substrate 9 and the cap assembly 2.Even in this case, overlay film 4 is formed on by electroless plating on the surface in the outside of bonding agent 3, and improves the air-tightness of inner space 90.
From the easiness of operation and the viewpoint of reduction manufacturing cost, the formation of overlay film 4 is preferably undertaken by electroless plating, carries out but also can plate by electrolysis under the situation as bonding agent 3 use conductive adhesives.In addition, also can form the overlay film 4 of metal by sputter.
The 2nd execution mode
Fig. 3 is the profile of formation of the electronic package 101 of expression the 2nd execution mode of the present invention.Electronic package 101, be after having as the encapsulation of the semiconductor element 171 of electronic component at inner sealing, electronic component promptly is set in confined space and encapsulates, to possess: have the substrate 109 of the cavity 199 that is equivalent to recess, so-called " cavity substrate "; Be assemblied in the semiconductor element 171 of the bottom surface of cavity 199; With peristome by stopping up cavity 199 and be assemblied on the substrate 109, with substrate 109 form the space of taking in semiconductor element 171 (below, be called " inner space ".) 190 smooth tabular cover 102.
In electronic package 101, come adhesive base plate 109 and cover 102 by the metal level 103 that forms by gold (Au), thus airtight inner space 190.Metal level 103 is bonded on the substrate metal portion 131 that is equivalent to the 1st metal part of substrate 109 side settings and in the lid metal part 132 that is equivalent to the 2nd metal part of cover 102 side settings and form.
Fig. 4 is the figure of the manufacturing process of expression electronic package 101.In manufacturing electronic package 101, at first at each bonding position of substrate 109 and cover 102, promptly as the end face 109c of peristomes face, substrate 109 cavitys 199 relative with cover 102 and as the face of inner space 190 sides, apply gold plate on the zone of adhesive base plate 109 among the 102a below the cover 102, form substrate metal portion 131 and lid metal part 132 (step S111).
Or in step S111,, be more than the 5 μ m, highly be to form substrate metal portion 131 more than the 5 μ m and cover metal part 132 with width preferably in the mode of the joint of the substrate metal portion 131 that uses following step S114 explanation reliably and lid metal part 132.
Then, substrate 109, cover 102 and semiconductor element 171 are configured in the chamber of coupling device, reduce pressure in the chamber by the vacuum pump that is connected with chamber.If be in decompression state in the chamber, be preferably under the vacuum state, then projection 172, and the bottom surface of cavity 199 on electrode on as the high speed atomic beam of one of energy waves irradiation argon (Ar) (Fast Atom Beam: below be called " FAB ".), the surface of cleaning projection 172 and electrode.That is, carry out the useless material on surface, adhere to from the teeth outwards and the removal of the airborne for example carbon contamination material of sorption and the activate on surface in a word.In addition, remove the above-mentioned surface of the thickness of about 10nm by the irradiation of above-mentioned FAB., by on the electrode of substrate 109 contact protrusion 172, with interatomic force make projection 172 and electrode engagement, and on substrate 109, assemble semiconductor element 171 (step S112) thereafter.In addition, above-mentioned FAB irradiation, the part of metal thereafter joint each other are to be called the method that so-called surface activation engages.
Also can carry out the assembling of semiconductor element 171 by additive method, for example, also can be under the state of the electrode butt of projection 172 and substrate 109, make semiconductor element 171 push and give the ultrasonic waves vibration, and then projection 72 is assembled with electrode engagement to the bottom surface of cavity 199.In addition, also can carry out via anisotropic conductive resin film or conductive paste, non-conductive resin film or conductive paste.In addition, projection 72 also can be formed on the electrode of substrate 9.The number of the semiconductor element 71 of assembling also can be a plurality of.Or, also can adopt other electronic components as described later to replace semiconductor element 171.
Then, to the substrate metal portion 131 of substrate 109 and the lid metal part 132 irradiation FAB of cover 102, approximately with the surface of the bonding part of the thickness cleaning base plate metal part 131 of 10nm and lid metal part 132, remove above-mentioned polluter (step S113) as described above.This moment the substrate metal portion 131 of substrate 109 and cover 102 the temperature of lid metal part 132 be room temperature above～below 150 ℃, the irradiation by laser when needing heating etc. is heated.
Thereafter, by making substrate metal portion 131 and contact relative mutually under decompression in chamber or the vacuum environment with lid metal part 132, thus by metal level 103 adhesive base plate 109 and cover 102, airtightly under decompression or vacuum state take in the inner space 190 of semiconductor element 171 and make electronic package 101 (step S114).In addition, also can carry out bonding between substrate 109 and the cover 102 under inert gas environment, at this moment, enclosing with semiconductor element 171 in inner space 190 has inert gas.In addition, also can reduce pressure in the chamber during sealing under inert gas environment.In addition, above-mentioned decompression preferably is pressed onto decompression about 1Pa (Pascal)～10Pa from atmosphere.
As mentioned above, in electronic package 101, compare at low temperatures with the joint of common soft solder or glass dust and to carry out, preferred, by more than room temperature～150 ℃ of following adhesive base plate 109 and cap assembly 102, airtight inner space 90 of taking in semiconductor element 171.Its result even the low semiconductor element 171 of thermal endurance can not bring by thermogenetic damage yet, can be accommodated in the confined space by enough low temperature.In addition, compare the resinous substrate 109 and the cap assembly 102 that can use the low cheapness of thermal endurance, can reduce the manufacturing cost of electronic package 101 with pottery or metal etc.Further; because inner space 190 is in decompression or vacuum state or the inert gas environment; therefore owing to semiconductor element 171 is protected in the influence of moisture that exists or oxygen etc., can suppress performance degradation in atmosphere because of the semiconductor element 171 of these influence generations.
In electronic package 101, because substrate metal portion 131 and lid metal part 132 engage by interatomic strong adhesion, therefore come adhesive base plate 109 and cover 102 with high reliability, formation simultaneously has high bubble-tight inner space 190.In addition,, therefore can access the metal level 103 that chemically stable promptly is difficult to chemical change, improve the airtight reliability of inner space 190 owing to form substrate metal portion 131 and lid metal part 132 by gold.
More than, the 2nd execution mode of the present invention is illustrated, but the present invention is not limited to above-mentioned execution mode, also can carry out various changes.For example, from reducing the viewpoint of manufacturing cost, preferably form cover 102, but also can form by other materials such as metal or potteries by resin.Or as shown in Figure 5, cover 102 also can be for example to form the substrate of SAW filter 105 grades or quartz wafer etc.Or as shown in Figure 5, via guiding path 106 that forms on substrate 109 and the outer electrode 107 that is electrically connected with guiding path 106, electronic package 101 is electrically connected with the electrode 108a of other substrates 108.In addition, the airtight reliability in space 190 improves and the viewpoint of oxidative resistance etc. internally, and metal level 103 is preferably formed by gold, but also can be formed by other various metals.
The temperature of substrate metal portion 131 when adhesive base plate 109 and cover 102 and lid metal part 132, from reducing viewpoint to the influence of the heat that is assemblied in the semiconductor element 171 on the substrate 109, preferably in the scope shown in above-mentioned the 2nd execution mode, but be not limited to above-mentioned scope, for example under the situation that is equipped with the higher semiconductor element of thermal endurance 171 on the substrate 109, also can make the temperature higher than above-mentioned scope.
In each execution mode below above-mentioned the 2nd execution mode and the 3rd execution mode that the following describes, used argon gas as FAB, but also can utilize other atoms such as nitrogen or hydrogen to be used as FAB.In addition, also can replace FAB, and carry out the cleaning of substrate metal portion 131 and lid metal part 132 by other energy waves such as ion beams.For example also can utilize:, for example have the excimer ultraviolet ray of the wavelength of 172nm than the energy waves of short wavelength; With above-mentioned cleaning performance wavelength 250nm that descend some, that Cooper-Hewitt lamp sends or the light of 365nm.Or state in the use under the ultraviolet situation of excimer, not in decompression or vacuum, in atmosphere, can carry out clean.Under the situation about in atmosphere, handling, further by more than the room temperature～temperature below 150 ℃ under heating become the metal part of clean object at least, can promote decomposition attached to the impurity in the lid metal parts, further, can reduce the hardness of above-mentioned metal part, engage easily.In addition, when in decompression or vacuum, carrying out above-mentioned clean, also can not carry out above-mentioned heating.
Or, as shown in Figure 6, make electronic package 101 shown in Figure 3 by form with a plurality of connections, after the making, cut off with cut-out portion 104, thereby can make each electronic package 101.
As mentioned above, the manufacture method of electronic package 101 is applicable in the sealing of the various electronic components beyond the semiconductor element, is specially adapted in the sealing of the low and electronic component that moisture-proof is low of thermal endurance.
The 3rd execution mode
Fig. 7 is the profile of formation of the electronic package 201 of expression the 3rd execution mode of the present invention.Electronic package 201 is at inner sealing encapsulation as the semiconductor element 261 of electronic component to be arranged, and promptly is the encapsulation that electronic component is set in confined space and its encapsulation has been changed, and possesses: 2 semiconductor elements 261; Container 210 with the formation inner space 211 of taking in 2 semiconductor elements 261.
Fig. 8 is the exploded perspective view of expression electronic package 201.Container 210 possesses: the cartridge 204 that has opening at the two ends of Z direction; Stop up the axial one distolateral (cover unit 202 of the opening of+Z) side of cartridge 204; With stop up the distolateral (lower cover member 203 of the opening of-Z) side of another of cartridge 204.In addition, cover unit 202 is equivalent to the 1st cover, and lower cover member 203 is equivalent to the 2nd cover, and lower cover member 203 and cartridge 204 are equivalent to main element.Cover unit 202, lower cover member 203 and cartridge 204 form by resin.Cartridge 204 (+Z) side and (-Z) end face of side is provided with respectively by the metal part 2511 and 2521 that forms of gold (Au).In addition, metal part 2511,2521 is equivalent to the 2nd metal part.In addition, be equivalent to the 1st inner face and the 1st fitting surface cover unit 202 (-Z) face of side (is the face of face that forms the upside of inner space 211, below is called " top ".) 221 and be equivalent to the 2nd inner face and the 2nd fitting surface lower cover member 203 (+Z) face of side (is the face of face that forms the downside of inner space 211, below is called " following ".) be bonded with on the zone of cartridge 204 in 231, be respectively arranged with the metal part 2512 and 2522 that forms by gold.In addition, metal part 2512,2522 is equivalent to the 1st metal part.On inner space 211 221 and below 231 be respectively fitted with 1 semiconductor element 261.In addition, the semiconductor element 261 of 221 assemblings is equivalent to the 1st electronic component in the above, and the semiconductor element 261 of 231 assemblings is equivalent to the 2nd electronic component below.
As shown in Figure 7, in electronic package 201, form metal level 252 by jointing metal portion 2521 and 2522, and bonding cartridge 204 and lower cover member 203.In addition, form metal level 251 by jointing metal portion 2511 and 2512, and bonding cartridge 204 and cover unit 202.Thus, install by the openings at two ends that cover unit 202 and lower cover member 203 are stopped up cartridge 204, thereby form inner space 211 by the face towards the inboard of cover unit 202, lower cover member 203 and cartridge 204, the face 241 of the inboard of cartridge 204 forms the side of inner spaces 211.In the following description, face 241 is called " side ".
Fig. 9 is the figure of the manufacturing process of expression electronic package 201.When making electronic package 201, at first, apply gold plate at each bonding position of cover unit 202, lower cover member 203 and cartridge 204, form metal part 2512,2522,2511 and 2521 (step S211).
In addition, in step S11, be more than the 5 μ m preferably with width, highly be 55 μ m with on form metal part 2522,2521,2512,2511 so that use reliably joint between metal part 2522 described in following step S217 and the step S219 and the metal part 2521, and metal part 2512 and metal part 2511 between joint.
Then, cover unit 202, lower cover member 203, cartridge 204 and 2 semiconductor elements 261, be sent in the loadlock of coupling device, reduce after the pressure in the loadlock by the vacuum pump that is connected with loadlock, be sent to decompression state in advance, be preferably in the chamber of vacuum state and be configured on the position of regulation.Then, under the decompression or vacuum environment in chamber, the projection 262 of 1 semiconductor element 261, and the internal electrode 222 of cover unit 202 on shine argon gas (Ar) the high speed atomic beam (FastAtom Beam: below, be called " FAB ".), the surface of cleaning projection 262 and internal electrode 222.That is, remove the useless material on surface, adhere to from the teeth outwards and the airborne for example carbon contamination material of sorption in a word, and make surface activation (step S212).In addition, remove the above-mentioned surface of the thickness of about 10nm by the irradiation of above-mentioned FAB.At this moment, from the viewpoint of the damage of the semiconductor element 261 that promotes surface activation and prevent to cause because of heat, that the temperature of projection 262 and internal electrode 222 is preferably room temperature is above～below 150 ℃, and the irradiation by laser waits and heats as required.Thereafter, by making the metal bond that projection 26 and internal electrode 222 be in contact with one another and semiconductor element 261 is assemblied in (step S213) on the cover unit 202.
To 1 semiconductor element 261 similarly, under decompression or vacuum environment, shine FAB (step S214), be assemblied in (step S215) on the lower cover member 203 by the metal bond that projection 262 and internal electrode 232 are in contact with one another to the projection 262 of semiconductor element 261 and the internal electrode 232 of lower cover member 203.In addition, also can will replace the projection of projection 262 to be respectively formed in advance on internal electrode 222 and the internal electrode 232.At this moment, the pad of semiconductor element 261 and projection are engaged after cleaning by FAB.In addition, also can carry out carrying out again after the assembling of downward cover 203 assembling earlier to the semiconductor element 261 of cover unit 202.
If on cover unit 202 and lower cover member 203, assemble semiconductor element 261 respectively, then under decompression in chamber or the vacuum environment to the metal part 2522 of lower cover member 203, and cartridge 204 (-Z) the metal part 2512 irradiation FAB of side clean the surface (step S216) that thickness is approximately two metal part of 10nm as mentioned above.This moment two metal part, the irradiation by laser etc. is heated to more than the room temperature～temperature below 150 ℃ as required.Then, be in contact with one another by making metal part 2522 and metal part 2521, and metal bond two metal part and form metal level 252, bonding lower cover member 203 and cartridge 204.
Then, under decompression or vacuum environment to the metal part 2512 of cover unit 202 and cartridge 204 (+Z) the metal part 2511 irradiation FAB of side clean the surface (step S218) of two metal part as described above.This moment, two metal part were heated to more than the room temperature～temperature below 150 ℃ by laser radiation as required., by make metal part 2512 and metal part 2511 be in contact with one another, and metal bond two metal part form metal level 251 thereafter.By lower cover member 203 stop up (-Z) cartridge 204 and the cover unit 202 of the opening of side are bonding by metal level 251, airtight inner space 211 (step S219) of taking in 2 semiconductor elements 261 under decompression or vacuum state.
As mentioned above, by bonding lower cover member 203, cover unit 202 and cartridge 204 and to make semiconductor element 261 be inner space 211 sides towards the inboard, thereby form container 210 and make electronic package 201.In addition, also can under inert gas environment, carry out the assembling of semiconductor element 261 and the joint of each metal part, at this moment, inert gas be arranged in inner space 211 inclosures that are sealed with semiconductor element 261.Also can reduce the pressure in the chamber when under inert gas environment, sealing in addition.Above-mentioned decompression is preferably from atmosphere and is pressed onto decompression about 1Pa (Pascal)～10Pa.
In electronic package 201, since in the above 221 the assembling semiconductor elements 261 and outer electrode 223, and below 231 the assembling semiconductor element 261 and outer electrodes 233 be electrically connected mutually, therefore by electronic package 201 is assemblied on the external substrate, and external substrate and 2 semiconductor elements 261 are electrically connected.The assembling to external substrate of electronic package 201, be connected with electrode on the external substrate via the anisotropic conductive resin film by outer electrode 233 for example, outer electrode 223 is connected with electrode on the external substrate by wire-bonded, and a plurality of electronic package 201 are configured on the external substrate to high-density.
As mentioned above, in electronic package 201, because 2 semiconductor elements 261 directly are assemblied in respectively on the cover unit 202 and lower cover member 203 of the multilager base plate that is formed with outer electrode, therefore the structure of encapsulation can be made the structure of the highdensity configuration that is applicable to small electronic component.In addition, by stopping up the openings at two ends of cartridge 204 and form container 210 by cover unit 202 that is respectively fitted with semiconductor element 261 and lower cover member 203, thereby 2 semiconductor elements 261 be assembled in 2 relative faces of inner space 211, promptly above 221 and below 231, therefore can easily make electronic package 201.
In electronic package 201, to compare with the situation of welding etc. be at low temperature, promptly engage with common soft solder or glass dust that to compare be low temperature, preferably, more than the room temperature～below 150 ℃, respectively bonding cartridge 204, with cover unit 202 and lower cover member 203, airtight inner space 211 of taking in semiconductor element 261.Its result even the low semiconductor element 261 of thermal endurance also can not bring by thermogenetic damage can not be accommodated in the inner space 211 at low temperatures.In addition, can use thermal endurance, can reduce the manufacturing cost of electronic package 201 than low and cheap resinous cover unit 202, lower cover member 203 and cartridges 204 such as pottery or metals.
In electronic package 201, because each metal part 2512,2511,2521,2522 engages by interatomic strong adhesion, when therefore can improve each other bonding reliability of each parts 202,204,203, formation has high bubble-tight inner space 211.In addition, metal level 251 and 252 by chemically stable, promptly the have difficult labour gold of biochemical variation forms, and therefore can improve the airtight reliability of inner space 211.
Further; because inner space 211 is in decompression or vacuum state or the inert gas atmosphere; therefore can protect semiconductor element 261 from the influence of the moisture that atmosphere, exists or oxygen etc., can suppress the performance degradation of the semiconductor element 261 that causes by these influences.Thus, electronic package 201 also is applicable in the sealing of the semiconductor element 261 that thermal endurance is low and moisture-proof is also low.
The 4th execution mode
Figure 10 is the profile of formation of the electronic package 201a of expression the 4th execution mode of the present invention.Electronic package 201a replaces the cartridge 204 of electronic package 201 shown in Figure 7, as shown in figure 11, possesses the resinous cartridge 204a that is equipped with 2 semiconductor elements 261.Other formations are identical with formation shown in Figure 7, additional in the following description identical symbol.As shown in figure 10, in electronic package 201a, on inner space 211 221 and below 231, reach 2 the relative faces in the side, be positioned on the directions X (below, be called " assembling side ".) be respectively fitted with 1 semiconductor element 261 on 410, be equipped with 4 semiconductor element 261 altogether.
Figure 11 is expression cartridge 204a reaches the semiconductor element 261 that assembles on cartridge 204a a exploded perspective view.Cartridge 204a possesses: 2 side member 245 that are respectively fitted with 1 semiconductor element 261; With 2 links 246 that are connected 2 side member 245.In the assembling side 2410 of side member 245, be bonded with the zone of link 246, be provided with the metal part 2531 that forms by gold (Au).On the both ends of the surface of the directions X at the bonding position of link 246, the metal part 2532 that is formed by gold (Au) is set similarly, by metal bond metal part 2531 and metal part 2532, and bonding side member 245 and link 246 and form cartridge 204a.
Figure 12 is the figure of a part of the manufacturing process of expression electronic package 201a.In manufacturing electronic package 201a, before the operation of the step S212～S219 that implements Fig. 9, implement operation shown in Figure 12.At first, apply gold plate, and form metal part 2531 and 2532 (step S221) at each bonding position of side member shown in Figure 11 245 and link 246.
Then, apply gold plate, form metal part 2512 and 2522 at each bonding position of cover unit shown in Figure 10 202 and lower cover member 203.In addition, on the position at interior, the bonding position that is equivalent to bonding mutually and cartridge 204a when forming cartridge 204a of the end face of the Z direction of side member 245 that forms cartridge 204a and link 246, apply gold plate, form metal part 2511 and 2521 respectively, say that exactly being respectively formed at becomes the metal part 2511 of ring-type and 2521 metal part (step S222) when forming cartridge 204a.
If the formation of each above-mentioned metal part finishes, then cover unit 202, lower cover member 203, side member 245, link 246 and 4 semiconductor elements 261, via the loadlock of coupling device be configured in decompression in advance, preferably in the chamber in vacuum state, and to the internal electrode 242 irradiation FAB of the projection 262 of 2 semiconductor elements 261 and 2 side member 245 and clean surface (step S223).By metal bond that projection 262 and internal electrode 242 be in contact with one another, and on the assembling side 2410 of 2 side member 245 respectively assemble 1 semiconductor element 261 (step S224) thereafter.
Then, under the decompression or vacuum environment in chamber,, clean the surface (step S225) of two metal part to the metal part 2531 of side member shown in Figure 11 245 and the FAB of 2532 irradiation argon gas.This moment two metal part 2531,2532 as required the irradiation by laser etc. be heated to more than the room temperature～temperature below 150 ℃.Then, metal part 2531 and metal part 2532 are in contact with one another and the operation of metal bond two metal part, bonding successively 2 side member 245 and 2 links 246 form cartridge 204a (step S226).
Thereafter, in knocked-down 2 semiconductor elements 261, (Fig. 9: step S212), metal bond projection 262 and internal electrode 222 be assembling semiconductor element 261 (step S213) on cover unit 202 also for the internal electrode 222 irradiation FAB of the projection 262 of 1 semiconductor element 261 and cover unit 202.Similarly, to the internal electrode 232 irradiation FAB (step S214) of the projection 262 of 1 semiconductor element 261 and lower cover member 203, metal bond projection 262 and internal electrode 232 also are assemblied in (step S215) on the lower cover member 203 with semiconductor element 261.
Then, to the metal part 2522 of lower cover member 203 and the metal part 2521 irradiation FAB (step S216) of cartridge 204a, metal bond two metal part 2522,2521 and bonding lower cover member 203 and cartridge 204a (step S217).And, to the metal part 2512 of cover unit 202 and the metal part 2511 irradiation FAB (step S218) of cartridge 204a, metal bond two metal part 2512,2511 and bonding cover unit 202 and cartridge 204a, airtight inner space 211 (step S219) of taking in 4 semiconductor elements 261 under decompression or vacuum state.As mentioned above, lower cover member 203, cover unit 202 and 2 side member 245, the semiconductor element 261 that makes assembling towards inboard, to be 211 sides ground, inner space bonding and form container 210a with link 246, makes the electronic package 201a that takes in 4 semiconductor elements 261.
In addition, also can carry out between side wall portion 245 and link 246 between bonding before carry out the assembling of the semiconductor element 261 of downward cover 203 and cover unit 202 earlier, in addition, also can suitably replace to the order of the assembling of each parts.Also can under inert gas environment, carry out cover unit 202 and lower cover member 203, and cartridge 204a between bonding, at this moment, enclosing in inner space 211 has inert gas.Can reduce the pressure in the chamber when further, under inert gas environment, sealing.Be preferably the decompression that is pressed onto from atmosphere about 1Pa (Pascal)～10Pa in this above-mentioned decompression.
As mentioned above, in electronic package 201a, by 4 semiconductor elements 261 directly being assemblied in top 221, following 231 and the side 241 that make the inner space 211 that the multilager base plate combination that is formed with outer electrode forms is between side wall portion on 245 the assembling side 24110, and the structure that encapsulates can be made the structure of the highdensity configuration that is applicable to small electronic component.In addition, owing to bonding each parts after the assembling semiconductor element 261 on as cover unit 202, lower cover member 203 and the side member 245 of smooth parts form container 210a, therefore can easily assemble semiconductor element 261 in container 210a inside, can easily make electronic package 201a.
Electronic package 201a, with electronic package 201 in the same manner, even the semiconductor element 261 that thermal endurance is low can not bring by thermogenetic damage yet, and can be accommodated in the inner space 211 at low temperatures, and can use cheap resinous parts, thereby can reduce the manufacturing cost of electronic package 201a.
Further, inner space 211 is in decompression or vacuum state or the inert gas atmosphere, can protects the influence of moisture that semiconductor element 261 avoids existing in the atmosphere or oxygen etc.In addition,, therefore not only can form inner space 211 with high seal because each parts that form container 210a are bonding by the interatomic combination of each metal part of being formed by gold, and the airtight reliability of raising inner space 211.
The 5th execution mode
Figure 13 is the profile of formation of the electronic package 201b of expression the 5th execution mode of the present invention.Electronic package 201b, identical with electronic package 201 shown in Figure 7 except the assembly method difference of semiconductor element 261, additional in the following description identical symbol.
In the electronic package 201b shown in Figure 13,2 semiconductor elements 261 respectively via give inner space 211 top 221 and below on 231, have thermosetting resin 207 and be assemblied on each face.
Figure 14 is the figure of assembly process of expression semiconductor element 261 in the manufacturing process of electronic package 201b, and is corresponding with step S212～S215 among Fig. 9.In electronic package 201b shown in Figure 13, at first, on the internal electrode 232 of the internal electrode 222 of cover unit 202 and lower cover member 203, give resin 207 (step S231).Resin 207 is the anisotropic conductive resin films (ACF (Anisotropic Conductive Film)) that formed by the insulative resin that evenly is dispersed with electroconductive particle in inside.1 semiconductor element 261, by pushing and heat and be fixed on the cover unit 202, and engage with internal electrode 222 via the electroconductive particles in the resin 207 by projection 262 and to be assemblied in (step S232) on the cover unit 202 from giving resin 207 on the cover unit 202.With 1 semiconductor element 262 in the same manner, by pushing and heat projection 262 is connected with internal electrode 232 from the resin 207 of giving lower cover member 203, be assemblied in (step S233) on the lower cover member 203.At this moment, need not in chamber, to carry out the assembling of semiconductor element 261.
In addition, as resin 207, also can use anisotropic conductive resin plaster [ACP (Anisotropic Condutive Paste)], non-conductive resin film [NCF (Non-Conductive Film)] or non-conductive resin cream [NCP (Non-Conductive Paste)], these resins also can have the character of being hardened by other processing beyond the heat treated.In either case, owing to semiconductor element 261 directly can be assemblied on the cover unit 202 and lower cover member 203 of the multilager base plate that is formed with outer electrode, therefore the structure of electronic package 201b can be made the structure of the highdensity configuration that is applicable to small electronic component.
The 6th execution mode
Figure 15 is the profile of formation of the electronic package 201c of expression the 6th execution mode of the present invention.Electronic package 201c, possess the parts that have cavity (recess) 213 (below, be called " cavity substrate ".), replace the metal level 252 of cartridge 204, lower cover member 203 and bonding two parts of electronic package shown in Figure 7 201.In addition, cavity substrate 212 is equivalent to main element.Other formations are identical with Fig. 7, additional in the following description identical symbol.In electronic package 201c, bonding cavity substrate 212 and cover unit 202 form container 210c.
The bottom of cavity substrate 212 and sidewall play the effect identical with lower cover member shown in Figure 7 203 and cartridge 204 respectively, in the bottom surface of cavity 213, be cavity substrate 212 the bottom (+Z) side face, be to be equipped with semiconductor element 261 on 231 below the inner space 211.Electronic package 201c, with cover unit 202 (-Z) side face, promptly become above the inner space 211 on the face of 221 peristome face, that stop up cavity 213 and assembled under the state of 1 semiconductor element 261, by the method identical (the step S218 of Fig. 9, S219) with the 3rd execution mode by metal level 251 bonding cover unit 202 and cavity substrates 212, airtight inner space 211 and forming.Therefore, can easily make electronic package 201c.In addition, also can carry out the assembling of semiconductor element 261, also can as the 5th execution mode, carry out via resin by the metal bond identical with the 3rd execution mode.
In the electronic package 201c of the 6th execution mode, as reference Fig. 6 explanation, a plurality of electronic package 201c are formed as one, cut off in cut-out portion afterwards, thereby can make each electronic package 201c.
More than, the 3rd～the 6th execution mode of the present invention is illustrated, but the present invention is not limited to above-mentioned execution mode, can carry out various changes.For example, from reducing the viewpoint of manufacturing cost, cover unit 202, lower cover member 203 and cartridge 204 are preferably formed by resin, but also can be formed by other materials such as metal or potteries.In addition, the airtight reliability in space 211 improves and the viewpoint of airborne oxidative resistance internally, and the metal part of each parts of bonding formation container 210 is preferably formed by gold, but also can be formed by other various metals.
In the above-described embodiment, used argon gas, but also other atoms such as nitrogen, hydrogen can have been used as FAB as FAB.In addition, replace FAB, also can carry out the cleaning of metal part or electrode by other energy waves such as ion beams.
Container 210,210a, 210c need not to leave no choice but to form by the bonding of parts of the shape of representing in the above-mentioned execution mode, also can form by bonding parts with other different shapes.For example, have 2 substrates of each cavity structure, also can be bonding and form inner space 211 in the mode of the peristome of mutual obstruction cavity.In addition, each other bonding of parts also can be that the bonding agent of principal component carries out with the resin.
The assembling of semiconductor element 261 also can be undertaken by the method beyond above-mentioned, for example, also can push semiconductor element 261 and give the ultrasonic waves vibration by under the state of projection 262 and internal electrode 222 butts, and copulational protuberance 262 and internal electrode 222 and assemble.In addition, be equipped with the container 210 of a plurality of semiconductor elements 261, the face of 210a, 210c, be not limited to the combination represented in the above-mentioned execution mode, also can suitably change.That is, by on inner space 211 221, below assembling electronic element in 231 and 4 sides 241, at least one face and another face, and realize the arranged in high density of small electronic component.
In Figure 16～Figure 21, be example with electronic package 201c, when being illustrated on the outer surface of cover unit 202 assembling electronic element, the state of assembling electronic element encapsulation 201c on substrate 108.Certainly, replace electronic package 201c, also can utilize electronic package shown in Figure 7 201, electronic package 201a shown in Figure 10, and electronic package 210b shown in Figure 13.
The outer surface that Figure 16 is illustrated in cover unit 202 has assembled the state of semiconductor element 271, the outer surface that Figure 17 is illustrated in cover unit 202 has assembled the state of chip part 272, Figure 18 represent variation as Figure 17 in the inner space 211 situations that disposed chip part 272.In addition, semiconductor element 271 and chip part 272 are equivalent to the 3rd electronic component.Figure 19 represents that the electrode from the outer surface that is formed on cover unit 202 carries out the state of wire-bonded with gold thread 273 to the electrode of substrate 108.Figure 20 and Figure 21 are illustrated in the electronic package 201c and apply wiring, realize being assemblied in the electronic component on the cover unit 202 and are assemblied in the situation of the electrical connection between the electronic component on the cavity substrate 212.That is, as shown in figure 21, form parts 274 on the face 221 of inner space 211 sides in cover unit 202, the face 231 of inner space 211 sides in cavity substrate 212, and the inboard of cavity substrate 212 form wiring 275.In addition, separate, form wiring metal level 276 with the metal level 251 that engages cover unit 202 and cavity substrate 212.This wiring is with metal level 276, with the formation method of metal level 251 in the same manner, to after metal part 2762 that forms on the cover unit 202 and the metal part 2761 irradiation FAB that on cavity substrate 212, form, engage and form.At this, wiring 274 is connected with metal part 2762, connects up 275 to be connected with metal part 2761.Thereby wiring 274 and wiring 275 are electrically connected with metal level 276 via wiring.
The above-mentioned the 3rd～the 6th execution mode also can be used in the encapsulation of the various electronic components beyond the semiconductor element, also can be used in the electronic component that thermal endurance is low and moisture-proof is low.
In addition, by the execution mode arbitrarily in the above-mentioned various execution modes of appropriate combination, and can access the effect that has separately.
The present invention to preferred embodiment having done sufficient record, but clearly can carry out various distortion or correction with reference to accompanying drawing the time for the people who is familiar with this technology.These distortion or correction ought to be encompassed in wherein in the scope of the present invention that does not break away from based on the scope of the claims that add.
The present invention can be used in the electronic package of taking in semiconductor element and other various electronic components.
Claims (4)
1. the electronic component of an encapsulation wherein, possesses:
Electronic component;
Assemble the 1st container parts of described electronic component;
Form the 2nd container parts in the space of taking in described electronic component with described the 1st container parts;
Engage described the 1st container parts and described the 2nd container parts and the bonding agent in airtight described space; With
Cover the face that exposes of described bonding agent, and cover the metal film of the outer surface of described the 2nd container parts.
2. the electronic component of encapsulation according to claim 1, wherein,
Described the 1st container parts is smooth parts, and described the 2nd container parts has the recess that covers described the 1st container parts.
3. the electronic component of encapsulation according to claim 2, wherein,
Described the 2nd container parts has flange part, and this flange part is arranged on the edge of described recess and bonding via described bonding agent and described the 1st container parts.
4. the electronic component of encapsulation according to claim 1, wherein,
In described space, be provided with hygroscopic agent.
Applications Claiming Priority (9)
| Application Number | Priority Date | Filing Date | Title |
|---|---|---|---|
| JP2003407232 | 2003-12-05 | ||
| JP2003407232A JP4134893B2 (en) | 2003-12-05 | 2003-12-05 | Electronic device package |
| JP2003-407232 | 2003-12-05 | ||
| JP2003-410046 | 2003-12-09 | ||
| JP2003410046 | 2003-12-09 | ||
| JP2003410046A JP4089609B2 (en) | 2003-12-09 | 2003-12-09 | Electronic device package and method of manufacturing electronic device package |
| JP2003420643 | 2003-12-18 | ||
| JP2003420643A JP4134900B2 (en) | 2003-12-18 | 2003-12-18 | Electronic device package |
| JP2003-420643 | 2003-12-18 |
Related Parent Applications (1)
| Application Number | Title | Priority Date | Filing Date |
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| CNB2004800360904A Division CN100440490C (en) | 2003-12-05 | 2004-12-02 | Packaged electronic element and method of producing electronic element package |
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| Publication Number | Publication Date |
|---|---|
| CN101369560A true CN101369560A (en) | 2009-02-18 |
| CN101369560B CN101369560B (en) | 2010-06-09 |
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| CNB2004800360904A Expired - Fee Related CN100440490C (en) | 2003-12-05 | 2004-12-02 | Packaged electronic element and method of producing electronic element package |
| CN200810169256XA Expired - Fee Related CN101369560B (en) | 2003-12-05 | 2004-12-02 | Packed electronic element |
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| CN106206473B (en) * | 2016-08-30 | 2019-06-28 | 无锡中微高科电子有限公司 | Integrated circuit plastic capsulation structure and preparation method thereof |
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| Publication number | Priority date | Publication date | Assignee | Title |
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| JPH02303676A (en) * | 1989-05-17 | 1990-12-17 | Hitachi Ltd | Joining method by brazing material and treating device as well as semiconductor device |
| JPH04148559A (en) * | 1990-10-11 | 1992-05-21 | Mitsubishi Electric Corp | Hybrid integrated circuit device |
| JP2750253B2 (en) * | 1993-01-26 | 1998-05-13 | 京セラ株式会社 | Semiconductor device |
| JP3873145B2 (en) * | 1999-05-27 | 2007-01-24 | 京セラ株式会社 | Package for storing semiconductor elements |
| JP2001127588A (en) * | 1999-10-28 | 2001-05-11 | Tdk Corp | Surface acoustic wave branching filter |
-
2003
- 2003-12-05 JP JP2003407232A patent/JP4134893B2/en not_active Expired - Fee Related
-
2004
- 2004-12-02 CN CNB2004800360904A patent/CN100440490C/en not_active Expired - Fee Related
- 2004-12-02 CN CN200810169256XA patent/CN101369560B/en not_active Expired - Fee Related
Cited By (7)
| Publication number | Priority date | Publication date | Assignee | Title |
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| CN102157499A (en) * | 2010-12-15 | 2011-08-17 | 安徽华东光电技术研究所 | Hybrid integrated circuit module based on low temperature co-fired ceramic technology and manufacturing method thereof |
| CN102157498A (en) * | 2010-12-15 | 2011-08-17 | 安徽华东光电技术研究所 | Hybrid integrated circuit module and manufacturing method thereof |
| CN102157498B (en) * | 2010-12-15 | 2013-04-17 | 安徽华东光电技术研究所 | Hybrid integrated circuit module and manufacturing method thereof |
| CN103930987A (en) * | 2011-07-25 | 2014-07-16 | 兰克森法国公司 | Lead frameless hermetic circuit package |
| CN109287129A (en) * | 2017-05-19 | 2019-01-29 | 新电元工业株式会社 | Electronic module |
| CN109287129B (en) * | 2017-05-19 | 2022-04-08 | 新电元工业株式会社 | Electronic module |
| TWI721376B (en) * | 2018-09-07 | 2021-03-11 | 日商三菱電機股份有限公司 | Hermetically sealed |
Also Published As
| Publication number | Publication date |
|---|---|
| CN100440490C (en) | 2008-12-03 |
| CN1890801A (en) | 2007-01-03 |
| CN101369560B (en) | 2010-06-09 |
| JP2005167129A (en) | 2005-06-23 |
| JP4134893B2 (en) | 2008-08-20 |
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