CN101350364A - Method for preparing nano zinc oxide field-effect transistor - Google Patents
Method for preparing nano zinc oxide field-effect transistor Download PDFInfo
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- CN101350364A CN101350364A CNA2008100425006A CN200810042500A CN101350364A CN 101350364 A CN101350364 A CN 101350364A CN A2008100425006 A CNA2008100425006 A CN A2008100425006A CN 200810042500 A CN200810042500 A CN 200810042500A CN 101350364 A CN101350364 A CN 101350364A
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Abstract
The invention belongs to a microelectronic technical field, in particular to a process for preparing a nanometer zinc oxide field effect transistor. The method is characterized by realizing the oriented growth of a zinc oxide nanometer rod through selectively depositing a seed crystal layer, transversely growing the zinc oxide nanometer rod between a source electrode and a drain of a thin film transistor and using the zinc oxide nanometer rod as a conducting channel layer, and utilizing the good electrical characteristics of a single-crystal zinc oxide nanometer rod to make a zinc oxide field effect transistor with high mobility. The method can effectively improve the mobility of a zinc oxide device, and simultaneously, the invention has the advantages of simple technical method and a big growing area.
Description
Technical field
The invention belongs to microelectronics technology, be specifically related to a kind of manufacture method of nano zinc oxide field-effect transistor.
Background technology
In recent years, flat-panel display device has become the important component part of information industry.Thin-film transistor has direct influence as switch dot matrix or drive circuit in the active matrix liquid crystal display to properties of product.Carrier mobility is an important indicator that characterizes thin-film transistor performance, and high-mobility field-effect transistor has high drive current low in power consumption.Traditional lower (＜1cm of amorphous silicon field-effect transistor mobility
2/ (Vs)), the requirement of display device high speed high brightness can not be adapted to.Though the polysilicon fet mobility is higher, be difficult to be widely used owing to needing high-temperature technology to combine with glass substrate.By contrast, it is low that ZnO has growth temperature, the higher relatively (＞1cm of stable chemical performance and mobility
2/ (Vs)) advantage, therefore in the application of thin-film transistor, have good prospect.And ZnO film has the characteristics of high permeability in visible-range, can realize full impregnated funerary objects spare by growing ZnO thin-film on simple glass and plastic at present, reduces the product power consumption thereby effectively improve through-hole rate.
The mobility of the zinc oxide field-effect transistor of report is at 0.1-10cm at present
2/ (Vs) between, device performance has been difficult to further lifting.This is because the ZnO that grows under cryogenic conditions is a polycrystal film, and the existence of a large amount of grain boundary defects has limited the transport process of charge carrier.The mobility of single crystal ZnO is up to 200cm
2/ (Vs),, will effectively improve the electric property of field-effect transistor if therefore adopt single crystal ZnO as conductivity channel layer.Compare the complicated high-temperature technology of single crystal ZnO film, the ZnO nanometer rods has good monocrystalline performance, and preparation is simple, growth temperature low (＜100 ℃), can realize the regional oriented growth of ZnO nanometer rods by control, so the ZnO nano-device has the advantage that the current thin film transistor can't be compared to inculating crystal layer.The ZnO nanometer rods field-effect transistor manufacture craft of report mainly is divided into two classes at present, one class is that the nanometer rods that growth is good is disperseed, be spun to again on the gate medium substrate, be positioned at the nanometer rods two ends by scanning electron microscopy (SEM) then and prepare source, drain electrode contact, this transistor has mobility preferably.But owing to be spun to the randomness of nanometer rods position on the substrate, the method is difficult to realize suitability for industrialized production.Another kind of method is elder generation's large area deposition nanometer rods on source-drain electrode, just can form conducting channel when certain connection is arranged between the nanometer rods.But owing to there be formed between a large amount of nanometer rods " knot ", be equivalent to have grain boundary defects and the performance that influenced device.
Summary of the invention
The field-effect transistor that technology of the present invention is simple, with low cost, can the mass preparation high mobility.
The present invention is directed to the mobility problem that present amorphous Si and ZnO field-effect transistor exist, realize the oriented growth of ZnO nanometer rods by selectively deposited inculating crystal layer, cross growth ZnO nanometer rods is utilized the field-effect transistor of the superior electrical characteristic making high mobility of single crystal ZnO nanometer rods as channel layer between the source-drain electrode of field-effect transistor.This method can effectively improve the mobility of field-effect transistor, and it is simple simultaneously to possess process again, can be on glass substrate even flexible substrate the advantage of large area deposition.
Nano-ZnO field-effect transistor of the present invention comprises gate electrode, gate insulation layer, and source-drain electrode, conductivity channel layer, the channel layer that it is characterized in that described field-effect transistor is the ZnO nanorod structure of cross growth.Gate electrode of the present invention and source-drain electrode material thickness are 50nm-1um, and gate insulation layer thickness is 10nm-500nm, and conductivity channel layer is intrinsic ZnO, the nanorod structure of n type ZnO or p type ZnO, and the thickness of conductivity channel layer is 10nm-200nm.
The preparation method of nano-ZnO field-effect transistor of the present invention is characterized in that epitaxial growth gate insulation layer material on the gate electrode of selecting deposit, realizes the source-drain electrode figure by photoetching process or nano impression then.Its critical process is to realize the cross growth of ZnO nanometer rods between source-drain electrode.ZnO nanometer rods technology has on graphical inculating crystal layer can oriented growth, the characteristics that on unprocessed substrate, can not grow or arbitrarily grow, on source, leakage side wall, select the growth inculating crystal layer, by the cross growth single crystal ZnO nanometer rods on the side wall that acts on of inculating crystal layer.Required growing nano-rod length is decided on conducting channel length, by changing growth solution concentration, temperature and time, can change the length of ZnO nanometer rods.The location of inculating crystal layer can adopt physical vapor deposition (PVD) tiltedly to evaporate or the method for tiltedly sputter, dry etching forms abutment wall in the source-drain electrode side in this critical process, be that first large tracts of land deposit ZnO inculating crystal layer adopts plasma etching (RIE) then, utilize the anisotropic characteristics of plasma etching, only keep the inculating crystal layer on the sidewall.By solwution method oriented growth ZnO nanometer rods on the inculating crystal layer that defines the position, this method may further comprise the steps at last:
(1) makes graphical gate electrode by photoetching corrosion or stripping technology, corrode after can utilizing the egative forme photoetching, carry out stripping technology after the perhaps legal photoetching, gate material be among ITO, Al, Au, Pt, Ni, Ti, ZnO:Al, ZnO:Ga, TiN, TaN, Ru and the Si any one or wherein both the combination double-decker, and be not limited to above-mentioned material, the method of deposit can adopt physical vapor deposition, as method or chemical vapor depositions such as sputter, evaporations.
(2) insulating barrier of growing on gate electrode, the gate insulation layer material is SiO
2, Si
3N
4, Al
2O
3, Y
2O
3, ZrO
2, HfO
2, Ta
2O
5Any one or the double-decker of both combinations wherein in the nano thin-film and are not limited to above-mentioned material.
(3) on gate insulation layer, making source-drain electrode by photoetching corrosion or stripping technology, the source-drain electrode material is oxidation resistant conducting metal or other electric conducting material, for any one or the double-decker of both combinations wherein among ITO, Al, Au, Pt, Ni, Ti, ZnO:Al, ZnO:Ga, TiN, TaN and the Ru, and be not limited to above-mentioned material.For realizing that full impregnated funerary objects spare can preferentially adopt among ITO, ZnO:Al, the ZnO:Ga double-decker of any one or wherein both combinations as source-drain electrode.
(4) growth ZnO inculating crystal layer on the sidewall of source-drain electrode, can adopt two kinds of approach, its concrete grammar is: a kind of is to adopt the oblique evaporation of growth employing of ZnO inculating crystal layer or the method for oblique sputter, in when evaporation sample inclination certain angle (40～50 degree) is carried out, only at an outgrowth ZnO inculating crystal layer of source-drain electrode; Another kind is to adopt physical vapor deposition (PVD), atomic layer deposition (ALD), sol-gal process methods such as (sol-gel) is at source-drain electrode surface large area deposition ZnO inculating crystal layer, pass through plasma etching then, utilize the principle of plasma etching (RIE) anisotropic etching, remove the ZnO inculating crystal layer on source-drain electrode top and the gate insulation layer, and kept the ZnO inculating crystal layer on the source-drain electrode sidewall; The condition of etching technics is decided on the thickness of ZnO inculating crystal layer in this technology.
(5) adopt solwution method growing ZnO nanorod on the ZnO inculating crystal layer, with the ZnO nanometer rods of cross growth as conductivity channel layer.Its concrete grammar is, carry out on the inculating crystal layer that is grown in deposit of ZnO nanometer rods, adopt zinc nitrate or zinc acetate, with hexamethylenetetramine (HMT), dimethyamine borane (DMAB), any one is to be dissolved in obtain solution in the deionized water between 1: 1 to 3: 1 with mol ratio in ammoniacal liquor or the ethylenediamine, the concentration of zinc ion is 0.01～0.04mol/L in the solution, the substrate that will cover inculating crystal layer with support is vertically put into reaction solution, again the container that reaction solution and substrate are housed being put into water-bath heats, reaction temperature is between 50 ℃～100 ℃, growth time is half an hour to six hour, after finishing, reaction takes out sample, dry up with deionized water rinsing and with nitrogen, promptly make the ZnO nanometer rods; The growing method of ZnO nanometer rods is not limited only to above-mentioned prescription.
Description of drawings
This case method of Fig. 11 and case method 2,3 deposits form ITO gate electrode structure generalized section.
This case method of Fig. 21 and case method 2,3 deposits form Al
2O
3Gate dielectric layer structural profile schematic diagram.
This case method of Fig. 31 and case method 2 deposits form ITO source leakage electrode structure generalized section.
This case method of Fig. 41 surperficial spin coating ZnO inculating crystal layer structural profile schematic diagram.
This case method of Fig. 51 using plasma lithographic method is removed the structural profile schematic diagram of the ZnO inculating crystal layer on sample levels surface.
The structural profile schematic diagram of this case method of Fig. 61 growing ZnO nanorod on the ZnO inculating crystal layer.
This case method of Fig. 72 adopts the method deposit ZnO inculating crystal layer structural profile schematic diagram of the oblique sputter of PVD.
The structural profile schematic diagram of this case method of Fig. 82 growing ZnO nanorod on the ZnO inculating crystal layer.
Fig. 9 nano impression source-drain electrode flow chart.
Embodiment
Below in conjunction with accompanying drawing enforcement of the present invention is further described by way of example, but the present invention is not limited only to following example.
Example 1 RIE etching forms the ZnO inculating crystal layer
1) gets the ITO electro-conductive glass as gate electrode, adopt the method for ultrasonic cleaning that sample surfaces is cleaned.With sample ultrasonic concussion 15 minutes in acetone and absolute ethyl alcohol successively, dry up with nitrogen then.
2) ito glass is carried out positive glue photoetching process, make gate electrode figure by lithography, adopt HCl: H then
2O: HNO
3-3: solution formula carried out wet etching to ito glass in 2: 1, adopted the ultrasonic concussion of acetone to remove photoresist at last, as shown in Figure 1.
3) on the ITO gate patterns that forms, adopt the method deposit 10-200nmAl of radio frequency (RF) sputter
2O
3As gate dielectric layer, preferred thickness is 50nm, as shown in Figure 2.
4) finish after the gate medium deposit, adopt acetone and absolute ethyl alcohol to carry out ultrasonic concussion and clean, dry up with nitrogen then.
5) the bar product after the cleaning are adopted positive glue photoetching process, at gate medium Al
2O
3On make required source-drain electrode figure by lithography.
6) adopt the method large tracts of land deposit 120nmITO conductive film of radio frequency (RF) sputter as source-drain electrode.Stripping technology is carried out in ultrasonic concussion in acetone then, goes into required source-drain electrode figure, as shown in Figure 3.
7) adopt collosol and gel (sol-gel) method, at sample surfaces spin coating layer of ZnO inculating crystal layer, as shown in Figure 4.
A) the sol-gel solution formula is for to be dissolved in zinc acetate and ethylenediamine in the EGME solution, and zinc acetate concentration is 0.5mol/L, and ethylenediamine concentration is 0.5mol/L.
B) sample that spin coating is finished is put into annealing furnace and was annealed 15 minutes under 400 ℃ of air conditionses, can generate the ZnO inculating crystal layer.
8) way of using plasma etching is removed the ZnO inculating crystal layer on sample levels surface.Etching gas is SiCl
4, air pressure is 60mTorr, etching power is 200W, the etch rate of ZnO is approximately 12.5nm/min, according to the thickness selective etching time of inculating crystal layer.Because the ZnO inculating crystal layer on the source-drain electrode sidewall can't effectively be bombarded, therefore only on the sidewall of source-drain electrode, keep the ZnO inculating crystal layer, as shown in Figure 5.
9) growth there is the sample of inculating crystal layer put into reaction solution growing ZnO nanorod structure.
A) reaction solution is for to be dissolved in zinc nitrate and dimethyamine borane in the deionized water, and zinc nitrate concentration is 0.01mol/L, and dimethyamine borane concentration is 0.003mol/L.
B) reaction condition is 60 ℃ of water-bath heating, and the reaction time is 6 hours.
C) owing to the growth guide effect of inculating crystal layer, the ZnO nanometer rods will cross growth between source-drain electrode.
10) take out response sample and adopt deionized water rinsing, can obtain nano field-effect transistor of the present invention after drying up with nitrogen, as shown in Figure 6.
Example 2 oblique sputters form the ZnO inculating crystal layer
1) gets ITO electro-conductive glass gate electrode, adopt the method for ultrasonic cleaning that sample surfaces is cleaned.With sample ultrasonic concussion 15 minutes in acetone and absolute ethyl alcohol successively, dry up with nitrogen then.
2) ito glass is carried out positive glue photoetching process, make gate electrode figure by lithography, adopt HCl: H then
2O: HNO
3=3: solution formula carried out wet etching to ito glass in 2: 1, adopted the ultrasonic concussion of acetone to remove photoresist at last, as shown in Figure 1.
3) on the ITO gate patterns that forms, adopt the method deposit 200nmAl of radio frequency (RF) sputter
2O
3As gate dielectric layer, preferred thickness is 50nm, as shown in Figure 2.
4) finish after the gate medium deposit, adopt acetone and absolute ethyl alcohol to carry out ultrasonic concussion and clean, dry up with nitrogen then.
5) sample after the cleaning is adopted positive glue photoetching process, at gate medium Al
2O
3On make required source-drain electrode figure by lithography.
6) adopt the method large tracts of land deposit 120nmITO conductive film of radio frequency (RF) sputter as source-drain electrode.Stripping technology is carried out in ultrasonic concussion in acetone then, goes into required source-drain electrode figure, as shown in Figure 3.
7) adopt the tiltedly method of sputter of physical vapor deposition (PVD),, promptly when sample is placed in sputter, raise an angle, only a side of source-drain electrode is carried out the sputter of ZnO inculating crystal layer, as shown in Figure 7 at source-drain electrode one outgrowth ZnO inculating crystal layer.
8) growth there is the sample of inculating crystal layer put into reaction solution growing ZnO nanorod structure.
A) reaction solution is for to be dissolved in zinc nitrate and hexamethylenetetramine in the deionized water, and zinc nitrate concentration is 0.01mol/L, and hexamethylenetetramine concentration is 0.01mol/L.
B) reaction condition is 75 ℃ of water-bath heating, and the reaction time is 6 hours.
C) owing to the growth guide effect of inculating crystal layer, the ZnO nanometer rods will cross growth between source-drain electrode.
9) take out response sample and adopt deionized water rinsing, can obtain nano field-effect transistor of the present invention after drying up with nitrogen, as shown in Figure 8.
Example 3 utilizes nano impression to form source-drain electrode
1) gets ITO electro-conductive glass gate electrode, adopt the method for ultrasonic cleaning that sample surfaces is cleaned.With sample ultrasonic concussion 15 minutes in acetone and absolute ethyl alcohol successively, dry up with nitrogen then.
2) ito glass is carried out positive glue photoetching process, make gate electrode figure by lithography, adopt HCl: H then
2O: HNO
3=3: solution formula carried out wet etching to ito glass in 2: 1, adopted the ultrasonic concussion of acetone to remove photoresist at last, as shown in Figure 1.
3) on the ITO gate patterns that forms, adopt the method deposit 200nmAl of radio frequency (RF) sputter
2O
3As gate dielectric layer, preferred thickness is 50nm, as shown in Figure 2.
4) finish after the gate medium deposit, adopt acetone and absolute ethyl alcohol to carry out ultrasonic concussion and clean, dry up with nitrogen then.
5) adopt the PMMA glue of 2000rpm rotating speed spin coating 5% on substrate, spin coating thickness is about 350nm, then 180 ℃ down before baking one hour to drive away organic solvent, PMMA glue plays the effect of peeling off formation source-drain electrode figure.Then adopt ion beam sputtering thick SiO of deposit one deck 30nm on PMMA
2Etching barrier layer as PMMA glue.Adopting rotating speed at last is SU8 2000 glue of 5000rpm spin coating 200nm, and wherein the percentage of SU8 probably is 8%.90 ℃ of preceding bakings of 10 minutes are carried out to SU8 2000 glue in the intact back of spin coating.
6) adopt electron beam lithography or other high resolution lithography fabrication techniques templates, adopting distance between centers of tracks here is the template of 500nm, so the length of ZnO nanometer rods can connect source-drain electrode greater than 500nm.Will cover one deck anti-sticking layer before using template impression SU8 glue, that anti-sticking layer adopts is tri-methyl-chlorosilane (TMCS), and the moulding process temperature remains between 90 ℃-120 ℃.
7) after impression finishes, sample placed carry out etching in the reactive ion etching vacuum chamber.The base vacuum of vacuum chamber is 5 * 10
-3Pa at first adopts O
2Reactive ion etching is removed remaining SU8 2000 glue, and flow is 20sccm, and power is 40W, and pressure is 3pa, and the time is 30s-1min.Next adopt CHF
3SiO in the middle of the etching
2Layer, flow is 30sccm, and power is 50w, and pressure is 4pa, and the time is 10min.Because at CHF
3Reactive ion etching in SU8 for SiO
2Has certain selectivity, therefore through CHF
3After the reactive ion etching, not by the SiO of SU8 mask
2By the removal of selectivity.Through this step, figure transfer has arrived SiO
2On the layer.Adopt O at last
2The PMMA of reactive ion etching lower floor, flow are 20sccm, and power is 40W, and pressure is 3pa, and etch period is between 2min-3min.
8) adopt PVD sputter 50nm metal A l on the substrate that etching finishes, put into acetone then and carry out sonic oscillation, therefore PMMA glue can remove top SiO owing to be dissolved in acetone
2Layer, Al layer, and the Al layer that directly is deposited on the substrate is retained, as source-drain electrode, the figure of this layer Al is consistent with the figure on the primary template, as shown in Figure 9.
10) method of the oblique sputter of employing PVD at source-drain electrode one outgrowth ZnO inculating crystal layer, is promptly raised an angle one by one when sample is placed in sputter, only a side of source-drain electrode is carried out the sputter of ZnO inculating crystal layer.
11) growth there is the sample of inculating crystal layer put into reaction solution growing ZnO nanorod structure.
A) prescription of reaction solution is for to be dissolved in zinc nitrate and hexamethylenetetramine in the deionized water, and zinc nitrate concentration is 0.04mol/L, and hexamethylenetetramine concentration is 0.04mol/L.
B) reaction condition is 75 ℃ of water-bath heating, and the reaction time is 6 hours.
C) owing to the growth guide effect of inculating crystal layer, the ZnO nanometer rods will cross growth between source-drain electrode.
12) take out response sample and adopt deionized water rinsing, can obtain nano field-effect transistor of the present invention after drying up with nitrogen.
Claims (4)
1. a nano zinc oxide field-effect transistor comprises gate electrode, gate insulation layer, source-drain electrode and conductivity channel layer, and the channel layer that it is characterized in that described field-effect transistor is the ZnO nanorod structure of cross growth; Wherein gate electrode and source-drain electrode material thickness are 50nm-1um, and gate insulation layer thickness is 10nm-500nm, and the thickness of conductivity channel layer is 10nm-200nm.
2. according to the preparation method of the described nano zinc oxide field-effect transistor of claim 1, it is characterized in that concrete steps are:
(1) makes graphical gate electrode by photoetching corrosion or stripping technology;
(2) epitaxial growth gate insulation layer material on gate electrode;
(3) adopt photoetching corrosion or stripping technology on gate insulation layer, to make source-drain electrode;
(4) adopt oblique sputter of physical vapor deposition or the first deposit ZnO inculating crystal layer method of the plasma etching ZnO inculating crystal layer of on the sidewall of source-drain electrode, growing again;
(5) adopt solwution method growing ZnO nanorod on the ZnO inculating crystal layer, with the ZnO nanometer rods of cross growth as conductivity channel layer.
3. the preparation method of nano zinc oxide field-effect transistor according to claim 2, the method that it is characterized in that the oblique sputter of growth employing physical vapor deposition of ZnO inculating crystal layer, sample inclination 40～50 degree is carried out sputter, only at an outgrowth ZnO inculating crystal layer of source-drain electrode; Perhaps adopt physical vapor deposition, atomic layer deposition or sol-gal process at source-drain electrode surface large area deposition ZnO inculating crystal layer, by the method removal source-drain electrode top of plasma etching and the ZnO inculating crystal layer on the gate insulation layer, only keep the ZnO inculating crystal layer on the source-drain electrode sidewall then.
4. the preparation method of nano zinc oxide field-effect transistor according to claim 2, the concrete steps that it is characterized in that solwution method growing ZnO nanorod on the ZnO inculating crystal layer are: with zinc nitrate or zinc acetate, with hexamethylenetetramine, dimethyamine borane, any one is to be dissolved between 1: 1 to 3: 1 preparing reaction solution in the deionized water with mol ratio in ammoniacal liquor or the ethylenediamine, the concentration of zinc ion is 0.01～0.04mol/L in the solution, the substrate that will cover inculating crystal layer with support is vertically put into reaction solution, again the container that reaction solution and substrate are housed being put into water-bath heats, reaction temperature is at 50 ℃～100 ℃, growth time 0.5～6h, after finishing, reaction takes out sample, dry up with deionized water rinsing and with nitrogen, promptly make the ZnO nanometer rods.
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