CN113223968A - In-situ fluorine-doped metal oxide thin film, preparation method thereof and thin film transistor - Google Patents
In-situ fluorine-doped metal oxide thin film, preparation method thereof and thin film transistor Download PDFInfo
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- CN113223968A CN113223968A CN202110387776.3A CN202110387776A CN113223968A CN 113223968 A CN113223968 A CN 113223968A CN 202110387776 A CN202110387776 A CN 202110387776A CN 113223968 A CN113223968 A CN 113223968A
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- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L21/00—Processes or apparatus adapted for the manufacture or treatment of semiconductor or solid state devices or of parts thereof
- H01L21/02—Manufacture or treatment of semiconductor devices or of parts thereof
- H01L21/02104—Forming layers
- H01L21/02365—Forming inorganic semiconducting materials on a substrate
- H01L21/02518—Deposited layers
- H01L21/02521—Materials
- H01L21/02565—Oxide semiconducting materials not being Group 12/16 materials, e.g. ternary compounds
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L21/00—Processes or apparatus adapted for the manufacture or treatment of semiconductor or solid state devices or of parts thereof
- H01L21/02—Manufacture or treatment of semiconductor devices or of parts thereof
- H01L21/02104—Forming layers
- H01L21/02365—Forming inorganic semiconducting materials on a substrate
- H01L21/02612—Formation types
- H01L21/02617—Deposition types
- H01L21/02631—Physical deposition at reduced pressure, e.g. MBE, sputtering, evaporation
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L29/00—Semiconductor devices adapted for rectifying, amplifying, oscillating or switching, or capacitors or resistors with at least one potential-jump barrier or surface barrier, e.g. PN junction depletion layer or carrier concentration layer; Details of semiconductor bodies or of electrodes thereof ; Multistep manufacturing processes therefor
- H01L29/02—Semiconductor bodies ; Multistep manufacturing processes therefor
- H01L29/12—Semiconductor bodies ; Multistep manufacturing processes therefor characterised by the materials of which they are formed
- H01L29/24—Semiconductor bodies ; Multistep manufacturing processes therefor characterised by the materials of which they are formed including, apart from doping materials or other impurities, only semiconductor materials not provided for in groups H01L29/16, H01L29/18, H01L29/20, H01L29/22
- H01L29/247—Amorphous materials
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L29/00—Semiconductor devices adapted for rectifying, amplifying, oscillating or switching, or capacitors or resistors with at least one potential-jump barrier or surface barrier, e.g. PN junction depletion layer or carrier concentration layer; Details of semiconductor bodies or of electrodes thereof ; Multistep manufacturing processes therefor
- H01L29/66—Types of semiconductor device ; Multistep manufacturing processes therefor
- H01L29/68—Types of semiconductor device ; Multistep manufacturing processes therefor controllable by only the electric current supplied, or only the electric potential applied, to an electrode which does not carry the current to be rectified, amplified or switched
- H01L29/76—Unipolar devices, e.g. field effect transistors
- H01L29/772—Field effect transistors
- H01L29/78—Field effect transistors with field effect produced by an insulated gate
- H01L29/786—Thin film transistors, i.e. transistors with a channel being at least partly a thin film
- H01L29/7869—Thin film transistors, i.e. transistors with a channel being at least partly a thin film having a semiconductor body comprising an oxide semiconductor material, e.g. zinc oxide, copper aluminium oxide, cadmium stannate
- H01L29/78693—Thin film transistors, i.e. transistors with a channel being at least partly a thin film having a semiconductor body comprising an oxide semiconductor material, e.g. zinc oxide, copper aluminium oxide, cadmium stannate the semiconducting oxide being amorphous
Abstract
The invention discloses an in-situ fluorine-doped metal oxide thin film, a preparation method thereof and a thin film transistor, wherein the preparation method comprises the following steps: depositing a layer of film made of in-situ fluorine-doped tin-zinc oxide on a substrate; the film is an amorphous microstructure; during deposition, the temperature on the substrate is 20-200 ℃. The thin film transistor comprises an active layer, and the active layer is prepared by adopting the preparation method. The invention provides a simple preparation method of an in-situ fluorine-doped tin-zinc oxide film, provides a new preparation method for a thin film transistor, and has the advantages of environmental protection and low cost. The invention can be widely applied to the technical field of semiconductors.
Description
Technical Field
The invention relates to the technical field of semiconductors, in particular to an in-situ fluorine-doped metal oxide thin film, a preparation method thereof and a thin film transistor.
Background
In recent years, a zinc oxide-based semiconductor has attracted much attention as an active layer material of a thin film transistor. Among the zinc oxide-based multi-component oxide thin film transistors, the InGaZnO thin film transistor has proven to be a very market potential product due to its complete transparency, high mobility and large area application. However, elements of In and Ga are expensive rare metals. In addition, In is toxic and harmful to the environment. Therefore, the abundant and nontoxic tin-zinc oxide is considered as a substitute material of the InGaZnO semiconductor, and has superior cost and more environment-friendly performance.
The performance of in-situ fluorine doped metal oxide thin film transistors can be improved by doping with different types of metal cations or anions. Fluoride ion F-Radius of (2) and oxygen ion O2-Closely, the bond energy of the metal fluorine bond is higher than that of the metal oxygen bond, making F a suitable negative ion doping candidate. Meanwhile, fluorine in the oxide can replace oxygen in crystal lattice to generate free electrons due to valence electron difference between the fluorine and the oxygen. In addition, fluorine can occupy oxygen vacancy, so that hydrogen bonds, hydroxyl groups and dangling bonds on the interface are passivated, the defect state density is reduced, the mobility is increased, the subthreshold swing is reduced, and the stability is improved. The fluorine doping methods reported so far are: fluorinated passivation, solution process or CFx/NF3And (4) carrying out plasma treatment. The last method is reliable, the device performance is good, and research is sufficient.
Disclosure of Invention
In order to solve at least one of the technical problems in the prior art to a certain extent, the present invention provides an in-situ fluorine-doped metal oxide thin film, a method for preparing the same, and a thin film transistor.
The technical scheme adopted by the invention is as follows:
a method for preparing an in-situ fluorine-doped metal oxide film comprises the following steps:
depositing a layer of film made of in-situ fluorine-doped tin-zinc oxide on a substrate; the film is an amorphous microstructure;
during deposition, the temperature on the substrate is 20-200 ℃.
Further, the in-situ fluorine doped tin zinc oxide is obtained by:
obtained by simultaneously magnetron sputtering and evaporating two inorganic metal oxide source materials in an atmosphere of a mixture of argon (Ar) and oxygen (O2);
the two inorganic metal oxide source materials are fluorine-doped tin oxide and zinc oxide; or the like, or, alternatively,
the two inorganic metal oxide source materials are fluorine-doped zinc oxide and tin oxide.
Further, the preparation method of the in-situ fluorine-doped metal oxide film also comprises an annealing treatment step, and comprises the following steps:
the annealing is carried out in the air, and the temperature is 100-400 ℃.
Further, the substrate comprises a substrate, the substrate is a silicon wafer, glass or a flexible material covered with a buffer layer, and the buffer layer is made of silicon dioxide, silicon nitride or a combination of silicon dioxide and silicon nitride.
The other technical scheme adopted by the invention is as follows:
an in-situ fluorine-doped metal oxide film is prepared by the preparation method of the in-situ fluorine-doped metal oxide film.
The other technical scheme adopted by the invention is as follows:
a thin film transistor comprises an active layer, wherein the active layer is prepared by the preparation method of the in-situ fluorine-doped metal oxide thin film.
Furthermore, the thin film transistor also comprises a source electrode, a drain electrode, a grid dielectric layer, a passivation layer, a contact hole and a test electrode;
the first surface of the gate dielectric layer is connected with the grid electrode, and the second surface of the gate dielectric layer is connected with the first surface of the active layer;
the second surface of the active layer is respectively connected with the drain electrode and the source electrode;
the projection of the grid electrode on the active layer is overlapped with the projection of the drain electrode and the source electrode on the active layer.
Further, the source electrode, the drain electrode, the gate electrode and the test electrode are made of one of a metal material, a metal oxide material or an organic conductive material.
Further, the gate dielectric layer is made of an inorganic material or an organic dielectric material;
the inorganic material comprises aluminum oxide, silicon dioxide, silicon nitride, hafnium dioxide, yttrium oxide, tantalum oxide or lanthanum oxide;
the organic dielectric material includes Polymethylmethacrylate (PMMA) and Polystyrene (PS).
Further, the passivation layer is made of an inorganic material or an organic material, and the deposition temperature is 23-400 ℃. (ii) a
The inorganic material comprises silicon dioxide, zirconium dioxide, silicon nitride, scandium oxide or aluminum oxide;
the organic material includes PI, PET, OTES, ODPA, ODT, or photoresist.
The invention has the beneficial effects that: the invention provides a simple preparation method of an in-situ fluorine-doped tin-zinc oxide film, provides a new preparation method for a thin film transistor, and has the advantages of environmental protection and low cost.
Drawings
In order to more clearly illustrate the embodiments of the present invention or the technical solutions in the prior art, the following description is made on the drawings of the embodiments of the present invention or the related technical solutions in the prior art, and it should be understood that the drawings in the following description are only for convenience and clarity of describing some embodiments in the technical solutions of the present invention, and it is obvious for those skilled in the art that other drawings can be obtained according to these drawings without creative efforts.
FIG. 1 is a schematic cross-sectional view of an in-situ fluorine doped tin-zinc oxide film deposited on a substrate in accordance with an embodiment of the present invention;
FIG. 2 is an X-ray diffraction pattern of an in-situ fluorine-doped tin-zinc oxide thin film according to an embodiment of the present invention;
FIG. 3 is a high resolution TEM image of an in-situ fluorine-doped tin-zinc oxide film according to an embodiment of the present invention;
FIG. 4 is a graphical illustration of the optical transmission of an in-situ fluorine-doped tin-zinc oxide film in an embodiment of the invention;
FIG. 5 is a schematic diagram of the results of mass spectrometry of secondary ions of a sample of a thin film transistor in an embodiment of the present invention;
FIG. 6 is a schematic cross-sectional view of a TFT with an in-situ F-doped Sn-Zn oxide as an active layer according to an embodiment of the present invention;
FIG. 7 is a graph of a transfer curve for a thin film transistor in an embodiment of the present invention;
fig. 8 is a graph showing an output characteristic of a thin film transistor in the embodiment of the present invention;
fig. 9 is a transfer characteristic curve of a tft under a certain air humidity condition after applying a negative gate bias stress.
Reference numerals: 201-a substrate; 202-a gate; 203-a gate dielectric layer; 204-an active layer; 205A-source; 205B-drain.
Detailed Description
Reference will now be made in detail to embodiments of the present invention, examples of which are illustrated in the accompanying drawings, wherein like or similar reference numerals refer to the same or similar elements or elements having the same or similar function throughout. The embodiments described below with reference to the accompanying drawings are illustrative only for the purpose of explaining the present invention, and are not to be construed as limiting the present invention. The step numbers in the following embodiments are provided only for convenience of illustration, the order between the steps is not limited at all, and the execution order of each step in the embodiments can be adapted according to the understanding of those skilled in the art.
In the description of the present invention, it should be understood that the orientation or positional relationship referred to in the description of the orientation, such as the upper, lower, front, rear, left, right, etc., is based on the orientation or positional relationship shown in the drawings, and is only for convenience of description and simplification of description, and does not indicate or imply that the device or element referred to must have a specific orientation, be constructed and operated in a specific orientation, and thus, should not be construed as limiting the present invention.
In the description of the present invention, the meaning of a plurality of means is one or more, the meaning of a plurality of means is two or more, and larger, smaller, larger, etc. are understood as excluding the number, and larger, smaller, inner, etc. are understood as including the number. If the first and second are described for the purpose of distinguishing technical features, they are not to be understood as indicating or implying relative importance or implicitly indicating the number of technical features indicated or implicitly indicating the precedence of the technical features indicated.
In the description of the present invention, unless otherwise explicitly limited, terms such as arrangement, installation, connection and the like should be understood in a broad sense, and those skilled in the art can reasonably determine the specific meanings of the above terms in the present invention in combination with the specific contents of the technical solutions.
FIG. 1 is a schematic cross-sectional view of the in-situ fluorine-doped tin-zinc oxide film deposited on a substrate according to this embodiment. The substrate in the figure consists of three layers: the substrate 201 is glass, an Al-Nd alloy film is formed above the substrate through direct current sputtering to be used as a gate 202, and then aluminum oxide is prepared through an anodic oxidation method to be used as a gate dielectric layer 203. An in-situ fluorine-doped tin-zinc oxide thin film (i.e., active layer 204) was deposited by magnetron sputtering fluorine-doped tin oxide (FTO) targets (5 wt% F and 95 wt% SnO2) using a dc power supply and high purity polycrystalline zinc oxide (ZnO) targets using a radio frequency power supply simultaneously. Argon and oxygen are introduced into the reaction chamber, the flow ratio is 60:3, and the working pressure is 11.25 mTorr. The power density of the direct current power supply loaded on the FTO target material is about 1.3W/cm2The power density of the radio frequency power supply loaded on the polycrystalline ZnO target material is about 3.7W/cm2. And (3) taking out a sample after magnetron sputtering is carried out for 8 minutes, putting the sample on a 350 ℃ hot table, annealing the sample in air for 4 hours, and carrying out X-ray diffraction characterization, high-resolution transmission electron microscope analysis, optical transmittance analysis and secondary ion mass spectrometry on the sample. X-ray diffraction spectrum chart shown in FIG. 2Obviously, only the halo peak of the glass substrate exists in the spectrum, which shows that the prepared in-situ fluorine-doped tin-zinc oxide film has an amorphous structure. The high resolution TEM image shown in FIG. 3 can be obtained at 5X 5 μm2The surface Roughness (RMS) of the film in the range was 1.16nm, indicating that the in situ fluorine doped tin zinc oxide film had a smooth surface. The optical transmittance results of the film shown in fig. 4 show that the optical transmittance of the film in the visible light range of 400-800 nm changes from 85.4% to 96.6%, the average transmittance is 93.4%, and the optical band gap of the film material can be calculated to be 3.28eV according to the Tauc equation. The results of the secondary ion mass spectrometry test shown in fig. 5 indicate that fluorine has been successfully incorporated into the active layer of the co-sputtered sample and is uniformly distributed in the bulk.
Examples of bottom gate type structure thin film transistors based on in-situ fluorine doped tin-zinc oxide active layers are as follows:
fig. 6 is a cross-sectional structural view of a bottom gate thin film transistor based on in-situ fluorine-doped tin-zinc oxide as an active layer according to the present invention. The detailed preparation process is as follows:
1) cleaning the substrate 201: the substrate 201 used is corning glass with a thickness of 0.7 mm. Placing the substrate 201 on a cleaning frame, placing the substrate into a beaker, covering the mouth of the beaker with tinfoil, reserving an air outlet on the tinfoil, ultrasonically cleaning the substrate for 20min by using deionized water and isopropanol in sequence, and placing the whole beaker into a constant-temperature oven at 80 ℃ for drying treatment after cleaning.
2) Preparing a gate 202 and a gate dielectric layer 203: an Al — Nd alloy thin film with a thickness of 300nm is dc-sputtered on the cleaned glass substrate 201, and the gate 202 is completed by photolithography patterning. The gate dielectric layer 203 is prepared by an anodic oxidation method, and the specific preparation method comprises the following steps: a mixture of ethylene glycol and ammonium tartrate is first prepared as an electrolyte solution, and then the substrate 201 with the grid electrode 202 and the stainless steel plate are placed in the electrolyte solution as an anode and a cathode, respectively. The constant current is firstly applied to the two electrodes, so that the voltage between the two electrodes linearly increases along with the time, when the voltage value reaches 100V, the current is reduced to maintain the voltage constant until the current on the anode and the cathode is reduced to about 0.001mA/cm2, and the current application is stopped. An alumina layer with the thickness of 200nm is formed on the surface of the Al-Nd alloy on the substrate 201 and is used as a gate dielectric layer 203 of the thin film transistor.
3) Preparation of an oxide semiconductor layer (i.e., active layer 204): cleaning and drying the glass substrate 201 with the gate 202 and the gate dielectric layer 203 for later use according to the method in the step 1). The preparation of the oxide semiconductor layer is completed by adopting a co-sputtering method, and the preparation method comprises the following specific operations: the glass substrate 201 with the prepared gate 202 and the gate dielectric layer 203 is placed into a prepared metal mask for fixing, and under the set Ar/O2 gas flow (the Ar gas flow is set to be 60sccm, the O2 gas flow is set to be 3sccm), a radio frequency power supply magnetron sputtering polycrystalline ZnO target material and a direct current power supply magnetron sputtering FTO target material (5 wt% F and 95 wt% SnO2) are simultaneously used for depositing an in-situ fluorine-doped tin-zinc oxide thin film with the thickness of 50nm on the gate dielectric layer 203 to serve as a semiconductor layer. Wherein the power density of the ZnO target was set to about 1.3W/cm2 and the power density of the FTO target was set to about 3.7W/cm 2. The chamber pressure during sputtering was set at 11.25 mTorr.
4) Preparation of source 205A and drain 205B: the source 205A and the drain 205B are fabricated by a dc sputtering method. The glass substrate 201 with the semiconductor layer prepared is placed in a prepared metal mask for fixing, and an ITO (indium tin oxide) film with the thickness of 220nm is deposited as a source electrode 205A and a drain electrode 205B by magnetron sputtering of a polycrystalline ITO target material through a direct-current power supply. The power density of the ITO target during sputtering was set to about 3.7W/cm2, the chamber pressure was 3.75mTorr, the Ar gas flow was 50sccm, and the O2 gas flow was 5 sccm. After the patterning of the metal mask, the length and the width of the channel are respectively 300um and 300 um.
5) Annealing: the prepared device is placed on a hot bench, the temperature is respectively set to 350 ℃, and annealing is carried out in air for 4 h.
The prepared thin film transistor is subjected to electrical property and stability tests at room temperature by using an Agilent B1500 semiconductor parameter analyzer.
The device characteristics and beneficial effects are as follows:
to demonstrate that the in-situ fluorine-doped tin-zinc oxide thin film crystal prepared in this example is an active layerThe tubes showed superior electrical properties and thin film transistors in the examples in which in-situ fluorine-doped tin-zinc oxide was used as the active layer were tested. The transfer curve of the thin film transistor in the example is shown in fig. 7, and the output characteristic curve of the thin film transistor is shown in fig. 8, and it can be found that the electrical characteristics are superior. At a drain voltage (V) of 0.1Vds) Next, the field effect mobility (. mu.) was obtainedfe) Can reach 14.2cm2V-1s-1. Higher mobility benefits mainly from two aspects: on the one hand, since F atoms have similar ionic radii, bonding to metals is stronger, and therefore oxygen atoms in crystal lattices are easily substituted. Due to oxygen ions (O)2-) And fluorine ion (F)-) The difference in electrovalence is such that one fluorine to oxygen substitution will induce the generation of one free electron. While in the vicinity of the active layer and active layer/gate dielectric layer interface, the generated free electrons can fill a larger proportion of the acceptor-type traps. Therefore, trap-induced scattering of channel electrons is suppressed and carrier mobility is increased. On the other hand, among the numerous dangling bonds and hydrogen bonds with hydroxyl groups, the fluorine ion has the strongest electronegativity, and can directly passivate the hydrogen bonds and dangling bonds with hydroxyl groups near the interface. As can be seen from fig. 5, the fluorine peak appearing at the interface of the active layer/gate dielectric layer is beneficial to reducing the interface state density, inhibiting the capture effect on channel electrons, and thus improving the mobility. In addition, the on-off current ratio of the device is greater than 109The high on-off current ratio obtained is due to the increased number of free carriers resulting from the substitution of fluorine for oxygen ions. It is noted that the subthreshold swing is only 89mV/decade, since fluorine doping effectively reduces the interface defect density, which results in a reduction in SS. FIG. 8 shows the output characteristics of the fabricated thin film transistor, which can be seen at low VdsNo significant current crowding was observed in the area, indicating that a good ohmic contact was made between the electrode and the channel. Therefore, the fluorine doping effectively improves the conductivity, the mobility and the defect state density of the tin-zinc oxide, so that the corresponding thin film transistor also shows good characteristics even at a relatively low annealing temperature of 350 ℃, and is lower than the currently common process temperature of the tin-zinc oxide thin film transistor.
The stability of the fabricated thin film transistor under negative gate bias stress (NBS) is shown in fig. 9. VdsGate bias stress voltage V maintained at 5V, NBSgsSet to-20V for 3600 s. I of all TFTs without passivationds-VgsThe curves almost coincide during the NBS test, indicating that fluorine doping effectively improves NBS by replacing weakly bonded oxygen and passivating the interface defect traps.
As can be seen from the above, compared with the prior art, the technical solution of the present embodiment has the following beneficial effects:
(1) the embodiment carries out fluorine doping on the tin-zinc oxide by a simple and reliable means without a subsequent treatment process.
(2) The fluorine doping form is vacuum in-situ doping, so that the fluorine element can be more effectively ensured to be uniformly distributed in the tin-zinc oxide body, and the electrical property of the tin-zinc oxide can be more effectively improved.
(3) The thin film transistor using the in-situ fluorine-doped tin-zinc oxide thin film material of the embodiment as an active layer has excellent and uniform electrical properties such as mobility, subthreshold swing, on-off current ratio and the like.
(4) The thin film transistor of this embodiment has excellent stability.
In alternative embodiments, the functions/acts noted in the block diagrams may occur out of the order noted in the operational illustrations. For example, two blocks shown in succession may, in fact, be executed substantially concurrently, or the blocks may sometimes be executed in the reverse order, depending upon the functionality/acts involved. Furthermore, the embodiments presented and described in the flow charts of the present invention are provided by way of example in order to provide a more thorough understanding of the technology. The disclosed methods are not limited to the operations and logic flows presented herein. Alternative embodiments are contemplated in which the order of various operations is changed and in which sub-operations described as part of larger operations are performed independently.
Furthermore, although the present invention is described in the context of functional modules, it should be understood that, unless otherwise stated to the contrary, one or more of the described functions and/or features may be integrated in a single physical device and/or software module, or one or more functions and/or features may be implemented in a separate physical device or software module. It will also be appreciated that a detailed discussion of the actual implementation of each module is not necessary for an understanding of the present invention. Rather, the actual implementation of the various functional modules in the apparatus disclosed herein will be understood within the ordinary skill of an engineer, given the nature, function, and internal relationship of the modules. Accordingly, those skilled in the art can, using ordinary skill, practice the invention as set forth in the claims without undue experimentation. It is also to be understood that the specific concepts disclosed are merely illustrative of and not intended to limit the scope of the invention, which is defined by the appended claims and their full scope of equivalents.
The functions, if implemented in the form of software functional units and sold or used as a stand-alone product, may be stored in a computer readable storage medium. Based on such understanding, the technical solution of the present invention may be embodied in the form of a software product, which is stored in a storage medium and includes instructions for causing a computer device (which may be a personal computer, a server, or a network device) to execute all or part of the steps of the method according to the embodiments of the present invention. And the aforementioned storage medium includes: a U-disk, a removable hard disk, a Read-Only Memory (ROM), a Random Access Memory (RAM), a magnetic disk or an optical disk, and other various media capable of storing program codes.
The logic and/or steps represented in the flowcharts or otherwise described herein, e.g., an ordered listing of executable instructions that can be considered to implement logical functions, can be embodied in any computer-readable medium for use by or in connection with an instruction execution system, apparatus, or device, such as a computer-based system, processor-containing system, or other system that can fetch the instructions from the instruction execution system, apparatus, or device and execute the instructions. For the purposes of this description, a "computer-readable medium" can be any means that can contain, store, communicate, propagate, or transport the program for use by or in connection with the instruction execution system, apparatus, or device.
More specific examples (a non-exhaustive list) of the computer-readable medium would include the following: an electrical connection (electronic device) having one or more wires, a portable computer diskette (magnetic device), a Random Access Memory (RAM), a read-only memory (ROM), an erasable programmable read-only memory (EPROM or flash memory), an optical fiber device, and a portable compact disc read-only memory (CDROM). Additionally, the computer-readable medium could even be paper or another suitable medium upon which the program is printed, as the program can be electronically captured, via for instance optical scanning of the paper or other medium, then compiled, interpreted or otherwise processed in a suitable manner if necessary, and then stored in a computer memory.
It should be understood that portions of the present invention may be implemented in hardware, software, firmware, or a combination thereof. In the above embodiments, the various steps or methods may be implemented in software or firmware stored in memory and executed by a suitable instruction execution system. For example, if implemented in hardware, as in another embodiment, any one or combination of the following techniques, which are known in the art, may be used: a discrete logic circuit having a logic gate circuit for implementing a logic function on a data signal, an application specific integrated circuit having an appropriate combinational logic gate circuit, a Programmable Gate Array (PGA), a Field Programmable Gate Array (FPGA), or the like.
In the foregoing description of the specification, reference to the description of "one embodiment/example," "another embodiment/example," or "certain embodiments/examples," etc., means that a particular feature, structure, material, or characteristic described in connection with the embodiment or example is included in at least one embodiment or example of the invention. In this specification, schematic representations of the above terms do not necessarily refer to the same embodiment or example. Furthermore, the particular features, structures, materials, or characteristics described may be combined in any suitable manner in any one or more embodiments or examples.
While embodiments of the present invention have been shown and described, it will be understood by those of ordinary skill in the art that: various changes, modifications, substitutions and alterations can be made to the embodiments without departing from the principles and spirit of the invention, the scope of which is defined by the claims and their equivalents.
While the preferred embodiments of the present invention have been illustrated and described, it will be understood by those skilled in the art that various changes in form and details may be made therein without departing from the spirit and scope of the invention as defined by the appended claims.
Claims (10)
1. A preparation method of an in-situ fluorine-doped metal oxide film is characterized by comprising the following steps:
depositing a layer of film made of in-situ fluorine-doped tin-zinc oxide on a substrate; the film is an amorphous microstructure;
during deposition, the temperature on the substrate is 20-200 ℃.
2. The method of claim 1, wherein the in-situ fluorine-doped tin-zinc oxide is obtained by:
in the mixed atmosphere of argon and oxygen, the material is obtained by simultaneously carrying out magnetron sputtering and evaporation on two inorganic metal oxide source materials;
the two inorganic metal oxide source materials are fluorine-doped tin oxide and zinc oxide; or the like, or, alternatively,
the two inorganic metal oxide source materials are fluorine-doped zinc oxide and tin oxide.
3. The method of claim 1, further comprising an annealing step, comprising:
the annealing is carried out in the air, and the temperature is 100-400 ℃.
4. The method of claim 1, wherein the substrate comprises a silicon wafer, glass or a flexible material covered with a buffer layer, and the buffer layer is made of silicon dioxide, silicon nitride or a combination of silicon dioxide and silicon nitride.
5. An in-situ fluorine-doped metal oxide thin film, which is prepared by the method for preparing an in-situ fluorine-doped metal oxide thin film according to any one of claims 1 to 4.
6. A thin film transistor comprising an active layer formed by the method of forming an in-situ fluorine-doped metal oxide thin film according to any one of claims 1 to 4.
7. The thin film transistor according to claim 6, further comprising a source electrode, a drain electrode, a gate dielectric layer, a passivation layer, a contact hole, and a test electrode;
the grid electrode is connected with one surface of the grid dielectric layer, the other surface of the grid dielectric layer is connected with one surface of the active layer, and the other surface of the active layer is respectively connected with the drain electrode and the source electrode;
the projection of the grid electrode on the active layer is overlapped with the projection of the drain electrode and the source electrode on the active layer.
8. The thin film transistor of claim 7, wherein the source electrode, the drain electrode, the gate electrode and the test electrode are made of one of a metal material, a metal oxide material or an organic conductive material.
9. The thin film transistor of claim 7, wherein the gate dielectric layer is made of an inorganic material or an organic dielectric material;
the inorganic material comprises aluminum oxide, silicon dioxide, silicon nitride, hafnium dioxide, yttrium oxide, tantalum oxide or lanthanum oxide;
the organic dielectric material includes polymethyl methacrylate and polystyrene.
10. The thin film transistor according to claim 7, wherein the passivation layer is made of an inorganic material or an organic material;
the inorganic material comprises silicon dioxide, zirconium dioxide, silicon nitride, scandium oxide or aluminum oxide;
the organic material includes PI, PET, OTES, ODPA, ODT, or photoresist.
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