CN101326051A - Multilayer adhesive film for stacking chip - Google Patents

Multilayer adhesive film for stacking chip Download PDF

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Publication number
CN101326051A
CN101326051A CNA2005800522462A CN200580052246A CN101326051A CN 101326051 A CN101326051 A CN 101326051A CN A2005800522462 A CNA2005800522462 A CN A2005800522462A CN 200580052246 A CN200580052246 A CN 200580052246A CN 101326051 A CN101326051 A CN 101326051A
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CN
China
Prior art keywords
layer
chip
adhesive
described bonding
thermoplastic elastomer
Prior art date
Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
Pending
Application number
CNA2005800522462A
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Chinese (zh)
Inventor
陈华日
Current Assignee (The listed assignees may be inaccurate. Google has not performed a legal analysis and makes no representation or warranty as to the accuracy of the list.)
Henkel AG and Co KGaA
Original Assignee
National Starch and Chemical Investment Holding Corp
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Publication date
Application filed by National Starch and Chemical Investment Holding Corp filed Critical National Starch and Chemical Investment Holding Corp
Publication of CN101326051A publication Critical patent/CN101326051A/en
Pending legal-status Critical Current

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    • B—PERFORMING OPERATIONS; TRANSPORTING
    • B32—LAYERED PRODUCTS
    • B32B—LAYERED PRODUCTS, i.e. PRODUCTS BUILT-UP OF STRATA OF FLAT OR NON-FLAT, e.g. CELLULAR OR HONEYCOMB, FORM
    • B32B27/00—Layered products comprising a layer of synthetic resin
    • B32B27/06—Layered products comprising a layer of synthetic resin as the main or only constituent of a layer, which is next to another layer of the same or of a different material
    • B32B27/08—Layered products comprising a layer of synthetic resin as the main or only constituent of a layer, which is next to another layer of the same or of a different material of synthetic resin
    • B—PERFORMING OPERATIONS; TRANSPORTING
    • B32—LAYERED PRODUCTS
    • B32B—LAYERED PRODUCTS, i.e. PRODUCTS BUILT-UP OF STRATA OF FLAT OR NON-FLAT, e.g. CELLULAR OR HONEYCOMB, FORM
    • B32B27/00—Layered products comprising a layer of synthetic resin
    • B32B27/32—Layered products comprising a layer of synthetic resin comprising polyolefins
    • C—CHEMISTRY; METALLURGY
    • C08—ORGANIC MACROMOLECULAR COMPOUNDS; THEIR PREPARATION OR CHEMICAL WORKING-UP; COMPOSITIONS BASED THEREON
    • C08L—COMPOSITIONS OF MACROMOLECULAR COMPOUNDS
    • C08L23/00—Compositions of homopolymers or copolymers of unsaturated aliphatic hydrocarbons having only one carbon-to-carbon double bond; Compositions of derivatives of such polymers
    • C08L23/26—Compositions of homopolymers or copolymers of unsaturated aliphatic hydrocarbons having only one carbon-to-carbon double bond; Compositions of derivatives of such polymers modified by chemical after-treatment
    • C08L23/36—Compositions of homopolymers or copolymers of unsaturated aliphatic hydrocarbons having only one carbon-to-carbon double bond; Compositions of derivatives of such polymers modified by chemical after-treatment by reaction with compounds containing nitrogen, e.g. by nitration
    • C—CHEMISTRY; METALLURGY
    • C09—DYES; PAINTS; POLISHES; NATURAL RESINS; ADHESIVES; COMPOSITIONS NOT OTHERWISE PROVIDED FOR; APPLICATIONS OF MATERIALS NOT OTHERWISE PROVIDED FOR
    • C09J—ADHESIVES; NON-MECHANICAL ASPECTS OF ADHESIVE PROCESSES IN GENERAL; ADHESIVE PROCESSES NOT PROVIDED FOR ELSEWHERE; USE OF MATERIALS AS ADHESIVES
    • C09J109/00—Adhesives based on homopolymers or copolymers of conjugated diene hydrocarbons
    • C09J109/02—Copolymers with acrylonitrile
    • C—CHEMISTRY; METALLURGY
    • C09—DYES; PAINTS; POLISHES; NATURAL RESINS; ADHESIVES; COMPOSITIONS NOT OTHERWISE PROVIDED FOR; APPLICATIONS OF MATERIALS NOT OTHERWISE PROVIDED FOR
    • C09J—ADHESIVES; NON-MECHANICAL ASPECTS OF ADHESIVE PROCESSES IN GENERAL; ADHESIVE PROCESSES NOT PROVIDED FOR ELSEWHERE; USE OF MATERIALS AS ADHESIVES
    • C09J123/00—Adhesives based on homopolymers or copolymers of unsaturated aliphatic hydrocarbons having only one carbon-to-carbon double bond; Adhesives based on derivatives of such polymers
    • C09J123/26—Adhesives based on homopolymers or copolymers of unsaturated aliphatic hydrocarbons having only one carbon-to-carbon double bond; Adhesives based on derivatives of such polymers modified by chemical after-treatment
    • C09J123/36—Adhesives based on homopolymers or copolymers of unsaturated aliphatic hydrocarbons having only one carbon-to-carbon double bond; Adhesives based on derivatives of such polymers modified by chemical after-treatment by reaction with compounds containing nitrogen, e.g. by nitration
    • C—CHEMISTRY; METALLURGY
    • C09—DYES; PAINTS; POLISHES; NATURAL RESINS; ADHESIVES; COMPOSITIONS NOT OTHERWISE PROVIDED FOR; APPLICATIONS OF MATERIALS NOT OTHERWISE PROVIDED FOR
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    • C09J7/00—Adhesives in the form of films or foils
    • C09J7/10—Adhesives in the form of films or foils without carriers
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    • C08L—COMPOSITIONS OF MACROMOLECULAR COMPOUNDS
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    • C08L2666/02—Organic macromolecular compounds, natural resins, waxes or and bituminous materials
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    • C09J2203/326—Applications of adhesives in processes or use of adhesives in the form of films or foils for bonding electronic components such as wafers, chips or semiconductors
    • C—CHEMISTRY; METALLURGY
    • C09—DYES; PAINTS; POLISHES; NATURAL RESINS; ADHESIVES; COMPOSITIONS NOT OTHERWISE PROVIDED FOR; APPLICATIONS OF MATERIALS NOT OTHERWISE PROVIDED FOR
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    • C09J2301/00—Additional features of adhesives in the form of films or foils
    • C09J2301/20—Additional features of adhesives in the form of films or foils characterized by the structural features of the adhesive itself
    • C09J2301/208—Additional features of adhesives in the form of films or foils characterized by the structural features of the adhesive itself the adhesive layer being constituted by at least two or more adjacent or superposed adhesive layers, e.g. multilayer adhesive
    • C—CHEMISTRY; METALLURGY
    • C09—DYES; PAINTS; POLISHES; NATURAL RESINS; ADHESIVES; COMPOSITIONS NOT OTHERWISE PROVIDED FOR; APPLICATIONS OF MATERIALS NOT OTHERWISE PROVIDED FOR
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    • C09J2409/00—Presence of diene rubber
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    • Y10T428/00—Stock material or miscellaneous articles
    • Y10T428/31504—Composite [nonstructural laminate]
    • Y—GENERAL TAGGING OF NEW TECHNOLOGICAL DEVELOPMENTS; GENERAL TAGGING OF CROSS-SECTIONAL TECHNOLOGIES SPANNING OVER SEVERAL SECTIONS OF THE IPC; TECHNICAL SUBJECTS COVERED BY FORMER USPC CROSS-REFERENCE ART COLLECTIONS [XRACs] AND DIGESTS
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Abstract

An adhesive film for die stacking at least two neighboring semiconductor dies containing metal wire bonds, comprises (a) Layer-1 adhesive, which comes in contact with the first semiconductor die and is capable of flowing around the metal wire bonds of that first semiconductor die at die attach temperatures, and (b) Layer-2 adhesive, which comes in contact with the second semiconductor die, in which Layer-2 adhesive comprises 30-85 weight % thermoplastic rubber with a glass transition temperature of less than 25 DEG C and a weight average molecular weight of greater than 100,000.

Description

Be used for chip-stacked multilayer adhesive film
[0001] invention field
[0002] the present invention relates to contain the multilayer adhesive film of thermoplastic elastomer and compositions of thermosetting resin, in particular as the bonding film that piles up in the semiconductor packages chips.
[0003] background of invention
[0004] recent progress aspect semiconductor packages has caused the development of " piling up " encapsulation, and in stacked package, two or more semiconductor chips are installed on the top of each other in single semiconductor packages.Thisly chip-stackedly can in the zonule, improve functionally, allow overall semiconductor packages with the reduced size manufacturing.Typically, using paste or bonding film to guarantee between two semiconductor chips in lead-in wire bonding, molding, reflow soldering and the package integrity between the final operating period.
[0005] there are various methods with the stacking construction assembled package.Each chip comprises a plurality of electric terminals, and metal wire normally gold thread extends to electric terminals on the substrate from it.In stacked package, must avoid contacting and avoiding damaging adjacent chips with adjacent chips from the wire bond of a chip.In one approach, chip has the size (from bottom to top) that reduces continuously so that hang down the outside of the wire bond of chip in any upper chip zone.This pyramid structure has limitation, because all wire bonds must carry out at the outward flange of chip, and has reduced functional on each continuous littler chip.Another assemble method relates between the chip that piles up and uses pad, with contacting between the wire bond that prevents low chip and next chip bottom surface.This allows each stacked chips to have identical size, but has limited reducing of encapsulation vertical dimension.
[0006] known insulating barrier and the adhesive layer of using between two chips of stacking construction is so that providing adhesion and providing insulation between the lower surface of wire bond that hangs down chip and higher chip between two chips.Yet if insulating barrier flows in the process that upper chip connects too easily, the wire bond of bottom chip can penetrate insulating barrier, causes contact with top chip, wire bond damage and possible short circuit.Therefore, crucial is that insulating barrier has sufficiently high viscosity to prevent this penetrating under chip connection temperature.
[0007] in addition, in semi-conductor industry, in the structure of stacked package, there is special challenge towards the persistent trend of thinner chip.In a kind of building method, before cutting operation, insulating barrier is laminated to wafer.If use LED reverse mounting type---typically thick less than 0.127mm, then---typically 40 ℃ to 50 ℃---wafer distortions of laminated film at low temperatures to prevent from may cause owing to the difference of thermal coefficient of expansion between wafer and the film.Insulating barrier is must be enough soft soaking (wet-out) wafer surface, and suitably adheres under these low lamination temperature.
[0008]---typically about 100 ℃ to 150 ℃---also necessary down tolerance plastic deformations that insulating barrier connects temperature at chip, thus it can make the wire insulation of top chip and bottom chip.Under low lamination temperature, soak and connect these conflicting requirements that tolerate plastic deformation under the temperature and may be difficult to realize at chip.
[0009] in addition, under being connected temperature, chip has low viscosity with the adhesive layer that contacts than the low level chip.If viscosity is too high, adhesive will be not can not flow and ballonet or space will be trapped fully around wire bond.Air in these spaces may expand in subsequently treatment step such as reflow soldering then, causes wire bond to break potentially and fails.
[0010] summary of the invention
[0011] the present invention is the bonding film that is used at two adjacent semiconductor chips deposition between---normally those comprise the semiconductor chip of metallic bond zygonema---in stacked structure.Use as this specification and claim, this structure will be called as chip-stacked (die stack) or chip-stacked (die stacking).Therefore, the present invention is used for chip-stacked at least two bonding films that contain the adjacent semiconductor chip of metal wire bond (wire bond), this bonding film comprises: (a) layer-1 adhesive, it contacts with first semiconductor chip, and can connect the metal wire bond that centers on this first semiconductor chip under the temperature at chip flows, (b) layer-2 adhesive, it contacts with second semiconductor chip, its middle level-2 adhesive contains the thermoplastic elastomer of 30-85wt.%, this thermoplastic elastomer has glass transition temperature and 100, the 000 above weight average molecular weight below 25 ℃.
[0012] connecting under the temperature at chip---typically in 100 ℃ to 150 ℃ scope, layer-1 must have suitably flowing around wire bond to this temperature.Adhesive must encapsulate wire bond fully and not have the space, for subsequently treatment step provides enough protections.Yet it must not have too much flowing, because this will cause adhesive to outflow between the chip.Layer-1 composition should be fit to concrete application and manufacturing environment, between the 000P, so that flow for linear sealing provides fully, avoids simultaneously outflowing between the chip in 100P and 100 but typically require to connect under the temperature range of viscosities at chip.
[0013] layer-2 must fully soften and soak so that---typically about 40 ℃ to 50 ℃---laminations at low temperatures.In order to reach this performance, layer-2 must be included between the 30-85wt.%, have the thermoplastic elastomer of the glass transition temperature (Tg) below 25 ℃.Low Tg allows film to soften under low laminating temperature and adheres on the wafer.In addition, thermoplastic elastomer must have the weight average molecular weight (Mw) more than 100,000, so that it will resist plastic deformation when the line with first chip contacts.Like this, layer-2 will provide the insulation of expectation between the lower surface of the line of first chip and second chip, prevent the damage of short circuit and wire bond.
[0014] connect under the temperature at chip, be typically 100 to 150 ℃, the viscosity of layer-1 must be lower than the viscosity of layer-2.If the viscosity of layer-2 is lower than the viscosity of layer-1, make layer-1 adhesive can will cause the outside of layer-2 adhesive flow around the temperature and pressure that wire bond flows to the bonding zone, wire bond is penetrated arrive second chip, perhaps the both is taken place.
[0015] layer-1 must be that at least 15 μ m are thick, so that exist enough adhesives to flow and seal them around wire bond.If-1 to 15 μ m is thin for layer, then film adhesive can not be filled down, and the silk thread on first chip may be damaged at silk thread (wire) fully.
[0016] detailed Description Of The Invention
[0017] layer-1 can be any adhesive composition, and it connects under the temperature fully mobile at chip, be enough to fully seal the silk thread of first chip and do not catch air, but it can not flow out two spaces between the chip.---be typically 100 ℃ to 150 ℃---in chip connection temperature and have 100 to 100 down, the composition of 000P viscosity will provide required and flow.Layer-2 comprises between the 30-85wt.%, have Tg below 25 ℃ and the thermoplastic elastomer of 100,000 above Mw.Binding compositions must with the chip surface bonding, and can adhere to mutually or be attached on the tertiary membrane or carrier that places between two-layer.Must be lower than the viscosity of layer-2 in the viscosity of chip connection temperature lower floor-1.
[0018] although can use any adhesive that meets top standard, a suitable formulation will contain (a) thermoplastic elastomer for layer-1 or layer-2, (b) thermosetting resin, (c) curing agent, and (d) filler.Embodiment hereto, typical weight percentage ranges is 30-85wt.% thermoplastic elastomer, 15-70wt.% thermosetting resin, 0.05-40wt.% curing agent and 0.1-30wt.% filler.Curing agent is initiation, increases or promote any material or the combination of materials of adhesive curing, and comprises promoter, catalyst, initator and curing agent.
[0019] in layer-1 or layer-2 further embodiment, thermosetting resin will be epoxy resin or solid epoxy, such as bisphenol A epoxide resin (bisphenol A epoxy), bisphenol F epoxy resin (bisphenol F epoxy), line style phenolic aldehyde ring resin (phenol novolacepoxy) or cresol-novolac epoxy resin (cresol novolac epoxy).These epoxy resin can be from Shell Chemicals and Dainippon Ink and Chemicals, and Inc. is commercial to be obtained.
[0020] in layer-1 or layer-2 further embodiment, can use the combination of thermosetting resin.Except epoxy resin, other thermosetting resin that is fit to layer-1 or layer-2 comprises maleimide, acrylate, vinyl ethers and gathers (butadiene) that they have at least one two key in molecule.
[0021] example of suitable maleimide resin includes, but not limited to the commercial Dainippon of deriving from Ink and Chemical, those of Inc..Other suitable maleimide resin is selected from:
[0022]
Figure A20058005224600071
C wherein 36The straight chain or the side chain (having or do not have loop section) of 36 carbon atoms of expression;
[0023]
Figure A20058005224600072
[0024]
Figure A20058005224600073
[0025]
Figure A20058005224600081
[0026]
Figure A20058005224600082
[0027]
Figure A20058005224600083
[0028]
Figure A20058005224600084
And
[0029]
Figure A20058005224600085
Wherein n is 1 to 5.
[0030] example of suitable acrylate comprises, but be not limited to, can be from KyoeishaChemical Co., (methyl) butyl acrylate that LTD obtains, (methyl) isobutyl acrylate, (methyl) 2-EHA, (methyl) isodecyl acrylate, (methyl) acrylic acid dodecyl ester, (methyl) alkyl acrylate, (methyl) acrylic acid tridecane ester, (methyl) n-stearyla crylate, (methyl) cyclohexyl acrylate, (methyl) tetrahydrofurfuryl acrylate, (methyl) acrylic acid 2-phenoxy ethyl, (methyl) isobornyl acrylate, 1,4-butanediol two (methyl) acrylate, 1,6-hexylene glycol two (methyl) acrylate, 1,9-nonanediol two (methyl) acrylate, perfluoro capryl ethyl (methyl) acrylate, 1,10-decanediol two (methyl) acrylate, nonyl phenol gathers propoxylate (methyl) acrylate and poly-amoxy thing tetrahydrofurfuryl acrylate; Can be from SartomerCompany, the polybutadiene polyurethane dimethylacrylate that Inc obtains (CN302, NTX6513) and the polybutadiene dimethylacrylate (CN301, NTX6039, PRO6270); Can be from Negami Chemical Industries Co., the polycarbonate polyurethane diacrylate (ArtResin UN9200A) that LTD obtains; From Radcure Specialities, the propylene acidifying aliphatic urethane oligomer (Ebecryl 230,264,265,270,284,4830,4833,4834,4835,4866,4881,4883,8402,8800-20R, 8803,8804) that Inc obtains; Can be from Radcure Specialities, the polyester acrylic ester oligomer (Ebecryl657,770,810,830,1657,1810,1830) that Inc. obtains; And can be from Sartomer Company, the Epocryl (CN104,111,112,115,116,117,118,119,120,124,136) that Inc. obtains.
[0031] in one embodiment, acrylate poly-(butadiene) that be selected from isobornyl acrylate (isobornyl acrylate), isobornyl methacrylate (isobornyl methacrylate), lauryl acrylate (lauryl acrylate), lauryl methacrylate (laurylmethacrylate), have poly-(butadiene) of acrylate functionalities and have methacrylate functionality.
[0032] example of suitable vinyl ether resin includes but not limited to the cyclohexanedimethanol divinyl ether (cyclohenanedimethanol divinylether) that can obtain from International Speciality Products (ISP), dodecyl vinyl (dodecylvinylether), cyclohexyl vinyl ether (cyclohexyl vinylether), 2-ethylhexyl vinyl ethers (2-ethylhexyl vinylether), dipropylene glycol divinyl ether (dipropyleneglycol divinylether), hexylene glycol divinyl ether (hexanedioldivinylether), octadecyl vinyl ether (octadecylvinylether), and butanediol divinyl ether (butandiol divinylether); From Sigma-Aldrich, the Vectomer 4010,4020,4030,4040,4051,4210,4220,4230,4060,5015 that Inc. obtains.
[0033] example of suitable polybutadiene comprises polybutadiene, epoxidized polybutadiene, maleic acid (polybutadiene), propylene acidifying poly-(butadiene), BS, and hycar.Commercially available material comprises can be from SartomerCompany, the homopolymers butadiene (Ricon130,131,134,142,150,152,153,154,156,157, P30D) that Inc obtains; From obtainable butadiene of Sartomer Company Inc. and cinnamic random copolymer (Ricon 100,181,184); Can be from SartomerCompany, poly-(butadiene) (Ricon130MA8,130MA13,130MA20,131MA5,131MA10,131MA17,131MA20, the 156MA17) of the maleinization (maleinized) that Inc. obtains; Can be from poly-(butadiene) (CN302, NTX6513, CN301, NTX6039, PRO6270, Ricacryl 3100, the Ricacryl 3500) of the propylene acidifying that Sartomer Inc. obtains; Can be from poly-(butadiene) (Polybd 600,605) of also oxidation that Sartomer Company.Inc. obtains and can be from Daicel Chemical Industries, the Epolead PB3600 of Ltd acquisition; And can be from the acrylonitrile and the butadiene copolymer (Hycar CTBN series, ATBN series, VTBN series and ETBN series) of Hanse Chemical acquisition.
[0034] for layer-1 or layer-2, thermoplastic elastomer will exist with the amount of 30-85wt.%; Suitable thermoplastic elastomer comprises butyronitrile (CTBN)/epoxide adduct, the ACM of carboxy blocking, the butadiene rubber of ethenyl blocking, and acrylonitrile-butadiene rubber (NBR).The CTBN epoxide adduct is by about 20-80wt%CTBN and about 20-80wt% diglycidyl ether bisphenol-A: bisphenol-A epoxy (DGEBA) is formed.The weight average molecular weight range that CTBN will have is about 100 to 10,000, and the DGEBA equivalent that will have (perhaps the weight of every epoxy, g/ epoxy) scope is about 500 to 5,000.It is about 500 to 5 that final adduct will have, the equivalent of 000g/ epoxy and at 150 ℃ down 5,000 to 100, the melt viscosity of 000cP.Multiple CTBN material can obtain from Noveon Inc., and multiple bisphenol-A epoxy material can be from Dainippon Ink and Chemicals, and Inc. and Shell Chemicals. obtain.NBR is made up of the acrylonitrile of 20-50wt% scope and the butadiene of 50-80wt% scope, and has the glass transition temperature (Tg) and 100,000 to 1,000 from-40 ℃ to+20 ℃, 000 weight average molecular weight (Mw).Such NBR rubber can obtain from ZeonCorporation. commercial.
[0035] curing agent of layer-1 or layer-2 will exist with 0.5 to 40% amount; Proper curing agents comprises phenoplasts (phenolics), aromatic diamine (aromatic diamines), dicyandiamide (dicyandiamides), peroxide (peroxides), amine, imidazoles, tertiary amine and polyamide.Suitable phenoplasts are commercial can be from Schenectady international, and Inc. obtains.Suitable aromatic diamine is a primary amine, and comprises DADPS and MDA, and it can obtain from Sigma-Aldrich Co. is commercial.Suitable dicyandiamide can be from SKWChemicals, and Inc. obtains.Suitable polyamide can be from Air Products and Chemicals, and Inc. is commercial to be obtained.Suitable imidazoles can be from Air Products and Chemicals, and Inc. is commercial to be obtained.Suitable tertiary amine can obtain from Sigma-Aldrich Co..Suitable peroxide comprises benzoyl peroxide, tert-butyl peroxide, lauroyl peroxide, cumene hydroperoxide, cyclohexanone peroxide, crosses butyl caprylate (butyl peroctoates) and dicumyl peroxide.Other proper curing agents comprises azo-compound, such as 2,2 '-azo two (2-methyl-propionitrile) (2,2 '-azobis (2-methyl-propanenitrile)), 2,2 '-azo two (2-methyl-butyronitrile) (2,2 '-azobis (2-methyl-butanenitrile)), 4,4-azo two (4-cyanopentanoic acid (4,4-azobis (4-cyanovaleric acid)), 1,1 '-azo two (cyclohexanenitrile) (1,1 '-azobis (cyclohexanecarbonitrile)), and 2,2 '-azodiisobutyronitrile (2,2 '-azobisisobutyronitrile).
[0036] filler of layer-1 or layer-2 will have the granularity of 0.1 to 10 μ m and will exist with 0.1 to 30wt.% amount.Filler selection will depend on concrete encapsulating structure.Filler will be non-conductive when adhesive layer contacts with wire bond.The example of suitable non-conductive filler comprises that aluminium oxide, aluminium hydroxide, silica, vermiculite, mica, wollastonite, calcium carbonate, titanium dioxide, sand, glass, barium sulfate and halogenated vinyl polymer are such as tetrafluoroethene (tetrafluorotheylene), trifluoro-ethylene, 1,1-difluoroethylene, PVF, vinylidene chloride and vinyl chloride.
[0037] also can add other additive, such as adhesion promoter with type known in the art and amount.
[0038] embodiment
[0039] embodiment 1, film A, and the component below (pbw) mixes by weight in enough methyl ethyl ketones (MEK) is to make cream, prepared layer 1 (being used for bonding first semiconductor chip):
The CTBN that 10pbw is epoxide modified
3.8pbw cresol-novolac epoxy resin
0.8pbw aromatic diamine
0.08pbw amine catalyst
0.2pbw silane coupling agent
0.4pbw silica filler
[0040] this paste is applied on the polyester film of the thick antiseized coating of 50 μ m, and descends dry 5 minutes to make the layer 1 of the thick film A of 60 μ m at 100 ℃.Under 100 ℃, 120 ℃ and 150 ℃, use the parallel plate type flow graph of 25mm diameter, and the rising test of the dynamic temperature under 10.0 rads/s and 5.0 ℃/min climbing speed (dynamic temperatureramp test), the viscosity of testing this rete.
[0041] component below (pbw) mixes by weight in enough MEK is to make cream, prepared layer 2 (being used for bonding second semiconductor chip):
8pbw acrylonitrile-butadiene rubber, its Mw be 360,000 and Tg be-24 ℃
2pbw 4,4 '-BMI-diphenyl-methane (4,4 '-bismaleimido-diphenylmethane)
The adduct of 3pbw tristane-dimethanol and 3-isopropenyl-dimethylbenzyl based isocyanate (m-TMI), it has following structure:
1.5pbw the butadiene rubber of ethenyl blocking
0.7pbw peroxide initiator
0.7pbw 3-methacryloxypropyl trimethoxy silane
The 1pbw silica filler
[0042] this paste is applied on the polyester film of the thick antiseized coating of 50 μ m, and descends dry 5 minutes to make the layer 2 of the thick film A of 25 μ m at 100 ℃.Under 100 ℃, 120 ℃ and 150 ℃, use the parallel plate type flow graph of 25mm diameter, and the rising of the dynamic temperature under 10.0 rads/s and 5.0 ℃/min climbing speed test, the viscosity of testing this rete.
[0043] under 80 ℃ and 0.21MPa with two layers of the mutual lamination of laminating machine, 2 tunics of generation are film A.Then at 50 ℃ and 0.21MPa lower laminate film A and wafer, layer 2 contacts with this wafer.The wafer of lamination is divided into the single chip of two different sizes, and makes two not isostructures (i) and stacked package body (ii).
[0044] in structure (i), in encapsulation, use the silver-plated copper lead frame of line, 80 mu m bonded pad spacings (bond pad pitch) and 40 to 70 μ m coil heights with 25 μ m diameters, 8 * 8mm chip is in turn laminated to together.Chip is connected under 150 ℃, 15N adhesion and carries out.
[0045] in constructing (ii), in encapsulation, use the BT substrate of line, 80 mu m bonded pad spacings and 50 to 70 μ m coil heights with 25 μ m diameters, 7.5 * 7.5mm chip is in turn laminated to together.Chip is connected under 150 ℃, 20N adhesion and carries out.
[0046] the stacked package body of Chan Shenging is by crosscut, and uses between light microscopy silk and second chip and the first chip wire bond and contact space on every side.
[0047] embodiment 2, film B.Component below (pbw) mixes by weight in enough MEK is to make cream, prepared layer 1 (being used for bonding first semiconductor chip):
The CTBN that 10pbw is epoxide modified
3.8pbw cresol-novolac epoxy resin
0.8pbw aromatic diamine
0.08pbw amine catalyst
0.2pbw silane coupling agent
0.4pbw silica filler
[0048] this paste is applied on the polyester film of the thick antiseized coating of 50 μ m, and descends dry 5 minutes to make the layer 1 of the thick film B of 40 μ m at 100 ℃.Under 100 ℃, 120 ℃ and 150 ℃, use the parallel plate type flow graph of 25mm diameter, and the rising of the dynamic temperature under 10.0 rads/s and 5.0 ℃/min climbing speed test, the viscosity of testing this rete.
[0049] component below (pbw) mixes by weight in enough MEK is to make cream, prepared layer 2 (being used for bonding second semiconductor chip):
9pbw acrylonitrile-butadiene rubber, its Mw be 360,000 and Tg be-24 ℃
4pbw 4,4 '-BMI-diphenyl-methane
0.7pbw 3-methacryloxypropyl trimethoxy silane
0.4pbw peroxide initiator
0.3pbw silica filler
[0050] this paste is applied on the polyester film of the thick antiseized coating of 50 μ m, and descends dry 5 minutes to make the layer 2 of the thick film B of 20 μ m at 100 ℃.Under 100 ℃, 120 ℃ and 150 ℃, use the parallel plate type flow graph of 25mm diameter, and the rising of the dynamic temperature under 10.0 rads/s and 5.0 ℃/min climbing speed test, the viscosity of testing this rete.
[0051] under 80 ℃ and 0.21MPa with two layers of the mutual lamination of laminating machine, 2 tunics of generation are film B.Then at 50 ℃ and 0.21MPa lower laminate film B and wafer, layer 2 contacts with this wafer.
[0052] use the BT substrate of line, 80 mu m bonded pad spacings and 42 to 52 μ m coil heights with 25 μ m diameters in encapsulation, 8.8 * 10mm chip is in turn laminated to together.Chip is connected under 130 ℃, 10N adhesion and carried out 1 second.The stacked package body that produces is by crosscut, and uses between light microscopy line and second chip and the first chip wire bond and contact space on every side.
[0053] embodiment 3, film C.Component below (pbw) mixes by weight in enough MEK is come prepared layer 1 (being used for bonding first semiconductor chip) to make cream:
The CTBN that 10pbw is epoxide modified
3.8pbw it is two-A epoxy resin
0.5pbw aromatic diamine
0.08pbw amine catalyst
0.2pbw silane coupling agent
0.4pbw silica material
[0054] this paste is applied on the polyester film of the thick antiseized coating of 50 μ m, and descends dry 5 minutes to make the layer 1 of the thick film C of 40 μ m at 100 ℃.Under 100 ℃, 120 ℃ and 150 ℃, use the parallel plate type flow graph of 25mm diameter, and the rising of the dynamic temperature under 10.0 rads/s and 5.0 ℃/min climbing speed test, the viscosity of testing this rete.
[0055] component below (pbw) mixes by weight in enough MEK is come prepared layer 2 (being used for bonding second semiconductor chip) to make cream:
9pbw acrylonitrile-butadiene rubber, its Mw be 360,000 and Tg be-24 ℃
4pbw 4,4 '-BMI-diphenyl-methane
0.7pbw 3-methacryloxypropyl trimethoxy silane
0.4pbw peroxide initiator
0.3pbw silica filler
[0056] this paste is applied on the polyester film of the thick antiseized coating of 50 μ m, and descends dry 5 minutes to make the layer 2 of the thick film C of 20 μ m at 100 ℃.Under 100 ℃, 120 ℃ and 150 ℃, use the parallel plate type flow graph of 25mm diameter, and the rising of the dynamic temperature under 10.0 rads/s and 5.0 ℃/min climbing speed test, the viscosity of testing this rete.
[0057] under 80 ℃ and 0.21MPa with two layers of the mutual lamination of laminating machine, 2 tunics of generation are film C.Then at 50 ℃ and 0.21MPa lower laminate film C and wafer, layer 2 contacts with this wafer.
[0058] use the BT substrate of line, 80 mu m bonded pad spacings and 52 to 62 μ m coil heights with 25 μ m diameters in encapsulation, 8.8 * 10mm chip is in turn laminated to together.Chip is connected under 140 ℃, 20N adhesion and carried out 2 seconds.The stacked package body that produces is by crosscut, and uses the space on every side that contacts between light microscopy line and second chip and the first chip wire bond.
[0059] comparative example 4, comparative film D and E.Use polyimide based insulation layer to make comparative film.As each contrast rete 1 (being used for bonding first semiconductor chip) of preparation as described in the embodiment 1 film A.
[0060] component below (pbw) mixes by is by weight come prepared layer 2 (being used for bonding second semiconductor chip):
Contrast D, layer 2:
Siltem STM 1500 siloxane polyetherimide resins, Tg are that 168 ℃ and weight average molecular weight are about 11,000:30pbw
Dioxolanes solvent: 170pbw;
Contrast E, layer 2:
Siltem STM 1500 siloxane polyetherimide resins, Tg are that 168 ℃ and weight average molecular weight are about 11,000:30pbw
Dioxolanes solvent: 170pbw;
The butadiene rubber of Hycar 1300x43VTBNX ethenyl blocking: 10pbw
Peroxide initiator: 0.2pbw
[0061] these pastes are coated to respectively on the polyester film of the thick antiseized coating of 50 μ m, and 100 ℃ down dry 4 minutes with the layer 2 of making the thick comparative film D of 25 μ m and the layer 2 of comparative film E.For each sample, under 100 ℃, 120 ℃ and 150 ℃, use the parallel plate type flow graph of 25mm diameter, and the rising of the dynamic temperature under 10.0 rads/s and 5.0 ℃/min climbing speed test, the viscosity of testing this rete.
[0062] for each comparative film, with two layers of the mutual lamination of laminating machine (layer 1 and layer 2), 2 tunics of generation promptly are respectively comparative film D and comparative film E under 80 ℃ and 0.21MPa.Then under 50 ℃, 100 ℃ and 150 ℃ and 0.21MPa, each comparative film of lamination and three silicon wafers independently respectively, layers 2 contact with this wafer.The test layer press mold is to the room temperature peel strength of wafer then, and wherein the wide sample of 10mm is stretched with 50mm/min under 90 ° of angles.
[0063] embodiment 1,2,3 and 4 result are summarized in the table 1,2 and 3.
[0064] table 1: embodiment 1,2,3 and 4 film character.
Film Viscosity under 100 ℃, P Viscosity under 120 ℃, P Viscosity under 150 ℃, P
A 1 layer 2 on layer 8,619 167,000 3,326 159,000 831 557,000
B 1 layer 2 on layer 8,619 101,000 3,326 95,490 831 59,710
C 1 layer 2 on layer 19,440 101,000 9,412 95,490 2,600 59,710
Contrast-D 1 layer 2 on layer 8,619 ＞1,000,000 3,326 ＞1,000,000 831 ＞1,000,000
Contrast-E 1 layer 2 on layer 8,619 7,464 3,326 6,400 831 5,985
[0065] table 2: embodiment 1,2,3 and 4 peel strength result.
Film 50 ℃ of laminations 100 ℃ of laminations 150 ℃ of laminations
A 2.1N/cm Do not survey Do not survey
B 1.4N/cm Do not survey Do not survey
C 1.3N/cm Do not survey Do not survey
Contrast-D 0N/cm 0N/cm 0N/cm
Contrast-E 0.01N/cm 0.02N/cm 0.2N/cm
[0066] table 3: embodiment 1,2 and 3 light microscope result.
Film Packaging body The space that is observed Line contacts second chip
A (i) (ii) BT of lead frame Do not have Do not have
B BT Do not have No
C BT Do not have No
[0067] embodiment of the invention all has low viscous relatively layer 1---and can flow around silk thread, have full-bodied layer 2 in case principal vertical line penetrates and arrive second chip.The comparative film E that contains polyimide based insulation layer has very high viscosity, and it will be prevented also that principal vertical line is penetrated into and reach second chip.Yet, shown in the peel strength result, even this film can not be laminated to silicon wafer under 150 ℃ of laminating temperatures.Comparative film F, it flows and wetability in order to improve in lamination process based on the polyimide base that is added with small amount of ethylene base end-blocking butadiene, has lower insulating barrier viscosity.Yet, even comparative film F can not reach the appreciable peel strength with wafer under 150 ℃ of laminating temperatures.Can infer, under higher laminating temperature---may be higher than the Tg of polyimides, this film may reach acceptable peel strength.Yet the cutting belt that the typical case uses is to be made by polyolefin, and it begins distortion at about 100 ℃, and this is unacceptable for manufacturing purpose.Further, may cause the wafer excessive distortion in high temperature laminated like this, especially when wafer is very thin.
[0068] the stacked package body by film manufacturing of the present invention has all shown around the moving good desirable properties of linear flow, does not observe the space.The light microscope result shows that wire bond does not contact second chip, and this shows that insulating barrier prevents to penetrate in the chip connection procedure.Do not use comparative film assembled package body, reason is that they can not be laminated to wafer.

Claims (11)

1. be used for the bonding film of chip-stacked at least two adjacent semiconductor chips that contain the metal wire bond, described bonding film comprises:
(a) layer-1 adhesive, it contact with first semiconductor chip, and can chip connect under the temperature metal wire bond that centers on this first semiconductor chip mobile and
(b) layer-2 adhesive, it contacts with second semiconductor chip, its middle level-2 adhesive contains the thermoplastic elastomer of 30-85wt.%, described thermoplastic elastomer have below 25 ℃ glass transition temperature and greater than 100,000 weight average molecular weight.
2. the described bonding film of claim 1, wherein said layer-1 adhesive comprises:
(a) thermoplastic elastomer,
(b) thermosetting resin,
(c) curing agent, and
(d) filler.
3. the described bonding film of claim 2, wherein said layer-1 adhesive comprises:
(a) 30-85wt.% thermoplastic elastomer,
(b) 15-70wt.% thermosetting resin,
(c) 0.05-40wt.% curing agent, and
(d) 0.1-30wt.% filler.
4. claim 1,2 or 3 described bonding films, wherein said layer-1 is thick at least 15 μ m.
5. claim 2 or 3 described bonding films, wherein said thermoplastic elastomer is the butyronitrile/epoxy adduct of carboxy blocking.
6. claim 2 or 3 described bonding films, wherein said thermosetting resin is an epoxy resin.
7. the described bonding film of claim 1, wherein said layer-2 adhesive comprise:
(a) thermoplastic elastomer,
(b) thermosetting resin,
(c) curing agent, and
(d) filler.
8. the described bonding film of claim 7, wherein said layer-2 adhesive comprise:
(a) 30-85wt.% thermoplastic elastomer,
(b) 15-70wt.% thermosetting resin,
(c) 0.05-40wt.% curing agent, and
(d) 0.1-30wt.% filler.
9. claim 7 or 8 described bonding films, wherein said thermoplastic elastomer is an acrylonitrile-butadiene rubber.
10. claim 7 or 8 described bonding films, wherein said thermosetting resin is a maleimide.
11. claim 7 or 8 described bonding films, wherein said thermosetting resin is a styrene oligomer.
CNA2005800522462A 2005-12-15 2005-12-15 Multilayer adhesive film for stacking chip Pending CN101326051A (en)

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Cited By (3)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
CN107353837A (en) * 2016-04-28 2017-11-17 利诺士尖端材料有限公司 Non-conductive cohesive film composition and the non-conductive adhesive film for including it
CN107540797A (en) * 2016-06-24 2018-01-05 利诺士尖端材料有限公司 Non-conductive cohesive film composition and the non-conductive adhesive film for including it
CN110943041A (en) * 2019-12-16 2020-03-31 山东砚鼎电子科技有限公司 Semiconductor structure with side surface led out, manufacturing method thereof and stacking structure

Families Citing this family (6)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
WO2009050207A1 (en) * 2007-10-15 2009-04-23 Interuniversitair Microelectronica Centrum Vzw Method for producing electrical interconnects and devices made thereof
US7821107B2 (en) 2008-04-22 2010-10-26 Micron Technology, Inc. Die stacking with an annular via having a recessed socket
JP5879675B2 (en) * 2010-06-17 2016-03-08 日立化成株式会社 Adhesive film for semiconductor, wiring board for semiconductor mounting, semiconductor device, and adhesive composition
KR102116987B1 (en) 2013-10-15 2020-05-29 삼성전자 주식회사 Semiconductor package
EP3187556B1 (en) * 2014-08-29 2023-08-30 Furukawa Electric Co., Ltd. Adhesive film
KR102012789B1 (en) 2016-03-28 2019-08-21 주식회사 엘지화학 Semiconductor device

Family Cites Families (14)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
US3971865A (en) * 1975-04-09 1976-07-27 Sony Corporation Adhesive resin composition
US5026752A (en) * 1987-04-03 1991-06-25 Minnesota Mining And Manufacturing Company Amorphous-polypropylene-based hot melt adhesive
CN1089356C (en) * 1995-04-04 2002-08-21 日立化成工业株式会社 Adhesive, adhesive film and adhesive-backed metal foll
JP3787889B2 (en) * 1996-05-09 2006-06-21 日立化成工業株式会社 Multilayer wiring board and manufacturing method thereof
US6034331A (en) * 1996-07-23 2000-03-07 Hitachi Chemical Company, Ltd. Connection sheet and electrode connection structure for electrically interconnecting electrodes facing each other, and method using the connection sheet
JPH10178060A (en) * 1996-10-15 1998-06-30 Toray Ind Inc Board for connecting semiconductor integrated circuit and part and semiconductor device constituting the same
JPH10178068A (en) * 1996-10-15 1998-06-30 Toray Ind Inc Substrate for connecting semiconductor integrated circuit, and part and semiconductor device for constituting the same
JP3978623B2 (en) * 1997-06-10 2007-09-19 日立化成工業株式会社 Multilayer wiring board
JP2000068295A (en) * 1998-08-25 2000-03-03 Tomoegawa Paper Co Ltd Adhesive film for electronic component
KR20010090354A (en) * 1999-03-26 2001-10-18 가나이 쓰토무 Semiconductor module and mounting method for same
KR20030075860A (en) * 2002-03-21 2003-09-26 삼성전자주식회사 Structure for stacking semiconductor chip and stacking method
JP2004161828A (en) * 2002-11-11 2004-06-10 Nippon Steel Chem Co Ltd Resin composition for forming film, and film adhesive
JP2005247953A (en) * 2004-03-03 2005-09-15 Toray Ind Inc Adhesive composition for semiconductor and adhesive sheet for semiconductor using the same
US20050227064A1 (en) * 2004-04-01 2005-10-13 Hwail Jin Dicing die bonding film

Cited By (5)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
CN107353837A (en) * 2016-04-28 2017-11-17 利诺士尖端材料有限公司 Non-conductive cohesive film composition and the non-conductive adhesive film for including it
CN107353837B (en) * 2016-04-28 2020-12-29 利诺士尖端材料有限公司 Composition for non-conductive adhesive film and non-conductive adhesive film comprising same
CN107540797A (en) * 2016-06-24 2018-01-05 利诺士尖端材料有限公司 Non-conductive cohesive film composition and the non-conductive adhesive film for including it
CN107540797B (en) * 2016-06-24 2020-12-15 利诺士尖端材料有限公司 Composition for non-conductive adhesive film and non-conductive adhesive film comprising same
CN110943041A (en) * 2019-12-16 2020-03-31 山东砚鼎电子科技有限公司 Semiconductor structure with side surface led out, manufacturing method thereof and stacking structure

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US20090311520A1 (en) 2009-12-17
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EP1960189A1 (en) 2008-08-27
EP1960189A4 (en) 2009-01-28

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