CN101320718A - 半导体装置、电子系统、存储卡以及使引线绝缘的方法 - Google Patents

半导体装置、电子系统、存储卡以及使引线绝缘的方法 Download PDF

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Publication number
CN101320718A
CN101320718A CNA2008100986369A CN200810098636A CN101320718A CN 101320718 A CN101320718 A CN 101320718A CN A2008100986369 A CNA2008100986369 A CN A2008100986369A CN 200810098636 A CN200810098636 A CN 200810098636A CN 101320718 A CN101320718 A CN 101320718A
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China
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lead
wire
chip
separation insulation
insulation system
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CNA2008100986369A
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English (en)
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刘哲准
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Samsung Electronics Co Ltd
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Samsung Electronics Co Ltd
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Publication of CN101320718A publication Critical patent/CN101320718A/zh
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Abstract

本发明公开了一种半导体装置、电子系统、存储卡以及使引线绝缘的方法。包括在集成电路装置中的引线可具有形成在其上的分隔绝缘结构。引线上的分隔绝缘结构可围绕引线相应的剖面部分，所述分隔绝缘结构可用作“隔开件”以防止直接相邻的引线(或其他相邻组件)短路在一起，从而允许减少与引线(或其他组件)之间的节距减小的装置有关的缺陷。

Description

半导体装置、电子系统、存储卡以及使引线绝缘的方法
本申请要求于2007年6月4日提交到韩国知识产权局的第10-2007-0054639号韩国专利申请的优先权，该申请的公开通过引用被包含于此。
技术领域
本发明总体上涉及半导体领域，更具体地说，涉及半导体布线及相关方法。
背景技术
随着电路变得更高度地集成，缩短了用于在芯片和基底(在其上安装有芯片)之间传导信号的引线之间的间距(即，节距(pitch))。可从装置封装件外部提供信号或将信号提供到装置封装件外部，所述装置封装件容纳有和基底一起的集成电路芯片。
作为封装工艺的一部分，可用成型工艺(molding process)处理基底(具有安装在其上的芯片和连接二者的引线)，所述成型工艺用于将集成电路和基底包封在装置封装件中。由于引线之间的节距可以是小的，所以成形工艺会导致一些引线彼此接触(或与基底接触)，这会产生电短路。这种现象有时被称为“引线偏移(wire sweeping)”。
一种解决引线偏移的方法是在制造集成电路装置的过程中用电介质材料涂覆引线。在例如JP 2004-282021和第6822340号美国专利中描述了引线的涂覆。
发明内容
根据本发明的实施例可提供包括在引线上的分隔绝缘结构的半导体装置及其形成方法。根据这些实施例，包括在集成电路装置中的引线可具有形成在其上的分隔绝缘结构。引线上的分隔绝缘结构可围绕引线相应的剖面部分，所述分隔绝缘结构可用作“隔开件(stand off)”以防止直接相邻的引线(或其他相邻组件)短路在一起，从而允许减少与引线(或其他组件)之间节距减小的装置有关的缺陷。在根据本发明的一些实施例中，分隔绝缘结构可具有基本呈球形的外部形状。在根据本发明的其他实施例中，分隔绝缘结构可具有基本呈椭圆形的外部形状。在根据本发明的另外的实施例中，分隔绝缘结构之间的间距可基本相等，此外，引线的位于分隔绝缘结构之间的暴露部分也可基本相等。
附图说明
图1是示意性地表示在根据本发明的一些实施例中的包括安装在基底上并通过引线彼此电连接的芯片的集成电路装置的剖视图，所述引线具有在其上形成的分隔绝缘结构。
图2是示意性地表示在根据本发明的一些实施例中的包括在集成电路基底上堆叠两个不同大小的芯片的集成电路装置的剖视图，所述芯片通过引线电连接到基底，所述引线具有在其上形成的分隔绝缘结构。
图3是示意性地表示在根据本发明的一些实施例中的包括在集成电路基底上堆叠的相同尺寸的芯片的集成电路装置的剖视图，所述芯片通过引线电连接到基底，所述引线具有在其上形成的分隔绝缘结构。
图4是示意性地示出在根据本发明的一些实施例中的包括在集成电路基底上堆叠的两个相同尺寸的芯片的集成电路装置的剖视图，所述芯片通过引线电结合到基底，所述引线具有在其上形成的分隔绝缘结构。
图5是示意性地表示在根据本发明的一些实施例中的包括在集成电路基底上堆叠的两个相同尺寸的芯片的集成电路装置的剖视图，所述芯片通过引线电连接到基底，所述引线具有在其上的分隔绝缘结构。
图6是在根据本发明的一些实施例中的将芯片电连接到集成电路基底并具有在其上形成的分隔绝缘结构的引线的照片。
图7是图6中所示的引线的近视图，更具体地示出了在根据本发明一些实施例中的分隔绝缘结构。
图8示意性地表示了在根据本发明的一些实施例中具有基本上呈球形剖面的分隔绝缘结构。
图9示意性地表示了在根据本发明的一些实施例中的具有基本上呈椭圆形剖面的分隔绝缘结构。
图10A和图10B是在根据本发明的一些实施例中的分隔绝缘结构的具有基本上呈环形的球形和椭圆形剖面的剖视图。
图11示意性地表示了在根据本发明的一些实施例中的多组引线，其中，与组之间的间距相比，特定组中的每条引线被狭窄地彼此分开，并具有形成在该组中的引线上的分隔绝缘结构。
图12示意性地表示了在根据本发明的一些实施例中的彼此基本等间距地分开的引线，所述引线具有围绕每条引线的剖面部分的单个分隔绝缘结构。
图13示意性地表示了在根据本发明的一些实施例中的引线，所述引线具有在其上形成的分隔绝缘结构，使得形成在直接相邻的引线上的分隔绝缘结构形成之字形图案。
图14示意性地表示了在根据本发明的一些实施例中的包括其中具有引线的存储装置的存储卡，所述引线具有在其上形成的分隔绝缘结构。
图15示意性地表示了在根据本发明的一些实施例中的包括具有形成在其中的引线的存储装置的电子系统，所述引线具有在其上形成的分隔绝缘结构。
图16至图18是示意性地示出在根据本发明的一些实施例中在其中所包括的引线上形成分隔绝缘结构的方法的剖视图。
图19是示出在根据本发明的一些实施例中的与能用来提供分隔绝缘结构的绝缘材料有关的示例性值的表格。
图20是在根据本发明的一些实施例中的具有在其上形成的分隔绝缘结构的引线的照片。
图21是在根据本发明的一些实施例中的图20的具有在其上形成的分隔绝缘结构的引线的更详细的视图。
图22是在根据本发明的一些实施例中的在集成电路装置中具有在其上形成的分隔绝缘结构的引线的剖面的照片。
图23是示出在根据本发明的一些实施例中的分隔绝缘结构的外部形状的照片。
图24是示出在根据本发明的一些实施例中的分隔绝缘结构的外部形状的照片。
具体实施方式
下面将参照附图更充分地描述本发明，在附图中以示例的方式示出了本发明的实施例。然而，本发明可以以许多不同的形式来实施，而且不应理解为局限于在此阐述的示例实施例。相反，提供这些示例实施例使得本公开将是彻底和完全的，且将把本发明的范围充分地传达给本领域的技术人员。此外，在此描述和示出的每个实施例也包括其导电类型互补的实施例。
应该理解的是，当元件被称为“连接到”、“结合到”或“响应于”(和/或其变化形式)另一元件时，该元件可以直接连接到、直接结合到或直接响应于另一元件，或者可以存在中间元件。相反，当元件被称为“直接连接到”、“直接结合到”或“直接响应于”(和/或其变化形式)另一元件时，不存在中间元件。相同的标号始终表示相同的元件。如在这里使用的，术语“和/或”包括一个或多个相关所列项的任意组合和所有组合，并且可以被缩写为“/”。
应该理解的是，尽管在这里可使用术语第一、第二、第三等来描述不同的元件、组件、区域、层和/或部分，但是这些元件、组件、区域、层和/或部分不应该受这些术语的限制。这些术语仅是用来将一个元件、组件、区域、层或部分与另一个元件、组件、区域、层或部分区分开来。因此，在不脱离本发明的教导的情况下，下面讨论的第一元件、组件、区域、层或部分可被命名为第二元件、组件、区域、层或部分。
这里使用的术语仅为了描述特定实施例的目的，而不意图限制本发明。如这里所使用的，除非上下文另外明确指出，否则单数形式也意图包括复数形式。还应理解的是，当在本说明书中使用术语“包含”和/或“包括”(和/或其变化形式)时，说明存在所述特征、整体、步骤、操作、元件和/或组件，但不排除存在或附加一个或多个其它特征、整体、步骤、操作、元件、组件和/或它们的组。相反，当在本说明书中使用术语“由...组成”(和/或其变化形式)时，说明确定数量的特征、整体、步骤、操作、元件和/或组件，并排除附加的特征、整体、步骤、操作、元件和/或组件。
除非另有定义，否则这里使用的所有术语(包括技术术语和科学术语)具有与本发明所属领域的普通技术人员所通常理解的意思相同的意思。还应理解的是，除非这里明确定义，否则术语(例如在通用的字典中定义的术语)应该被解释为具有与相关领域的环境中它们的意思一致的意思，而不将理想地或者过于正式地解释它们的意思。
如在这里更具体地描述的，在根据本发明的一些实施例中，包括在集成电路装置中的引线可具有形成在其上的分隔绝缘结构。在引线上的分隔绝缘结构可围绕引线相应的剖面部分，所述分隔绝缘结构可以起“隔开件”的作用，以防止直接相邻的引线(或其他相邻组件)短路到一起，从而使得与引线(或其他组件)之间节距减小的装置有关的缺陷减少。在根据本发明的一些实施例中，所述分隔绝缘结构可具有基本呈球形的外部形状。在根据本发明的其他实施例中，所述分隔绝缘结构可具有基本呈椭圆形的外部形状。在根据本发明的另外的实施例中，所述分隔绝缘结构之间的间距可以基本相等，此外，引线的位于所述分隔绝缘结构之间的暴露部分也可以基本相等。
在根据本发明的另外的实施例中，分隔绝缘结构可以被形成在沿着水平方向直接相邻和/或沿着垂直方向直接相邻的引线上。例如，在一些集成电路装置中，在基底上堆叠多个芯片，使得在垂直方向上在引线之间存在短路(即，结合到上或下芯片的引线之间电短路)的可能，以及在水平方向上在连接到同一芯片的引线之间存在电短路的可能。
在根据本发明的另外的实施例中，所述分隔绝缘结构可以有助于防止引线与芯片或基底自身之间的电短路。例如，在有时称为“凸点反向工艺(bumpreverse process)”的一个工艺中，引线先被键合到基底，然后再被键合到芯片。由于引线键合的顺序和/或引线横向地键合到芯片所降低的高度，所以该工艺会缩短引线和芯片表面之间的间距。因此，在根据本发明的一些实施例中，分隔绝缘结构可作为引线和芯片表面和/或基底自身之间的隔开件，以减少电短路。
在根据本发明的另外的实施例中，可以通过预处理引线以降低引线和将被沉积在引线上的材料之间的表面张力来形成所述分隔绝缘结构。一旦完成预处理，就可以围绕引线的相应的剖面部分形成分隔绝缘结构。在根据本发明的一些实施例中，预处理工艺可包括利用氩或氮应用等离子处理。在根据本发明的另外的实施例中，可以用湿法工艺提供预处理。
在根据本发明的另外的实施例中，可以通过向引线应用绝缘液体来提供分隔绝缘结构，所述绝缘液体包含聚合物，所述聚合物包含基体树脂、粘合力增强剂、硬化催化剂和溶剂。在根据本发明的一些实施例中，所述基体树脂可以为聚酰亚胺树脂、丙烯酸树脂、环氧树脂或硅树脂。在根据本发明的一些实施例中，所述溶剂可以是重量小于聚合物的大约50％的有机溶剂。
在根据本发明的另外的实施例中，形成所述分隔绝缘结构后，可以进行包括在大约200℃加热分隔绝缘结构的硬化处理。在根据本发明的其他实施例中，形成所述分隔绝缘结构后，可以进行利用紫外线辐射的硬化处理。
在根据本发明的另外的实施例中，形成所述分隔绝缘结构后，可以进行两个单独的硬化处理，第一硬化处理使所用的溶剂挥发以形成多个分隔绝缘结构。第二硬化处理可在第一硬化处理后提供，第二硬化处理可包括提供环氧成型化合物的步骤，所述环氧成型化合物用于形成被应用到分隔绝缘结构上方的成型材料。在根据本发明的一些实施例中，可在大于大约70℃的温度下提供上述第一硬化处理。
图1是示意性地表示了集成电路装置100的剖面图，集成电路装置100包括安装在基底110上的集成电路芯片120(下文中称为“芯片”)。具体来说，通过粘合剂115将芯片120安装到基底110上。通过将芯片120电结合到基底110的多条引线140将电信号传导到芯片120和/或将电信号从芯片120传导出。虽然没有明确地示出，但是引线140可结合到在基底110和/或芯片120上的焊盘(或类似部件)。
用成型材料(molding material)150包封集成电路装置，所述成型材料150可以固定其中的结构并为集成电路装置100提供结构支撑。集成电路装置100还可包括附着到基底110的相对于芯片120的相对侧的焊料凸点160。焊料凸点160可允许集成电路装置100被安装到其他结构，这些结构也可以依次被进一步封装，以用于后面的使用。应该理解的是，焊料凸点160不是例如一些电子装置(例如存储卡等)的必要元件，焊料凸点160可具有板型接线端以将芯片120结合到主机系统。
可在引线140上形成多个分隔绝缘结构145以围绕引线140相应的剖面部分。引线的位于多个分隔绝缘结构145之间的部分可在分隔绝缘结构之外(这里有时称为“暴露”)。如图6和图7所示，在引线上的分隔绝缘结构145可作为隔离件或隔开件，以降低直接相邻的引线140之间短路的可能性。更具体地说，形成在直接相邻的引线140上的分隔绝缘结构145可作为隔开件，从而如果(由于诸如引线细)用于封装集成电路装置100的成型工艺引起一些引线140偏斜并接触直接相邻的引线，则分隔绝缘结构145可起绝缘隔开结构的作用，以防止直接相邻引线之间的电短路，从而使得高度集成电路装置100的可靠性提高，尤其是使得具有紧密间隔的引线和/或很细的引线的高度集成电路装置的可靠性提高。
图2是示意性地表示了在其上包括堆叠的第一芯片120和第二芯片130的集成电路装置100的剖面图，其中，第二芯片130比第一芯片120小。如在图2中进一步示出的，第一芯片120和第二芯片130通过粘合剂层125彼此结合。第一组引线140a将第一芯片120电连接到基底110。第二组引线140b将第二芯片130电连接到基底110。在第一组引线140a上形成多个第一分隔绝缘结构145a以围绕第一组引线140a的剖面部分。在第二组引线140b上形成多个第二分隔绝缘结构145b以围绕第二组引线140b的剖面部分。
因此，第一组引线140a和第二组引线140b在垂直方向彼此直接相邻，使得如果没有在第一组引线140a和第二组引线140b上分别形成分隔绝缘结构145a和145b，那么成型材料150的形成会导致直接相邻的引线偏斜，这会导致电短路。此外，可根据被称为“凸点正向(bump-forward)”键合工艺的工艺来形成第一组引线140a和第二组引线140b，在该键合工艺中，先将引线键合到芯片120或130，然后再将引线键合到基底110。因此，形成在第一组引线140a/第二组引线140b上的分隔绝缘结构145a/145b可防止直接相邻的引线(包括水平直接相邻的引线和垂直直接相邻的引线)之间电短路。此外，分隔绝缘结构145a/145b还可降低引线会与第一芯片120和第二芯片130的表面短路的可能性。
图3是示意性地表示了包括分别形成在基底110上的第一芯片220和第二芯片230的集成电路装置200的剖面图，其中第一芯片220和第二芯片230的尺寸大致相同。如在图3中进一步示出的，第一组引线240a将第一芯片220电连接到基底110，第二组引线240b将第二芯片230电连接到基底110。根据图3，第一组引线240a/第二组引线240b包括在其上形成的相应的多个分隔绝缘结构245a/245b，以通过作为这些引线之间的隔开件来降低直接相邻(垂直和/或水平)的引线之间电短路的可能性。如在图3中进一步示出的，第一芯片220和第二芯片230通过介入层221而隔开，介入层221可作为垂直隔开件以分开第一和第二芯片，以允许将芯片电结合到基底110的相应的引线有足够的空间键合到芯片220和230的相应的焊盘。此外，也可以由如上参照图2所述的凸点正向工艺来提供图3中示出的键合工艺。
图4是示意性地表示了集成电路装置300的剖面图，集成电路装置300包括堆叠在基底110上并被粘合剂层325分开的第一芯片320和第二芯片330。如在图4中进一步示出的，通过第一组引线340a将第一芯片320电连接到基底110，第一组引线340a具有在其上形成的多个分隔绝缘结构345a。第二组引线340b将第二芯片330电连接到基底110。第二组引线340b具有在其上形成的可降低直接相邻的引线(垂直直接相邻或水平直接相邻)之间电短路的可能性的相应的多个分隔绝缘结构345b。
应该理解的是，形成在引线上的分隔绝缘结构345a/345b还可降低相应的引线在芯片的相应表面的外边缘与芯片的相应表面短路的可能性。。具体来讲，图4中示出的键合方法采用被称为“凸点反向”键合工艺的工艺，在该工艺中，先将引线键合到基底110上的焊盘343，然后将引线键合到相应的芯片320或330的外边缘处的焊盘。还应理解的是，该凸点反向工艺可增大引线会与第一芯片320和第二芯片330的相应的表面短路的可能性(在不包括分隔绝缘结构345a/345b的情况下)。
图5是示意性地表示了包括堆叠在基底410上的第一芯片420和第二芯片430的集成电路装置400的剖面图。如在图5中进一步示出的，第一组引线440a将基底410电结合到位于第一芯片420的下表面上的键合焊盘442。如图5中所示，键合焊盘442位于第一芯片420的下表面的中心部分。此外，第二组引线440b将基底410电结合到位于第二芯片430上表面的位于中心的键合焊盘450。
如在图5中进一步示出的，第一组引线440a和第二组引线440b具有在其上形成的相应的多个分隔绝缘结构445a/445b。如在此描述的，分隔绝缘结构445a/445b可围绕引线440a/440b的相应的剖面部分，在引线440a/440b上形成分隔绝缘结构445a/445b以作为隔开件，使得引线不容易与直接相邻(垂直和/或水平)的引线或其他表面短路。应该理解的是，也可以根据如上参照图4描述的凸点反向工艺来形成图5中所示的键合布置。如上参照图6和图7所述，在引线上的分隔绝缘结构445可作为隔离件或隔开件，以降低直接相邻的引线440之间短路的可能性。
图8示意性地表示了形成在引线840上以围绕引线840相应的剖面部分的分隔绝缘结构845。具体来讲，分隔绝缘结构845的外部形状可基本为球形。此外，如图10A所示，分隔绝缘结构845的沿线846截取的剖面图示出了该剖面基本具有环形形状。具体来讲，图10A中示出的分隔绝缘结构845的外部形状847和内部形状848基本呈圆形并且是同轴地形成的。此外，被内部形状848包围的内部区域通常被具有分隔绝缘结构845的引线840所占据，分隔绝缘结构845在对应于沿线846截取的剖面的部分围绕引线840。此外，位于分隔绝缘结构845边缘附近的剖面849的直径比沿中心部分截取的剖面的直径小。分隔绝缘结构845的剖面中心处的厚度可以相等。
图9示意性地表示了在根据本发明一些实施例中形成在引线940上的分隔绝缘结构945，其中分隔绝缘结构945的形状基本为椭圆形。具体来讲，形成在引线940上的椭圆形的分隔绝缘结构945围绕引线940相应的剖面部分，以提供如图9中所示的基本呈椭圆环的形状。此外，如图10B所示，沿其中心部分946截取的椭圆环形的分隔绝缘结构945的剖面的直径比沿边缘部分947附近截取的椭圆环形的分隔绝缘结构945的剖面的直径大。分隔绝缘结构945的剖面中心处的厚度可以相等。
图11示意性地表示了在根据本发明的一些实施例中的多个紧密间隔的引线1141，各个紧密间隔的引线1141与直接相邻的多个引线之间的间距更宽，并具有在其上形成的多个分隔绝缘结构1145。应该理解的是，在根据本发明的一些实施例中虽然只示出了在紧密间隔的引线1141上形成单个分隔绝缘结构1145，但是也可形成另外的绝缘结构。
根据图11，紧密间隔的引线1141彼此间隔得足够近，使得在紧密间隔的引线1141上共同形成分隔绝缘结构1145。此外，一组紧密间隔的引线1141限定了与直接相邻的一组紧密间隔的引线1141间隔更宽的一组引线。因此，形成在直接相邻的紧密间隔的引线1141的组上的分隔绝缘结构1145与其他分隔绝缘结构1145分开。因此，如图11所示的分隔绝缘结构1145围绕包含在一组紧密间隔的引线1141中的所有引线相应的剖面部分。此外，直接相邻的紧密间隔的引线具有在其上形成的相应的分隔绝缘结构1145，分隔绝缘结构1145可作为紧密间隔的引线1141的直接相邻的组的绝缘隔开件。
图12示意性地表示了在其之间具有基本相等的间距1249的一组引线1241。包括在组1241中的每条引线1240具有在其上形成的分隔绝缘结构1245，分隔绝缘结构1245围绕包括在组1241中的每条引线的相应的剖面部分。因此，包括在组1241中的引线1240之间的间距1249被选择为允许形成分隔绝缘结构1245，以围绕组1241中的每条引线的相应的剖面部分。
图13示意性地表示了具有在其上形成相应的分隔绝缘结构1345的引线1341，分隔绝缘结构1345围绕每条引线1341的相应的剖面部分。此外，在直接相邻的引线1341上形成的分隔绝缘结构1345彼此偏移，以限定如线1343和线1344所示的横跨所述引线的之字形图案。
图14示意性地表示了在根据本发明的一些实施例中其中包括具有引线的存储装置的存储卡700，所述引线具有在其上形成的分隔绝缘结构。根据图14，非易失性存储控制器710可调整存储卡700的总的操作，包括存储器720的操作，存储器720被构造为响应来自控制器710的指令来存储和检索数据。存储器720可以为非易失性存储器。此外，在根据本发明并如在此描述的一些示例性实施例中，存储器720包括存储装置，所述存储装置如在此描述的那样封装，并包括引线，所述引线具有形成在其上的分隔绝缘结构。
在图14中示出的存储卡700符合“形状因子(form-factor)”(即，存储卡的物理大小和形状)以提供具有大小和形状的多媒体卡(MMC)、安全数字存储卡、存储棒等，所述大小和形状允许这些存储卡在与其他适应性的装置(例如读卡器)一起应用。如本领域技术人员所知，SD(安全数字)代表MMC标准的新开发版本，这可允许MMC适应性存储卡与SD适应性装置一起使用。在根据本发明的一些实施例中，MMC/SD形状因子适应性的装置的尺寸为大约32mm×大约24mm×大约1.4mm。在万维网www.mmca.org上进一步讨论MMC和SD标准。
图15示意性地表示了包括处理器电路810的电子系统800，处理器电路810通过结合到易失性存储器系统820、输入/输出系统界面830和非易失存储器系统835的总线840来调整电子系统800的总的操作。在根据本发明并如在此描述的一些示例性实施例中，易失性存储器系统820和非易失性存储器系统835可包括存储装置，所述存储装置如在此描述的那样封装，并包括引线，所述引线具有形成在其上的分隔绝缘结构。
图16至图18是示意性地示出了在根据本发明的一些实施例中在集成电路装置中在引线上形成分隔绝缘结构的方法的剖视图。根据图16，在基底110上安装第一芯片120和第二芯片130。通过粘合剂层115将第一芯片120固定到基底110，通过第二粘合剂层125将第二芯片130固定到第一芯片120。如图16所示，第一芯片120比第二芯片130大。如在图16中进一步示出的，第一组引线140a将第一芯片120电连接到基底110上的键合焊盘。第二组引线140b将第二芯片130电连接到基底110上的第二组键合焊盘。应该理解的是，可根据任何已知的工艺来提供图16中示出的结构。
根据图17，在根据本发明一些实施例中，提供使引线140a和140b的表面“润湿”的预处理工艺来为容纳用于形成分隔绝缘结构的绝缘材料做准备。例如，在根据本发明一些实施例中，可通过利用氩或氮作为周围环境进行等离子体处理来提供预处理工艺。在根据本发明的其他实施例中，可通过湿法处理提供预处理工艺。应该理解的是，预处理工艺可引起相应的引线和将被沉积到引线上的绝缘材料之间的表面张力降低。降低引线和所述材料之间的表面张力可促使分隔绝缘结构在引线上以更规则的间隔形成并具有更规则的形状(例如，椭圆形、球形等)。
在预处理工艺后，可通过将绝缘材料的液体分布到集成电路上方以沉积在引线140a和140b上来形成分隔绝缘结构。具体来讲，在根据本发明的一些实施例中，应用到引线的绝缘液体可包含聚合物，所述聚合物具有基体树脂、粘合力增强剂、硬化催化剂和溶剂。在根据本发明的一些实施例中，上述基体树脂可包括聚酰亚胺树脂、丙烯酸树脂、环氧树脂和/或硅树脂。应该理解的是，可在绝缘液体中包含粘合力增强树脂，以促进绝缘液体和引线的结合。
如本发明人所理解的，液态绝缘材料的粘度可被用来控制所形成的分隔绝缘结构的外部形状。具体来讲，随着粘度降低，可引起形状更均匀的分隔绝缘结构，随着粘度升高，分隔绝缘结构会变得更大。如本发明人所进一步理解的，可在大约几十厘泊(cps)到大约几百cps的范围内提供绝缘液体的粘度。在根据本发明的一些实施例中，粘度可在大约10cps到大约500cps的范围内。在根据本发明的其他实施例中，粘度可在大约20cps到大约100cps的范围内。应该理解的是，上述作为聚合物的一部分的溶剂可被用来控制粘度。具体来讲，为了实现上述范围，可将溶剂的含量限制在按重量计小于聚合物重量的大约50％。
在形成如上所述的分隔绝缘结构145a和145b后，可利用热处理、紫外线辐射处理或热和紫外线辐射的组合对所述分隔绝缘结构进行硬化处理。在该硬化处理过程中，可使包含在聚合物中的溶剂挥发。在根据本发明的一些实施例中，溶剂的挥发温度可比绝缘材料的硬化温度低。例如，在根据本发明的一些实施例中，环氧树脂的硬化温度为大约70℃，而聚酰亚胺树脂的硬化温度为大约200℃。
在根据本发明的又一实施例中，可提供单独的硬化处理，其中，提供第一硬化处理只用于挥发溶剂，而提供第二硬化处理以作为封装集成电路的成型工艺的一部分。具体来讲，如图18所示，在基底上形成成型材料150，以覆盖引线和在其上形成的分隔绝缘结构。完成成型工艺后，可进行第二硬化处理，从而完成成型材料的形成，并提供上述的聚酰亚胺树脂的硬化温度。
图19是提供与可用于形成在此描述的分隔绝缘结构的示例性绝缘材料有关的示例性参数的表格。具体来讲，图19示出了与可从Dow Corning公司获得的被称为ME-7700型的材料有关的参数。在形成在此描述的分隔绝缘结构的示例性工艺过程中，利用量为大约3+/-0.5mg的Dow Corning ME-7700型，按照大约1MPa至大约20MPa的压力以在基底上方大约4+/-1mm的高度进行喷射，来提供利用300W的氩等离子体处理大约300秒。
以上参数可被用来在引线上形成分隔绝缘结构，所述分隔绝缘结构的厚度从比引线厚度大大约3微米到比形成有分隔绝缘结构的引线的厚度大大约小于40微米变化。此外，以上工艺可以这样形成分隔绝缘结构，即，在形成在同一引线上的直接相邻的分隔绝缘结构之间间隔大约200微米。
图20是示出形成在将芯片530电结合到基底510的引线上的分隔绝缘结构545的照片，所述引线具有形成在其上的分隔绝缘结构之间的暴露部分540。图21示出了图20中所示的图像的放大视图，还详细示出了形成在引线上的分隔绝缘结构545的规则间隔，并且在分隔绝缘结构545之间具有在分隔绝缘结构545之外的暴露部分。如图21进一步示出的，分隔绝缘结构545可作为引线和在下面的基底表面之间的隔开件，以防止引线的电短路。
图22示出了突出通过形成分隔绝缘结构545而防止彼此电短路的直接相邻的引线540的剖面照片，其中，利用如上参照图16-18描述的氩等离子体预处理工艺形成分隔绝缘结构545。
如图23和图24所示，分隔绝缘结构545的外部形状可基于用于形成分隔绝缘结构545的绝缘液体的粘度变化。具体来讲，如图23所示，分隔绝缘结构545可具有类似椭圆形的外部形状。相对而言，图24中示出的分隔绝缘结构545a具有如上所述可通过提高粘度来实现的球形的外部形状。
如在此所描述的，在根据本发明的一些实施例中，包括在集成电路装置中的引线可具有形成在其上的分隔绝缘结构。引线上的分隔绝缘结构可围绕引线相应的剖面部分，可用作“隔开件”以防止直接相邻的引线(或其他相邻组件)短路在一起，从而允许减少与引线(或其他组件)之间的节距减小的装置有关的缺陷。在根据本发明的一些实施例中，分隔绝缘结构可具有基本呈球形的外部形状。在根据本发明的其他实施例中，分隔绝缘结构可具有基本呈椭圆形的外部形状。在根据本发明的另外的实施例中，分隔绝缘结构之间的间距可基本相等，此外，引线的位于分隔绝缘结构之间的暴露部分也可基本相等。
对本领域技术人员清楚的是，可对本发明进行各种修改和改变。因此，本发明意图覆盖本发明的修改和改变，只要它们落在权利要求书及其等同物的范围内。

Claims (28)

1、一种半导体装置，包括：
基底，在半导体装置中；
芯片，在基底上；
引线，电结合到芯片；
多个分隔绝缘结构，在引线上并围绕引线相应的剖面部分。
2、如权利要求1所述的装置，其中，引线的位于所述多个分隔绝缘结构中的直接相邻的分隔绝缘结构之间的部分在分隔绝缘结构之外。
3、如权利要求1所述的装置，其中，分隔绝缘结构的剖面部分包括环形形状。
4、如权利要求1所述的装置，其中，分隔绝缘结构包括这样的形状，即，在所述形状中心的直径比邻近所述形状边缘的直径大。
5、如权利要求1所述的装置，其中，分隔绝缘结构包括球形的外部形状。
6、如权利要求1所述的装置，其中，分隔绝缘结构包括椭圆形的外部形状。
7、如权利要求1所述的装置，其中，多个分隔绝缘结构沿引线以相等的间隔隔开，所述间隔在分隔绝缘结构之间限定引线的相等的暴露部分。
8、如权利要求1所述的装置，其中，多个分隔绝缘结构的剖面中心处的厚度相等。
9、如权利要求1所述的装置，其中，所述引线包括第一引线，所述装置还包括：
第二引线，与第一引线直接相邻，其中，多个分隔绝缘结构中的每个在第一和第二引线相邻的剖面部分上，并围绕所述相邻的剖面部分。
10、如权利要求9所述的装置，其中，第一和第二引线包括一组引线，包括在所述组内的引线之间的间距比所述组和直接相邻的引线组之间的间距小。
11、如权利要求1所述的装置，其中，所述引线包括一条引线，所述一条引线包括在多条引线中，所述装置还包括：
在多条引线中的每条引线上的相应的多个分隔绝缘结构，其中，直接相邻的引线的被围绕的剖面部分彼此偏移。
12、如权利要求1所述的装置，其中，所述芯片包括第一芯片，所述装置还包括：
第二芯片，在装置中并位于第一芯片上；
第二引线，直接在第一引线上方电结合到第二芯片，其中，第一引线和第二引线均包括分别围绕第一和第二引线的剖面部分的相应的多个分隔绝缘结构。
13、如权利要求12所述的装置，其中，利用凸点正向工艺或凸点反向工艺使第一引线结合在第一芯片和基底之间，并使第二引线结合在第二芯片和基底之间。
14、一种电子系统，包括：
处理器，被构造成调整电子系统的操作；
系统接口，电结合到处理器，系统接口被构造成在处理器和外部系统之间提供通信；
存储器，电结合到处理器，包括至少一个存储装置，所述存储装置包括：
芯片，在存储装置的基底上；
引线，电结合到芯片；
多个分隔绝缘结构，在所述引线上并围绕引线的相应的剖面部分。
15、一种存储卡，包括：
非易失性存储控制器，被构造成调整存储卡的操作；
存储器，电结合到非易失性存储控制器，包括非易失性存储器，所述非易失性存储器包括：
芯片，在非易失性存储器的基底上；
引线，电结合到芯片；
多个分隔绝缘结构，在所述引线上并围绕引线的相应的剖面部分。
16、一种使半导体装置内的引线绝缘的方法，所述方法包括：
在引线上形成多个分隔绝缘结构以围绕所述引线相应的剖面部分。
17、一种使半导体装置内的引线绝缘的方法，所述方法包括：
预处理结合在芯片和基底之间的引线，以降低引线和用于沉积在引线上的材料之间的表面张力，来提供经预处理的引线；
形成多个分隔绝缘结构以围绕引线相应的剖面部分，所述分隔绝缘结构包括在经预处理的引线上的所述材料。
18、如权利要求17所述的方法，其中，预处理步骤包括应用包括Ar或N的等离子体处理。
19、如权利要求17所述的方法，其中，预处理步骤包括湿法处理。
20、如权利要求17所述的方法，其中，形成多个分隔绝缘结构的步骤包括向引线应用绝缘液体，所述绝缘液体包括：
聚合物，包含基体树脂、粘合力增强剂、硬化催化剂和溶剂。
21、如权利要求20所述的方法，其中，基体树脂包括聚酰亚胺树脂、丙烯酸树脂、环氧树脂或硅树脂。
22、如权利要求20所述的方法，其中，所述溶剂包括：
按重量计少于聚合物重量的50％的有机溶剂。
23、如权利要求18所述的方法，还包括：
在200摄氏度的温度下对多个分隔绝缘结构应用硬化处理。
24、如权利要求18所述的方法，还包括：
利用紫外线辐射对多个分隔绝缘结构应用硬化处理。
25、如权利要求18所述的方法，还包括：
对多个分隔绝缘结构应用第一硬化处理，以挥发用于形成多个分隔绝缘结构的溶剂；
然后，对包括环氧成型化合物的多个分隔绝缘结构应用第二硬化处理，所述环氧成型化合物用于提供成型材料，所述成型材料被应用于多个分隔绝缘结构上方。
26、如权利要求25所述的方法，其中，应用第一硬化处理的步骤包括在大于70摄氏度的温度下应用第一硬化处理。
27、如权利要求18所述的方法，其中，形成多个分隔绝缘结构的步骤包括向引线应用绝缘液体，所述绝缘液体包括：
聚合物，包含基体树脂、粘合力增强剂、硬化催化剂和溶剂。
28、如权利要求27所述的方法，其中，基体树脂包括聚酰亚胺树脂、丙烯酸树脂、环氧树脂或硅树脂。
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US20080296780A1 (en) 2008-12-04
TW200849434A (en) 2008-12-16

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